intel_mid_powerbtn.c 5.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Power button driver for Intel MID platforms.
  4. *
  5. * Copyright (C) 2010,2017 Intel Corp
  6. *
  7. * Author: Hong Liu <hong.liu@intel.com>
  8. * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  9. */
  10. #include <linux/input.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/mfd/intel_msic.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pm_wakeirq.h>
  16. #include <linux/slab.h>
  17. #include <asm/cpu_device_id.h>
  18. #include <asm/intel-family.h>
  19. #include <asm/intel_scu_ipc.h>
  20. #define DRIVER_NAME "msic_power_btn"
  21. #define MSIC_PB_LEVEL (1 << 3) /* 1 - release, 0 - press */
  22. /*
  23. * MSIC document ti_datasheet defines the 1st bit reg 0x21 is used to mask
  24. * power button interrupt
  25. */
  26. #define MSIC_PWRBTNM (1 << 0)
  27. /* Intel Tangier */
  28. #define BCOVE_PB_LEVEL (1 << 4) /* 1 - release, 0 - press */
  29. /* Basin Cove PMIC */
  30. #define BCOVE_PBIRQ 0x02
  31. #define BCOVE_IRQLVL1MSK 0x0c
  32. #define BCOVE_PBIRQMASK 0x0d
  33. #define BCOVE_PBSTATUS 0x27
  34. struct mid_pb_ddata {
  35. struct device *dev;
  36. int irq;
  37. struct input_dev *input;
  38. unsigned short mirqlvl1_addr;
  39. unsigned short pbstat_addr;
  40. u8 pbstat_mask;
  41. struct intel_scu_ipc_dev *scu;
  42. int (*setup)(struct mid_pb_ddata *ddata);
  43. };
  44. static int mid_pbstat(struct mid_pb_ddata *ddata, int *value)
  45. {
  46. struct input_dev *input = ddata->input;
  47. int ret;
  48. u8 pbstat;
  49. ret = intel_scu_ipc_dev_ioread8(ddata->scu, ddata->pbstat_addr,
  50. &pbstat);
  51. if (ret)
  52. return ret;
  53. dev_dbg(input->dev.parent, "PB_INT status= %d\n", pbstat);
  54. *value = !(pbstat & ddata->pbstat_mask);
  55. return 0;
  56. }
  57. static int mid_irq_ack(struct mid_pb_ddata *ddata)
  58. {
  59. return intel_scu_ipc_dev_update(ddata->scu, ddata->mirqlvl1_addr, 0,
  60. MSIC_PWRBTNM);
  61. }
  62. static int mrfld_setup(struct mid_pb_ddata *ddata)
  63. {
  64. /* Unmask the PBIRQ and MPBIRQ on Tangier */
  65. intel_scu_ipc_dev_update(ddata->scu, BCOVE_PBIRQ, 0, MSIC_PWRBTNM);
  66. intel_scu_ipc_dev_update(ddata->scu, BCOVE_PBIRQMASK, 0, MSIC_PWRBTNM);
  67. return 0;
  68. }
  69. static irqreturn_t mid_pb_isr(int irq, void *dev_id)
  70. {
  71. struct mid_pb_ddata *ddata = dev_id;
  72. struct input_dev *input = ddata->input;
  73. int value = 0;
  74. int ret;
  75. ret = mid_pbstat(ddata, &value);
  76. if (ret < 0) {
  77. dev_err(input->dev.parent,
  78. "Read error %d while reading MSIC_PB_STATUS\n", ret);
  79. } else {
  80. input_event(input, EV_KEY, KEY_POWER, value);
  81. input_sync(input);
  82. }
  83. mid_irq_ack(ddata);
  84. return IRQ_HANDLED;
  85. }
  86. static const struct mid_pb_ddata mfld_ddata = {
  87. .mirqlvl1_addr = INTEL_MSIC_IRQLVL1MSK,
  88. .pbstat_addr = INTEL_MSIC_PBSTATUS,
  89. .pbstat_mask = MSIC_PB_LEVEL,
  90. };
  91. static const struct mid_pb_ddata mrfld_ddata = {
  92. .mirqlvl1_addr = BCOVE_IRQLVL1MSK,
  93. .pbstat_addr = BCOVE_PBSTATUS,
  94. .pbstat_mask = BCOVE_PB_LEVEL,
  95. .setup = mrfld_setup,
  96. };
  97. static const struct x86_cpu_id mid_pb_cpu_ids[] = {
  98. X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &mfld_ddata),
  99. X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &mrfld_ddata),
  100. {}
  101. };
  102. static int mid_pb_probe(struct platform_device *pdev)
  103. {
  104. const struct x86_cpu_id *id;
  105. struct mid_pb_ddata *ddata;
  106. struct input_dev *input;
  107. int irq = platform_get_irq(pdev, 0);
  108. int error;
  109. id = x86_match_cpu(mid_pb_cpu_ids);
  110. if (!id)
  111. return -ENODEV;
  112. if (irq < 0) {
  113. dev_err(&pdev->dev, "Failed to get IRQ: %d\n", irq);
  114. return irq;
  115. }
  116. input = devm_input_allocate_device(&pdev->dev);
  117. if (!input)
  118. return -ENOMEM;
  119. input->name = pdev->name;
  120. input->phys = "power-button/input0";
  121. input->id.bustype = BUS_HOST;
  122. input->dev.parent = &pdev->dev;
  123. input_set_capability(input, EV_KEY, KEY_POWER);
  124. ddata = devm_kmemdup(&pdev->dev, (void *)id->driver_data,
  125. sizeof(*ddata), GFP_KERNEL);
  126. if (!ddata)
  127. return -ENOMEM;
  128. ddata->dev = &pdev->dev;
  129. ddata->irq = irq;
  130. ddata->input = input;
  131. if (ddata->setup) {
  132. error = ddata->setup(ddata);
  133. if (error)
  134. return error;
  135. }
  136. ddata->scu = devm_intel_scu_ipc_dev_get(&pdev->dev);
  137. if (!ddata->scu)
  138. return -EPROBE_DEFER;
  139. error = devm_request_threaded_irq(&pdev->dev, irq, NULL, mid_pb_isr,
  140. IRQF_ONESHOT, DRIVER_NAME, ddata);
  141. if (error) {
  142. dev_err(&pdev->dev,
  143. "Unable to request irq %d for MID power button\n", irq);
  144. return error;
  145. }
  146. error = input_register_device(input);
  147. if (error) {
  148. dev_err(&pdev->dev,
  149. "Unable to register input dev, error %d\n", error);
  150. return error;
  151. }
  152. platform_set_drvdata(pdev, ddata);
  153. /*
  154. * SCU firmware might send power button interrupts to IA core before
  155. * kernel boots and doesn't get EOI from IA core. The first bit of
  156. * MSIC reg 0x21 is kept masked, and SCU firmware doesn't send new
  157. * power interrupt to Android kernel. Unmask the bit when probing
  158. * power button in kernel.
  159. * There is a very narrow race between irq handler and power button
  160. * initialization. The race happens rarely. So we needn't worry
  161. * about it.
  162. */
  163. error = mid_irq_ack(ddata);
  164. if (error) {
  165. dev_err(&pdev->dev,
  166. "Unable to clear power button interrupt, error: %d\n",
  167. error);
  168. return error;
  169. }
  170. device_init_wakeup(&pdev->dev, true);
  171. dev_pm_set_wake_irq(&pdev->dev, irq);
  172. return 0;
  173. }
  174. static int mid_pb_remove(struct platform_device *pdev)
  175. {
  176. dev_pm_clear_wake_irq(&pdev->dev);
  177. device_init_wakeup(&pdev->dev, false);
  178. return 0;
  179. }
  180. static struct platform_driver mid_pb_driver = {
  181. .driver = {
  182. .name = DRIVER_NAME,
  183. },
  184. .probe = mid_pb_probe,
  185. .remove = mid_pb_remove,
  186. };
  187. module_platform_driver(mid_pb_driver);
  188. MODULE_AUTHOR("Hong Liu <hong.liu@intel.com>");
  189. MODULE_DESCRIPTION("Intel MID Power Button Driver");
  190. MODULE_LICENSE("GPL v2");
  191. MODULE_ALIAS("platform:" DRIVER_NAME);