pinctrl-da9062.c 7.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Dialog DA9062 pinctrl and GPIO driver.
  4. * Based on DA9055 GPIO driver.
  5. *
  6. * TODO:
  7. * - add pinmux and pinctrl support (gpio alternate mode)
  8. *
  9. * Documents:
  10. * [1] https://www.dialog-semiconductor.com/sites/default/files/da9062_datasheet_3v6.pdf
  11. *
  12. * Copyright (C) 2019 Pengutronix, Marco Felsch <kernel@pengutronix.de>
  13. */
  14. #include <linux/bits.h>
  15. #include <linux/module.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/regmap.h>
  18. #include <linux/gpio/driver.h>
  19. #include <linux/mfd/da9062/core.h>
  20. #include <linux/mfd/da9062/registers.h>
  21. /*
  22. * We need this get the gpio_desc from a <gpio_chip,offset> tuple to decide if
  23. * the gpio is active low without a vendor specific dt-binding.
  24. */
  25. #include "../gpio/gpiolib.h"
  26. #define DA9062_TYPE(offset) (4 * (offset % 2))
  27. #define DA9062_PIN_SHIFT(offset) (4 * (offset % 2))
  28. #define DA9062_PIN_ALTERNATE 0x00 /* gpio alternate mode */
  29. #define DA9062_PIN_GPI 0x01 /* gpio in */
  30. #define DA9062_PIN_GPO_OD 0x02 /* gpio out open-drain */
  31. #define DA9062_PIN_GPO_PP 0x03 /* gpio out push-pull */
  32. #define DA9062_GPIO_NUM 5
  33. struct da9062_pctl {
  34. struct da9062 *da9062;
  35. struct gpio_chip gc;
  36. unsigned int pin_config[DA9062_GPIO_NUM];
  37. };
  38. static int da9062_pctl_get_pin_mode(struct da9062_pctl *pctl,
  39. unsigned int offset)
  40. {
  41. struct regmap *regmap = pctl->da9062->regmap;
  42. int ret, val;
  43. ret = regmap_read(regmap, DA9062AA_GPIO_0_1 + (offset >> 1), &val);
  44. if (ret < 0)
  45. return ret;
  46. val >>= DA9062_PIN_SHIFT(offset);
  47. val &= DA9062AA_GPIO0_PIN_MASK;
  48. return val;
  49. }
  50. static int da9062_pctl_set_pin_mode(struct da9062_pctl *pctl,
  51. unsigned int offset, unsigned int mode_req)
  52. {
  53. struct regmap *regmap = pctl->da9062->regmap;
  54. unsigned int mode = mode_req;
  55. unsigned int mask;
  56. int ret;
  57. mode &= DA9062AA_GPIO0_PIN_MASK;
  58. mode <<= DA9062_PIN_SHIFT(offset);
  59. mask = DA9062AA_GPIO0_PIN_MASK << DA9062_PIN_SHIFT(offset);
  60. ret = regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1),
  61. mask, mode);
  62. if (!ret)
  63. pctl->pin_config[offset] = mode_req;
  64. return ret;
  65. }
  66. static int da9062_gpio_get(struct gpio_chip *gc, unsigned int offset)
  67. {
  68. struct da9062_pctl *pctl = gpiochip_get_data(gc);
  69. struct regmap *regmap = pctl->da9062->regmap;
  70. int gpio_mode, val;
  71. int ret;
  72. gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
  73. if (gpio_mode < 0)
  74. return gpio_mode;
  75. switch (gpio_mode) {
  76. case DA9062_PIN_ALTERNATE:
  77. return -ENOTSUPP;
  78. case DA9062_PIN_GPI:
  79. ret = regmap_read(regmap, DA9062AA_STATUS_B, &val);
  80. if (ret < 0)
  81. return ret;
  82. break;
  83. case DA9062_PIN_GPO_OD:
  84. case DA9062_PIN_GPO_PP:
  85. ret = regmap_read(regmap, DA9062AA_GPIO_MODE0_4, &val);
  86. if (ret < 0)
  87. return ret;
  88. }
  89. return !!(val & BIT(offset));
  90. }
  91. static void da9062_gpio_set(struct gpio_chip *gc, unsigned int offset,
  92. int value)
  93. {
  94. struct da9062_pctl *pctl = gpiochip_get_data(gc);
  95. struct regmap *regmap = pctl->da9062->regmap;
  96. regmap_update_bits(regmap, DA9062AA_GPIO_MODE0_4, BIT(offset),
  97. value << offset);
  98. }
  99. static int da9062_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
  100. {
  101. struct da9062_pctl *pctl = gpiochip_get_data(gc);
  102. int gpio_mode;
  103. gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
  104. if (gpio_mode < 0)
  105. return gpio_mode;
  106. switch (gpio_mode) {
  107. case DA9062_PIN_ALTERNATE:
  108. return -ENOTSUPP;
  109. case DA9062_PIN_GPI:
  110. return GPIO_LINE_DIRECTION_IN;
  111. case DA9062_PIN_GPO_OD:
  112. case DA9062_PIN_GPO_PP:
  113. return GPIO_LINE_DIRECTION_OUT;
  114. }
  115. return -EINVAL;
  116. }
  117. static int da9062_gpio_direction_input(struct gpio_chip *gc,
  118. unsigned int offset)
  119. {
  120. struct da9062_pctl *pctl = gpiochip_get_data(gc);
  121. struct regmap *regmap = pctl->da9062->regmap;
  122. struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
  123. unsigned int gpi_type;
  124. int ret;
  125. ret = da9062_pctl_set_pin_mode(pctl, offset, DA9062_PIN_GPI);
  126. if (ret)
  127. return ret;
  128. /*
  129. * If the gpio is active low we should set it in hw too. No worries
  130. * about gpio_get() because we read and return the gpio-level. So the
  131. * gpiolib active_low handling is still correct.
  132. *
  133. * 0 - active low, 1 - active high
  134. */
  135. gpi_type = !gpiod_is_active_low(desc);
  136. return regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1),
  137. DA9062AA_GPIO0_TYPE_MASK << DA9062_TYPE(offset),
  138. gpi_type << DA9062_TYPE(offset));
  139. }
  140. static int da9062_gpio_direction_output(struct gpio_chip *gc,
  141. unsigned int offset, int value)
  142. {
  143. struct da9062_pctl *pctl = gpiochip_get_data(gc);
  144. unsigned int pin_config = pctl->pin_config[offset];
  145. int ret;
  146. ret = da9062_pctl_set_pin_mode(pctl, offset, pin_config);
  147. if (ret)
  148. return ret;
  149. da9062_gpio_set(gc, offset, value);
  150. return 0;
  151. }
  152. static int da9062_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
  153. unsigned long config)
  154. {
  155. struct da9062_pctl *pctl = gpiochip_get_data(gc);
  156. struct regmap *regmap = pctl->da9062->regmap;
  157. int gpio_mode;
  158. /*
  159. * We need to meet the following restrictions [1, Figure 18]:
  160. * - PIN_CONFIG_BIAS_PULL_DOWN -> only allowed if the pin is used as
  161. * gpio input
  162. * - PIN_CONFIG_BIAS_PULL_UP -> only allowed if the pin is used as
  163. * gpio output open-drain.
  164. */
  165. switch (pinconf_to_config_param(config)) {
  166. case PIN_CONFIG_BIAS_DISABLE:
  167. return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
  168. BIT(offset), 0);
  169. case PIN_CONFIG_BIAS_PULL_DOWN:
  170. gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
  171. if (gpio_mode < 0)
  172. return -EINVAL;
  173. else if (gpio_mode != DA9062_PIN_GPI)
  174. return -ENOTSUPP;
  175. return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
  176. BIT(offset), BIT(offset));
  177. case PIN_CONFIG_BIAS_PULL_UP:
  178. gpio_mode = da9062_pctl_get_pin_mode(pctl, offset);
  179. if (gpio_mode < 0)
  180. return -EINVAL;
  181. else if (gpio_mode != DA9062_PIN_GPO_OD)
  182. return -ENOTSUPP;
  183. return regmap_update_bits(regmap, DA9062AA_CONFIG_K,
  184. BIT(offset), BIT(offset));
  185. case PIN_CONFIG_DRIVE_OPEN_DRAIN:
  186. return da9062_pctl_set_pin_mode(pctl, offset,
  187. DA9062_PIN_GPO_OD);
  188. case PIN_CONFIG_DRIVE_PUSH_PULL:
  189. return da9062_pctl_set_pin_mode(pctl, offset,
  190. DA9062_PIN_GPO_PP);
  191. default:
  192. return -ENOTSUPP;
  193. }
  194. }
  195. static int da9062_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
  196. {
  197. struct da9062_pctl *pctl = gpiochip_get_data(gc);
  198. struct da9062 *da9062 = pctl->da9062;
  199. return regmap_irq_get_virq(da9062->regmap_irq,
  200. DA9062_IRQ_GPI0 + offset);
  201. }
  202. static const struct gpio_chip reference_gc = {
  203. .owner = THIS_MODULE,
  204. .get = da9062_gpio_get,
  205. .set = da9062_gpio_set,
  206. .get_direction = da9062_gpio_get_direction,
  207. .direction_input = da9062_gpio_direction_input,
  208. .direction_output = da9062_gpio_direction_output,
  209. .set_config = da9062_gpio_set_config,
  210. .to_irq = da9062_gpio_to_irq,
  211. .can_sleep = true,
  212. .ngpio = DA9062_GPIO_NUM,
  213. .base = -1,
  214. };
  215. static int da9062_pctl_probe(struct platform_device *pdev)
  216. {
  217. struct device *parent = pdev->dev.parent;
  218. struct da9062_pctl *pctl;
  219. int i;
  220. pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
  221. if (!pctl)
  222. return -ENOMEM;
  223. pctl->da9062 = dev_get_drvdata(parent);
  224. if (!pctl->da9062)
  225. return -EINVAL;
  226. if (!device_property_present(parent, "gpio-controller"))
  227. return 0;
  228. for (i = 0; i < ARRAY_SIZE(pctl->pin_config); i++)
  229. pctl->pin_config[i] = DA9062_PIN_GPO_PP;
  230. /*
  231. * Currently the driver handles only the GPIO support. The
  232. * pinctrl/pinmux support can be added later if needed.
  233. */
  234. pctl->gc = reference_gc;
  235. pctl->gc.label = dev_name(&pdev->dev);
  236. pctl->gc.parent = &pdev->dev;
  237. #ifdef CONFIG_OF_GPIO
  238. pctl->gc.of_node = parent->of_node;
  239. #endif
  240. platform_set_drvdata(pdev, pctl);
  241. return devm_gpiochip_add_data(&pdev->dev, &pctl->gc, pctl);
  242. }
  243. static struct platform_driver da9062_pctl_driver = {
  244. .probe = da9062_pctl_probe,
  245. .driver = {
  246. .name = "da9062-gpio",
  247. },
  248. };
  249. module_platform_driver(da9062_pctl_driver);
  250. MODULE_AUTHOR("Marco Felsch <kernel@pengutronix.de>");
  251. MODULE_DESCRIPTION("DA9062 PMIC pinctrl and GPIO Driver");
  252. MODULE_LICENSE("GPL v2");
  253. MODULE_ALIAS("platform:da9062-gpio");