pinctrl-emmitsburg.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Intel Emmitsburg PCH pinctrl/GPIO driver
  4. *
  5. * Copyright (C) 2020, Intel Corporation
  6. * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  7. */
  8. #include <linux/mod_devicetable.h>
  9. #include <linux/module.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/pinctrl/pinctrl.h>
  12. #include "pinctrl-intel.h"
  13. #define EBG_PAD_OWN 0x0a0
  14. #define EBG_PADCFGLOCK 0x100
  15. #define EBG_HOSTSW_OWN 0x130
  16. #define EBG_GPI_IS 0x200
  17. #define EBG_GPI_IE 0x210
  18. #define EBG_GPP(r, s, e) \
  19. { \
  20. .reg_num = (r), \
  21. .base = (s), \
  22. .size = ((e) - (s) + 1), \
  23. }
  24. #define EBG_COMMUNITY(b, s, e, g) \
  25. { \
  26. .barno = (b), \
  27. .padown_offset = EBG_PAD_OWN, \
  28. .padcfglock_offset = EBG_PADCFGLOCK, \
  29. .hostown_offset = EBG_HOSTSW_OWN, \
  30. .is_offset = EBG_GPI_IS, \
  31. .ie_offset = EBG_GPI_IE, \
  32. .pin_base = (s), \
  33. .npins = ((e) - (s) + 1), \
  34. .gpps = (g), \
  35. .ngpps = ARRAY_SIZE(g), \
  36. }
  37. /* Emmitsburg */
  38. static const struct pinctrl_pin_desc ebg_pins[] = {
  39. /* GPP_A */
  40. PINCTRL_PIN(0, "ESPI_ALERT0B"),
  41. PINCTRL_PIN(1, "ESPI_ALERT1B"),
  42. PINCTRL_PIN(2, "ESPI_IO_0"),
  43. PINCTRL_PIN(3, "ESPI_IO_1"),
  44. PINCTRL_PIN(4, "ESPI_IO_2"),
  45. PINCTRL_PIN(5, "ESPI_IO_3"),
  46. PINCTRL_PIN(6, "ESPI_CS0B"),
  47. PINCTRL_PIN(7, "ESPI_CS1B"),
  48. PINCTRL_PIN(8, "ESPI_RESETB"),
  49. PINCTRL_PIN(9, "ESPI_CLK"),
  50. PINCTRL_PIN(10, "SRCCLKREQB_0"),
  51. PINCTRL_PIN(11, "SRCCLKREQB_1"),
  52. PINCTRL_PIN(12, "SRCCLKREQB_2"),
  53. PINCTRL_PIN(13, "SRCCLKREQB_3"),
  54. PINCTRL_PIN(14, "SRCCLKREQB_4"),
  55. PINCTRL_PIN(15, "SRCCLKREQB_5"),
  56. PINCTRL_PIN(16, "SRCCLKREQB_6"),
  57. PINCTRL_PIN(17, "SRCCLKREQB_7"),
  58. PINCTRL_PIN(18, "SRCCLKREQB_8"),
  59. PINCTRL_PIN(19, "SRCCLKREQB_9"),
  60. PINCTRL_PIN(20, "ESPI_CLK_LOOPBK"),
  61. /* GPP_B */
  62. PINCTRL_PIN(21, "GSXDOUT"),
  63. PINCTRL_PIN(22, "GSXSLOAD"),
  64. PINCTRL_PIN(23, "GSXDIN"),
  65. PINCTRL_PIN(24, "GSXSRESETB"),
  66. PINCTRL_PIN(25, "GSXCLK"),
  67. PINCTRL_PIN(26, "USB2_OCB_0"),
  68. PINCTRL_PIN(27, "USB2_OCB_1"),
  69. PINCTRL_PIN(28, "USB2_OCB_2"),
  70. PINCTRL_PIN(29, "USB2_OCB_3"),
  71. PINCTRL_PIN(30, "USB2_OCB_4"),
  72. PINCTRL_PIN(31, "USB2_OCB_5"),
  73. PINCTRL_PIN(32, "USB2_OCB_6"),
  74. PINCTRL_PIN(33, "HS_UART0_RXD"),
  75. PINCTRL_PIN(34, "HS_UART0_TXD"),
  76. PINCTRL_PIN(35, "HS_UART0_RTSB"),
  77. PINCTRL_PIN(36, "HS_UART0_CTSB"),
  78. PINCTRL_PIN(37, "HS_UART1_RXD"),
  79. PINCTRL_PIN(38, "HS_UART1_TXD"),
  80. PINCTRL_PIN(39, "HS_UART1_RTSB"),
  81. PINCTRL_PIN(40, "HS_UART1_CTSB"),
  82. PINCTRL_PIN(41, "GPPC_B_20"),
  83. PINCTRL_PIN(42, "GPPC_B_21"),
  84. PINCTRL_PIN(43, "GPPC_B_22"),
  85. PINCTRL_PIN(44, "PS_ONB"),
  86. /* SPI */
  87. PINCTRL_PIN(45, "SPI0_IO_2"),
  88. PINCTRL_PIN(46, "SPI0_IO_3"),
  89. PINCTRL_PIN(47, "SPI0_MOSI_IO_0"),
  90. PINCTRL_PIN(48, "SPI0_MISO_IO_1"),
  91. PINCTRL_PIN(49, "SPI0_TPM_CSB"),
  92. PINCTRL_PIN(50, "SPI0_FLASH_0_CSB"),
  93. PINCTRL_PIN(51, "SPI0_FLASH_1_CSB"),
  94. PINCTRL_PIN(52, "SPI0_CLK"),
  95. PINCTRL_PIN(53, "TIME_SYNC_0"),
  96. PINCTRL_PIN(54, "SPKR"),
  97. PINCTRL_PIN(55, "CPU_GP_0"),
  98. PINCTRL_PIN(56, "CPU_GP_1"),
  99. PINCTRL_PIN(57, "CPU_GP_2"),
  100. PINCTRL_PIN(58, "CPU_GP_3"),
  101. PINCTRL_PIN(59, "SUSWARNB_SUSPWRDNACK"),
  102. PINCTRL_PIN(60, "SUSACKB"),
  103. PINCTRL_PIN(61, "NMIB"),
  104. PINCTRL_PIN(62, "SMIB"),
  105. PINCTRL_PIN(63, "GPPC_S_10"),
  106. PINCTRL_PIN(64, "GPPC_S_11"),
  107. PINCTRL_PIN(65, "SPI_CLK_LOOPBK"),
  108. /* GPP_C */
  109. PINCTRL_PIN(66, "ME_SML0CLK"),
  110. PINCTRL_PIN(67, "ME_SML0DATA"),
  111. PINCTRL_PIN(68, "ME_SML0ALERTB"),
  112. PINCTRL_PIN(69, "ME_SML0BDATA"),
  113. PINCTRL_PIN(70, "ME_SML0BCLK"),
  114. PINCTRL_PIN(71, "ME_SML0BALERTB"),
  115. PINCTRL_PIN(72, "ME_SML1CLK"),
  116. PINCTRL_PIN(73, "ME_SML1DATA"),
  117. PINCTRL_PIN(74, "ME_SML1ALERTB"),
  118. PINCTRL_PIN(75, "ME_SML2CLK"),
  119. PINCTRL_PIN(76, "ME_SML2DATA"),
  120. PINCTRL_PIN(77, "ME_SML2ALERTB"),
  121. PINCTRL_PIN(78, "ME_SML3CLK"),
  122. PINCTRL_PIN(79, "ME_SML3DATA"),
  123. PINCTRL_PIN(80, "ME_SML3ALERTB"),
  124. PINCTRL_PIN(81, "ME_SML4CLK"),
  125. PINCTRL_PIN(82, "ME_SML4DATA"),
  126. PINCTRL_PIN(83, "ME_SML4ALERTB"),
  127. PINCTRL_PIN(84, "GPPC_C_18"),
  128. PINCTRL_PIN(85, "MC_SMBCLK"),
  129. PINCTRL_PIN(86, "MC_SMBDATA"),
  130. PINCTRL_PIN(87, "MC_SMBALERTB"),
  131. /* GPP_D */
  132. PINCTRL_PIN(88, "HS_SMBCLK"),
  133. PINCTRL_PIN(89, "HS_SMBDATA"),
  134. PINCTRL_PIN(90, "HS_SMBALERTB"),
  135. PINCTRL_PIN(91, "GBE_SMB_ALRT_N"),
  136. PINCTRL_PIN(92, "GBE_SMB_CLK"),
  137. PINCTRL_PIN(93, "GBE_SMB_DATA"),
  138. PINCTRL_PIN(94, "GBE_GPIO10"),
  139. PINCTRL_PIN(95, "GBE_GPIO11"),
  140. PINCTRL_PIN(96, "CRASHLOG_TRIG_N"),
  141. PINCTRL_PIN(97, "PMEB"),
  142. PINCTRL_PIN(98, "BM_BUSYB"),
  143. PINCTRL_PIN(99, "PLTRSTB"),
  144. PINCTRL_PIN(100, "PCHHOTB"),
  145. PINCTRL_PIN(101, "ADR_COMPLETE"),
  146. PINCTRL_PIN(102, "ADR_TRIGGER_N"),
  147. PINCTRL_PIN(103, "VRALERTB"),
  148. PINCTRL_PIN(104, "ADR_ACK"),
  149. PINCTRL_PIN(105, "THERMTRIP_N"),
  150. PINCTRL_PIN(106, "MEMTRIP_N"),
  151. PINCTRL_PIN(107, "MSMI_N"),
  152. PINCTRL_PIN(108, "CATERR_N"),
  153. PINCTRL_PIN(109, "GLB_RST_WARN_B"),
  154. PINCTRL_PIN(110, "USB2_OCB_7"),
  155. PINCTRL_PIN(111, "GPP_D_23"),
  156. /* GPP_E */
  157. PINCTRL_PIN(112, "SATA1_XPCIE_0"),
  158. PINCTRL_PIN(113, "SATA1_XPCIE_1"),
  159. PINCTRL_PIN(114, "SATA1_XPCIE_2"),
  160. PINCTRL_PIN(115, "SATA1_XPCIE_3"),
  161. PINCTRL_PIN(116, "SATA0_XPCIE_2"),
  162. PINCTRL_PIN(117, "SATA0_XPCIE_3"),
  163. PINCTRL_PIN(118, "SATA0_USB3_XPCIE_0"),
  164. PINCTRL_PIN(119, "SATA0_USB3_XPCIE_1"),
  165. PINCTRL_PIN(120, "SATA0_SCLOCK"),
  166. PINCTRL_PIN(121, "SATA0_SLOAD"),
  167. PINCTRL_PIN(122, "SATA0_SDATAOUT"),
  168. PINCTRL_PIN(123, "SATA1_SCLOCK"),
  169. PINCTRL_PIN(124, "SATA1_SLOAD"),
  170. PINCTRL_PIN(125, "SATA1_SDATAOUT"),
  171. PINCTRL_PIN(126, "SATA2_SCLOCK"),
  172. PINCTRL_PIN(127, "SATA2_SLOAD"),
  173. PINCTRL_PIN(128, "SATA2_SDATAOUT"),
  174. PINCTRL_PIN(129, "ERR0_N"),
  175. PINCTRL_PIN(130, "ERR1_N"),
  176. PINCTRL_PIN(131, "ERR2_N"),
  177. PINCTRL_PIN(132, "GBE_UART_RXD"),
  178. PINCTRL_PIN(133, "GBE_UART_TXD"),
  179. PINCTRL_PIN(134, "GBE_UART_RTSB"),
  180. PINCTRL_PIN(135, "GBE_UART_CTSB"),
  181. /* JTAG */
  182. PINCTRL_PIN(136, "JTAG_TDO"),
  183. PINCTRL_PIN(137, "JTAG_TDI"),
  184. PINCTRL_PIN(138, "JTAG_TCK"),
  185. PINCTRL_PIN(139, "JTAG_TMS"),
  186. PINCTRL_PIN(140, "JTAGX"),
  187. PINCTRL_PIN(141, "PRDYB"),
  188. PINCTRL_PIN(142, "PREQB"),
  189. PINCTRL_PIN(143, "GLB_PC_DISABLE"),
  190. PINCTRL_PIN(144, "DBG_PMODE"),
  191. PINCTRL_PIN(145, "GLB_EXT_ACC_DISABLE"),
  192. /* GPP_H */
  193. PINCTRL_PIN(146, "GBE_GPIO12"),
  194. PINCTRL_PIN(147, "GBE_GPIO13"),
  195. PINCTRL_PIN(148, "GBE_SDP_TIMESYNC0_S2N"),
  196. PINCTRL_PIN(149, "GBE_SDP_TIMESYNC1_S2N"),
  197. PINCTRL_PIN(150, "GBE_SDP_TIMESYNC2_S2N"),
  198. PINCTRL_PIN(151, "GBE_SDP_TIMESYNC3_S2N"),
  199. PINCTRL_PIN(152, "GPPC_H_6"),
  200. PINCTRL_PIN(153, "GPPC_H_7"),
  201. PINCTRL_PIN(154, "NCSI_CLK_IN"),
  202. PINCTRL_PIN(155, "NCSI_CRS_DV"),
  203. PINCTRL_PIN(156, "NCSI_RXD0"),
  204. PINCTRL_PIN(157, "NCSI_RXD1"),
  205. PINCTRL_PIN(158, "NCSI_TX_EN"),
  206. PINCTRL_PIN(159, "NCSI_TXD0"),
  207. PINCTRL_PIN(160, "NCSI_TXD1"),
  208. PINCTRL_PIN(161, "NAC_NCSI_CLK_OUT_0"),
  209. PINCTRL_PIN(162, "NAC_NCSI_CLK_OUT_1"),
  210. PINCTRL_PIN(163, "NAC_NCSI_CLK_OUT_2"),
  211. PINCTRL_PIN(164, "PMCALERTB"),
  212. PINCTRL_PIN(165, "GPPC_H_19"),
  213. /* GPP_J */
  214. PINCTRL_PIN(166, "CPUPWRGD"),
  215. PINCTRL_PIN(167, "CPU_THRMTRIP_N"),
  216. PINCTRL_PIN(168, "PLTRST_CPUB"),
  217. PINCTRL_PIN(169, "TRIGGER0_N"),
  218. PINCTRL_PIN(170, "TRIGGER1_N"),
  219. PINCTRL_PIN(171, "CPU_PWR_DEBUG_N"),
  220. PINCTRL_PIN(172, "CPU_MEMTRIP_N"),
  221. PINCTRL_PIN(173, "CPU_MSMI_N"),
  222. PINCTRL_PIN(174, "ME_PECI"),
  223. PINCTRL_PIN(175, "NAC_SPARE0"),
  224. PINCTRL_PIN(176, "NAC_SPARE1"),
  225. PINCTRL_PIN(177, "NAC_SPARE2"),
  226. PINCTRL_PIN(178, "CPU_ERR0_N"),
  227. PINCTRL_PIN(179, "CPU_CATERR_N"),
  228. PINCTRL_PIN(180, "CPU_ERR1_N"),
  229. PINCTRL_PIN(181, "CPU_ERR2_N"),
  230. PINCTRL_PIN(182, "GPP_J_16"),
  231. PINCTRL_PIN(183, "GPP_J_17"),
  232. /* GPP_I */
  233. PINCTRL_PIN(184, "GBE_GPIO4"),
  234. PINCTRL_PIN(185, "GBE_GPIO5"),
  235. PINCTRL_PIN(186, "GBE_GPIO6"),
  236. PINCTRL_PIN(187, "GBE_GPIO7"),
  237. PINCTRL_PIN(188, "GBE1_LED1"),
  238. PINCTRL_PIN(189, "GBE1_LED2"),
  239. PINCTRL_PIN(190, "GBE2_LED0"),
  240. PINCTRL_PIN(191, "GBE2_LED1"),
  241. PINCTRL_PIN(192, "GBE2_LED2"),
  242. PINCTRL_PIN(193, "GBE3_LED0"),
  243. PINCTRL_PIN(194, "GBE3_LED1"),
  244. PINCTRL_PIN(195, "GBE3_LED2"),
  245. PINCTRL_PIN(196, "GBE0_I2C_CLK"),
  246. PINCTRL_PIN(197, "GBE0_I2C_DATA"),
  247. PINCTRL_PIN(198, "GBE1_I2C_CLK"),
  248. PINCTRL_PIN(199, "GBE1_I2C_DATA"),
  249. PINCTRL_PIN(200, "GBE2_I2C_CLK"),
  250. PINCTRL_PIN(201, "GBE2_I2C_DATA"),
  251. PINCTRL_PIN(202, "GBE3_I2C_CLK"),
  252. PINCTRL_PIN(203, "GBE3_I2C_DATA"),
  253. PINCTRL_PIN(204, "GBE4_I2C_CLK"),
  254. PINCTRL_PIN(205, "GBE4_I2C_DATA"),
  255. PINCTRL_PIN(206, "GBE_GPIO8"),
  256. PINCTRL_PIN(207, "GBE_GPIO9"),
  257. /* GPP_L */
  258. PINCTRL_PIN(208, "PM_SYNC_0"),
  259. PINCTRL_PIN(209, "PM_DOWN_0"),
  260. PINCTRL_PIN(210, "PM_SYNC_CLK_0"),
  261. PINCTRL_PIN(211, "GPP_L_3"),
  262. PINCTRL_PIN(212, "GPP_L_4"),
  263. PINCTRL_PIN(213, "GPP_L_5"),
  264. PINCTRL_PIN(214, "GPP_L_6"),
  265. PINCTRL_PIN(215, "GPP_L_7"),
  266. PINCTRL_PIN(216, "GPP_L_8"),
  267. PINCTRL_PIN(217, "NAC_GBE_GPIO0_S2N"),
  268. PINCTRL_PIN(218, "NAC_GBE_GPIO1_S2N"),
  269. PINCTRL_PIN(219, "NAC_GBE_GPIO2_S2N"),
  270. PINCTRL_PIN(220, "NAC_GBE_GPIO3_S2N"),
  271. PINCTRL_PIN(221, "NAC_GBE_SMB_DATA_IN"),
  272. PINCTRL_PIN(222, "NAC_GBE_SMB_DATA_OUT"),
  273. PINCTRL_PIN(223, "NAC_GBE_SMB_ALRT_N"),
  274. PINCTRL_PIN(224, "NAC_GBE_SMB_CLK_IN"),
  275. PINCTRL_PIN(225, "NAC_GBE_SMB_CLK_OUT"),
  276. /* GPP_M */
  277. PINCTRL_PIN(226, "GPP_M_0"),
  278. PINCTRL_PIN(227, "GPP_M_1"),
  279. PINCTRL_PIN(228, "GPP_M_2"),
  280. PINCTRL_PIN(229, "GPP_M_3"),
  281. PINCTRL_PIN(230, "NAC_WAKE_N"),
  282. PINCTRL_PIN(231, "GPP_M_5"),
  283. PINCTRL_PIN(232, "GPP_M_6"),
  284. PINCTRL_PIN(233, "GPP_M_7"),
  285. PINCTRL_PIN(234, "GPP_M_8"),
  286. PINCTRL_PIN(235, "NAC_SBLINK_S2N"),
  287. PINCTRL_PIN(236, "NAC_SBLINK_N2S"),
  288. PINCTRL_PIN(237, "NAC_SBLINK_CLK_N2S"),
  289. PINCTRL_PIN(238, "NAC_SBLINK_CLK_S2N"),
  290. PINCTRL_PIN(239, "NAC_XTAL_VALID"),
  291. PINCTRL_PIN(240, "NAC_RESET_NAC_N"),
  292. PINCTRL_PIN(241, "GPP_M_15"),
  293. PINCTRL_PIN(242, "GPP_M_16"),
  294. PINCTRL_PIN(243, "GPP_M_17"),
  295. /* GPP_N */
  296. PINCTRL_PIN(244, "GPP_N_0"),
  297. PINCTRL_PIN(245, "NAC_NCSI_TXD0"),
  298. PINCTRL_PIN(246, "GPP_N_2"),
  299. PINCTRL_PIN(247, "GPP_N_3"),
  300. PINCTRL_PIN(248, "NAC_NCSI_REFCLK_IN"),
  301. PINCTRL_PIN(249, "GPP_N_5"),
  302. PINCTRL_PIN(250, "GPP_N_6"),
  303. PINCTRL_PIN(251, "GPP_N_7"),
  304. PINCTRL_PIN(252, "NAC_NCSI_RXD0"),
  305. PINCTRL_PIN(253, "NAC_NCSI_RXD1"),
  306. PINCTRL_PIN(254, "NAC_NCSI_CRS_DV"),
  307. PINCTRL_PIN(255, "NAC_NCSI_CLK_IN"),
  308. PINCTRL_PIN(256, "NAC_NCSI_REFCLK_OUT"),
  309. PINCTRL_PIN(257, "NAC_NCSI_TX_EN"),
  310. PINCTRL_PIN(258, "NAC_NCSI_TXD1"),
  311. PINCTRL_PIN(259, "NAC_NCSI_OE_N"),
  312. PINCTRL_PIN(260, "NAC_GR_N"),
  313. PINCTRL_PIN(261, "NAC_INIT_SX_WAKE_N"),
  314. };
  315. static const struct intel_padgroup ebg_community0_gpps[] = {
  316. EBG_GPP(0, 0, 20), /* GPP_A */
  317. EBG_GPP(1, 21, 44), /* GPP_B */
  318. EBG_GPP(2, 45, 65), /* SPI */
  319. };
  320. static const struct intel_padgroup ebg_community1_gpps[] = {
  321. EBG_GPP(0, 66, 87), /* GPP_C */
  322. EBG_GPP(1, 88, 111), /* GPP_D */
  323. };
  324. static const struct intel_padgroup ebg_community3_gpps[] = {
  325. EBG_GPP(0, 112, 135), /* GPP_E */
  326. EBG_GPP(1, 136, 145), /* JTAG */
  327. };
  328. static const struct intel_padgroup ebg_community4_gpps[] = {
  329. EBG_GPP(0, 146, 165), /* GPP_H */
  330. EBG_GPP(1, 166, 183), /* GPP_J */
  331. };
  332. static const struct intel_padgroup ebg_community5_gpps[] = {
  333. EBG_GPP(0, 184, 207), /* GPP_I */
  334. EBG_GPP(1, 208, 225), /* GPP_L */
  335. EBG_GPP(2, 226, 243), /* GPP_M */
  336. EBG_GPP(3, 244, 261), /* GPP_N */
  337. };
  338. static const struct intel_community ebg_communities[] = {
  339. EBG_COMMUNITY(0, 0, 65, ebg_community0_gpps),
  340. EBG_COMMUNITY(1, 66, 111, ebg_community1_gpps),
  341. EBG_COMMUNITY(2, 112, 145, ebg_community3_gpps),
  342. EBG_COMMUNITY(3, 146, 183, ebg_community4_gpps),
  343. EBG_COMMUNITY(4, 184, 261, ebg_community5_gpps),
  344. };
  345. static const struct intel_pinctrl_soc_data ebg_soc_data = {
  346. .pins = ebg_pins,
  347. .npins = ARRAY_SIZE(ebg_pins),
  348. .communities = ebg_communities,
  349. .ncommunities = ARRAY_SIZE(ebg_communities),
  350. };
  351. static const struct acpi_device_id ebg_pinctrl_acpi_match[] = {
  352. { "INTC1071", (kernel_ulong_t)&ebg_soc_data },
  353. { }
  354. };
  355. MODULE_DEVICE_TABLE(acpi, ebg_pinctrl_acpi_match);
  356. static INTEL_PINCTRL_PM_OPS(ebg_pinctrl_pm_ops);
  357. static struct platform_driver ebg_pinctrl_driver = {
  358. .probe = intel_pinctrl_probe_by_hid,
  359. .driver = {
  360. .name = "emmitsburg-pinctrl",
  361. .acpi_match_table = ebg_pinctrl_acpi_match,
  362. .pm = &ebg_pinctrl_pm_ops,
  363. },
  364. };
  365. module_platform_driver(ebg_pinctrl_driver);
  366. MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
  367. MODULE_DESCRIPTION("Intel Emmitsburg PCH pinctrl/GPIO driver");
  368. MODULE_LICENSE("GPL v2");