pinctrl-imx8qm.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016 Freescale Semiconductor, Inc.
  4. * Copyright 2017~2018 NXP
  5. * Dong Aisheng <aisheng.dong@nxp.com>
  6. */
  7. #include <dt-bindings/pinctrl/pads-imx8qm.h>
  8. #include <linux/err.h>
  9. #include <linux/firmware/imx/sci.h>
  10. #include <linux/init.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/pinctrl/pinctrl.h>
  14. #include <linux/platform_device.h>
  15. #include "pinctrl-imx.h"
  16. static const struct pinctrl_pin_desc imx8qm_pinctrl_pads[] = {
  17. IMX_PINCTRL_PIN(IMX8QM_SIM0_CLK),
  18. IMX_PINCTRL_PIN(IMX8QM_SIM0_RST),
  19. IMX_PINCTRL_PIN(IMX8QM_SIM0_IO),
  20. IMX_PINCTRL_PIN(IMX8QM_SIM0_PD),
  21. IMX_PINCTRL_PIN(IMX8QM_SIM0_POWER_EN),
  22. IMX_PINCTRL_PIN(IMX8QM_SIM0_GPIO0_00),
  23. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM),
  24. IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SCL),
  25. IMX_PINCTRL_PIN(IMX8QM_M40_I2C0_SDA),
  26. IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_00),
  27. IMX_PINCTRL_PIN(IMX8QM_M40_GPIO0_01),
  28. IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SCL),
  29. IMX_PINCTRL_PIN(IMX8QM_M41_I2C0_SDA),
  30. IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_00),
  31. IMX_PINCTRL_PIN(IMX8QM_M41_GPIO0_01),
  32. IMX_PINCTRL_PIN(IMX8QM_GPT0_CLK),
  33. IMX_PINCTRL_PIN(IMX8QM_GPT0_CAPTURE),
  34. IMX_PINCTRL_PIN(IMX8QM_GPT0_COMPARE),
  35. IMX_PINCTRL_PIN(IMX8QM_GPT1_CLK),
  36. IMX_PINCTRL_PIN(IMX8QM_GPT1_CAPTURE),
  37. IMX_PINCTRL_PIN(IMX8QM_GPT1_COMPARE),
  38. IMX_PINCTRL_PIN(IMX8QM_UART0_RX),
  39. IMX_PINCTRL_PIN(IMX8QM_UART0_TX),
  40. IMX_PINCTRL_PIN(IMX8QM_UART0_RTS_B),
  41. IMX_PINCTRL_PIN(IMX8QM_UART0_CTS_B),
  42. IMX_PINCTRL_PIN(IMX8QM_UART1_TX),
  43. IMX_PINCTRL_PIN(IMX8QM_UART1_RX),
  44. IMX_PINCTRL_PIN(IMX8QM_UART1_RTS_B),
  45. IMX_PINCTRL_PIN(IMX8QM_UART1_CTS_B),
  46. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH),
  47. IMX_PINCTRL_PIN(IMX8QM_SCU_PMIC_MEMC_ON),
  48. IMX_PINCTRL_PIN(IMX8QM_SCU_WDOG_OUT),
  49. IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SDA),
  50. IMX_PINCTRL_PIN(IMX8QM_PMIC_I2C_SCL),
  51. IMX_PINCTRL_PIN(IMX8QM_PMIC_EARLY_WARNING),
  52. IMX_PINCTRL_PIN(IMX8QM_PMIC_INT_B),
  53. IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_00),
  54. IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_01),
  55. IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_02),
  56. IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_03),
  57. IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_04),
  58. IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_05),
  59. IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_06),
  60. IMX_PINCTRL_PIN(IMX8QM_SCU_GPIO0_07),
  61. IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE0),
  62. IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE1),
  63. IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE2),
  64. IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE3),
  65. IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE4),
  66. IMX_PINCTRL_PIN(IMX8QM_SCU_BOOT_MODE5),
  67. IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO00),
  68. IMX_PINCTRL_PIN(IMX8QM_LVDS0_GPIO01),
  69. IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SCL),
  70. IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C0_SDA),
  71. IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SCL),
  72. IMX_PINCTRL_PIN(IMX8QM_LVDS0_I2C1_SDA),
  73. IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO00),
  74. IMX_PINCTRL_PIN(IMX8QM_LVDS1_GPIO01),
  75. IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SCL),
  76. IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C0_SDA),
  77. IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SCL),
  78. IMX_PINCTRL_PIN(IMX8QM_LVDS1_I2C1_SDA),
  79. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO),
  80. IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SCL),
  81. IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_I2C0_SDA),
  82. IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_00),
  83. IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI0_GPIO0_01),
  84. IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SCL),
  85. IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_I2C0_SDA),
  86. IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_00),
  87. IMX_PINCTRL_PIN(IMX8QM_MIPI_DSI1_GPIO0_01),
  88. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO),
  89. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_MCLK_OUT),
  90. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_I2C0_SCL),
  91. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_I2C0_SDA),
  92. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_GPIO0_00),
  93. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI0_GPIO0_01),
  94. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_MCLK_OUT),
  95. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_GPIO0_00),
  96. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_GPIO0_01),
  97. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_I2C0_SCL),
  98. IMX_PINCTRL_PIN(IMX8QM_MIPI_CSI1_I2C0_SDA),
  99. IMX_PINCTRL_PIN(IMX8QM_HDMI_TX0_TS_SCL),
  100. IMX_PINCTRL_PIN(IMX8QM_HDMI_TX0_TS_SDA),
  101. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO),
  102. IMX_PINCTRL_PIN(IMX8QM_ESAI1_FSR),
  103. IMX_PINCTRL_PIN(IMX8QM_ESAI1_FST),
  104. IMX_PINCTRL_PIN(IMX8QM_ESAI1_SCKR),
  105. IMX_PINCTRL_PIN(IMX8QM_ESAI1_SCKT),
  106. IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX0),
  107. IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX1),
  108. IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX2_RX3),
  109. IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX3_RX2),
  110. IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX4_RX1),
  111. IMX_PINCTRL_PIN(IMX8QM_ESAI1_TX5_RX0),
  112. IMX_PINCTRL_PIN(IMX8QM_SPDIF0_RX),
  113. IMX_PINCTRL_PIN(IMX8QM_SPDIF0_TX),
  114. IMX_PINCTRL_PIN(IMX8QM_SPDIF0_EXT_CLK),
  115. IMX_PINCTRL_PIN(IMX8QM_SPI3_SCK),
  116. IMX_PINCTRL_PIN(IMX8QM_SPI3_SDO),
  117. IMX_PINCTRL_PIN(IMX8QM_SPI3_SDI),
  118. IMX_PINCTRL_PIN(IMX8QM_SPI3_CS0),
  119. IMX_PINCTRL_PIN(IMX8QM_SPI3_CS1),
  120. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB),
  121. IMX_PINCTRL_PIN(IMX8QM_ESAI0_FSR),
  122. IMX_PINCTRL_PIN(IMX8QM_ESAI0_FST),
  123. IMX_PINCTRL_PIN(IMX8QM_ESAI0_SCKR),
  124. IMX_PINCTRL_PIN(IMX8QM_ESAI0_SCKT),
  125. IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX0),
  126. IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX1),
  127. IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX2_RX3),
  128. IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX3_RX2),
  129. IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX4_RX1),
  130. IMX_PINCTRL_PIN(IMX8QM_ESAI0_TX5_RX0),
  131. IMX_PINCTRL_PIN(IMX8QM_MCLK_IN0),
  132. IMX_PINCTRL_PIN(IMX8QM_MCLK_OUT0),
  133. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC),
  134. IMX_PINCTRL_PIN(IMX8QM_SPI0_SCK),
  135. IMX_PINCTRL_PIN(IMX8QM_SPI0_SDO),
  136. IMX_PINCTRL_PIN(IMX8QM_SPI0_SDI),
  137. IMX_PINCTRL_PIN(IMX8QM_SPI0_CS0),
  138. IMX_PINCTRL_PIN(IMX8QM_SPI0_CS1),
  139. IMX_PINCTRL_PIN(IMX8QM_SPI2_SCK),
  140. IMX_PINCTRL_PIN(IMX8QM_SPI2_SDO),
  141. IMX_PINCTRL_PIN(IMX8QM_SPI2_SDI),
  142. IMX_PINCTRL_PIN(IMX8QM_SPI2_CS0),
  143. IMX_PINCTRL_PIN(IMX8QM_SPI2_CS1),
  144. IMX_PINCTRL_PIN(IMX8QM_SAI1_RXC),
  145. IMX_PINCTRL_PIN(IMX8QM_SAI1_RXD),
  146. IMX_PINCTRL_PIN(IMX8QM_SAI1_RXFS),
  147. IMX_PINCTRL_PIN(IMX8QM_SAI1_TXC),
  148. IMX_PINCTRL_PIN(IMX8QM_SAI1_TXD),
  149. IMX_PINCTRL_PIN(IMX8QM_SAI1_TXFS),
  150. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT),
  151. IMX_PINCTRL_PIN(IMX8QM_ADC_IN7),
  152. IMX_PINCTRL_PIN(IMX8QM_ADC_IN6),
  153. IMX_PINCTRL_PIN(IMX8QM_ADC_IN5),
  154. IMX_PINCTRL_PIN(IMX8QM_ADC_IN4),
  155. IMX_PINCTRL_PIN(IMX8QM_ADC_IN3),
  156. IMX_PINCTRL_PIN(IMX8QM_ADC_IN2),
  157. IMX_PINCTRL_PIN(IMX8QM_ADC_IN1),
  158. IMX_PINCTRL_PIN(IMX8QM_ADC_IN0),
  159. IMX_PINCTRL_PIN(IMX8QM_MLB_SIG),
  160. IMX_PINCTRL_PIN(IMX8QM_MLB_CLK),
  161. IMX_PINCTRL_PIN(IMX8QM_MLB_DATA),
  162. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT),
  163. IMX_PINCTRL_PIN(IMX8QM_FLEXCAN0_RX),
  164. IMX_PINCTRL_PIN(IMX8QM_FLEXCAN0_TX),
  165. IMX_PINCTRL_PIN(IMX8QM_FLEXCAN1_RX),
  166. IMX_PINCTRL_PIN(IMX8QM_FLEXCAN1_TX),
  167. IMX_PINCTRL_PIN(IMX8QM_FLEXCAN2_RX),
  168. IMX_PINCTRL_PIN(IMX8QM_FLEXCAN2_TX),
  169. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR),
  170. IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC0),
  171. IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC1),
  172. IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC2),
  173. IMX_PINCTRL_PIN(IMX8QM_USB_SS3_TC3),
  174. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_3V3_USB3IO),
  175. IMX_PINCTRL_PIN(IMX8QM_USDHC1_RESET_B),
  176. IMX_PINCTRL_PIN(IMX8QM_USDHC1_VSELECT),
  177. IMX_PINCTRL_PIN(IMX8QM_USDHC2_RESET_B),
  178. IMX_PINCTRL_PIN(IMX8QM_USDHC2_VSELECT),
  179. IMX_PINCTRL_PIN(IMX8QM_USDHC2_WP),
  180. IMX_PINCTRL_PIN(IMX8QM_USDHC2_CD_B),
  181. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP),
  182. IMX_PINCTRL_PIN(IMX8QM_ENET0_MDIO),
  183. IMX_PINCTRL_PIN(IMX8QM_ENET0_MDC),
  184. IMX_PINCTRL_PIN(IMX8QM_ENET0_REFCLK_125M_25M),
  185. IMX_PINCTRL_PIN(IMX8QM_ENET1_REFCLK_125M_25M),
  186. IMX_PINCTRL_PIN(IMX8QM_ENET1_MDIO),
  187. IMX_PINCTRL_PIN(IMX8QM_ENET1_MDC),
  188. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT),
  189. IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SS0_B),
  190. IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SS1_B),
  191. IMX_PINCTRL_PIN(IMX8QM_QSPI1A_SCLK),
  192. IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DQS),
  193. IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA3),
  194. IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA2),
  195. IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA1),
  196. IMX_PINCTRL_PIN(IMX8QM_QSPI1A_DATA0),
  197. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1),
  198. IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA0),
  199. IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA1),
  200. IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA2),
  201. IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DATA3),
  202. IMX_PINCTRL_PIN(IMX8QM_QSPI0A_DQS),
  203. IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SS0_B),
  204. IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SS1_B),
  205. IMX_PINCTRL_PIN(IMX8QM_QSPI0A_SCLK),
  206. IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SCLK),
  207. IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA0),
  208. IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA1),
  209. IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA2),
  210. IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DATA3),
  211. IMX_PINCTRL_PIN(IMX8QM_QSPI0B_DQS),
  212. IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SS0_B),
  213. IMX_PINCTRL_PIN(IMX8QM_QSPI0B_SS1_B),
  214. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0),
  215. IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_CLKREQ_B),
  216. IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_WAKE_B),
  217. IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL0_PERST_B),
  218. IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_CLKREQ_B),
  219. IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_WAKE_B),
  220. IMX_PINCTRL_PIN(IMX8QM_PCIE_CTRL1_PERST_B),
  221. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP),
  222. IMX_PINCTRL_PIN(IMX8QM_USB_HSIC0_DATA),
  223. IMX_PINCTRL_PIN(IMX8QM_USB_HSIC0_STROBE),
  224. IMX_PINCTRL_PIN(IMX8QM_CALIBRATION_0_HSIC),
  225. IMX_PINCTRL_PIN(IMX8QM_CALIBRATION_1_HSIC),
  226. IMX_PINCTRL_PIN(IMX8QM_EMMC0_CLK),
  227. IMX_PINCTRL_PIN(IMX8QM_EMMC0_CMD),
  228. IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA0),
  229. IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA1),
  230. IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA2),
  231. IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA3),
  232. IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA4),
  233. IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA5),
  234. IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA6),
  235. IMX_PINCTRL_PIN(IMX8QM_EMMC0_DATA7),
  236. IMX_PINCTRL_PIN(IMX8QM_EMMC0_STROBE),
  237. IMX_PINCTRL_PIN(IMX8QM_EMMC0_RESET_B),
  238. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX),
  239. IMX_PINCTRL_PIN(IMX8QM_USDHC1_CLK),
  240. IMX_PINCTRL_PIN(IMX8QM_USDHC1_CMD),
  241. IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA0),
  242. IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA1),
  243. IMX_PINCTRL_PIN(IMX8QM_CTL_NAND_RE_P_N),
  244. IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA2),
  245. IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA3),
  246. IMX_PINCTRL_PIN(IMX8QM_CTL_NAND_DQS_P_N),
  247. IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA4),
  248. IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA5),
  249. IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA6),
  250. IMX_PINCTRL_PIN(IMX8QM_USDHC1_DATA7),
  251. IMX_PINCTRL_PIN(IMX8QM_USDHC1_STROBE),
  252. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2),
  253. IMX_PINCTRL_PIN(IMX8QM_USDHC2_CLK),
  254. IMX_PINCTRL_PIN(IMX8QM_USDHC2_CMD),
  255. IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA0),
  256. IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA1),
  257. IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA2),
  258. IMX_PINCTRL_PIN(IMX8QM_USDHC2_DATA3),
  259. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3),
  260. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXC),
  261. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TX_CTL),
  262. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD0),
  263. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD1),
  264. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD2),
  265. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_TXD3),
  266. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXC),
  267. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RX_CTL),
  268. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD0),
  269. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD1),
  270. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD2),
  271. IMX_PINCTRL_PIN(IMX8QM_ENET0_RGMII_RXD3),
  272. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB),
  273. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXC),
  274. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TX_CTL),
  275. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD0),
  276. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD1),
  277. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD2),
  278. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_TXD3),
  279. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXC),
  280. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RX_CTL),
  281. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD0),
  282. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD1),
  283. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD2),
  284. IMX_PINCTRL_PIN(IMX8QM_ENET1_RGMII_RXD3),
  285. IMX_PINCTRL_PIN(IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA),
  286. };
  287. static const struct imx_pinctrl_soc_info imx8qm_pinctrl_info = {
  288. .pins = imx8qm_pinctrl_pads,
  289. .npins = ARRAY_SIZE(imx8qm_pinctrl_pads),
  290. .flags = IMX_USE_SCU,
  291. .imx_pinconf_get = imx_pinconf_get_scu,
  292. .imx_pinconf_set = imx_pinconf_set_scu,
  293. .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu,
  294. };
  295. static const struct of_device_id imx8qm_pinctrl_of_match[] = {
  296. { .compatible = "fsl,imx8qm-iomuxc", },
  297. { /* sentinel */ }
  298. };
  299. MODULE_DEVICE_TABLE(of, imx8qm_pinctrl_of_match);
  300. static int imx8qm_pinctrl_probe(struct platform_device *pdev)
  301. {
  302. int ret;
  303. ret = imx_pinctrl_sc_ipc_init(pdev);
  304. if (ret)
  305. return ret;
  306. return imx_pinctrl_probe(pdev, &imx8qm_pinctrl_info);
  307. }
  308. static struct platform_driver imx8qm_pinctrl_driver = {
  309. .driver = {
  310. .name = "imx8qm-pinctrl",
  311. .of_match_table = of_match_ptr(imx8qm_pinctrl_of_match),
  312. .suppress_bind_attrs = true,
  313. },
  314. .probe = imx8qm_pinctrl_probe,
  315. };
  316. static int __init imx8qm_pinctrl_init(void)
  317. {
  318. return platform_driver_register(&imx8qm_pinctrl_driver);
  319. }
  320. arch_initcall(imx8qm_pinctrl_init);
  321. MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");
  322. MODULE_DESCRIPTION("NXP i.MX8QM pinctrl driver");
  323. MODULE_LICENSE("GPL v2");