pinctrl-imx7d.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Freescale imx7d pinctrl driver
  4. //
  5. // Author: Anson Huang <Anson.Huang@freescale.com>
  6. // Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
  7. #include <linux/err.h>
  8. #include <linux/init.h>
  9. #include <linux/io.h>
  10. #include <linux/of.h>
  11. #include <linux/of_device.h>
  12. #include <linux/pinctrl/pinctrl.h>
  13. #include "pinctrl-imx.h"
  14. enum imx7d_pads {
  15. MX7D_PAD_RESERVE0 = 0,
  16. MX7D_PAD_RESERVE1 = 1,
  17. MX7D_PAD_RESERVE2 = 2,
  18. MX7D_PAD_RESERVE3 = 3,
  19. MX7D_PAD_RESERVE4 = 4,
  20. MX7D_PAD_GPIO1_IO08 = 5,
  21. MX7D_PAD_GPIO1_IO09 = 6,
  22. MX7D_PAD_GPIO1_IO10 = 7,
  23. MX7D_PAD_GPIO1_IO11 = 8,
  24. MX7D_PAD_GPIO1_IO12 = 9,
  25. MX7D_PAD_GPIO1_IO13 = 10,
  26. MX7D_PAD_GPIO1_IO14 = 11,
  27. MX7D_PAD_GPIO1_IO15 = 12,
  28. MX7D_PAD_EPDC_DATA00 = 13,
  29. MX7D_PAD_EPDC_DATA01 = 14,
  30. MX7D_PAD_EPDC_DATA02 = 15,
  31. MX7D_PAD_EPDC_DATA03 = 16,
  32. MX7D_PAD_EPDC_DATA04 = 17,
  33. MX7D_PAD_EPDC_DATA05 = 18,
  34. MX7D_PAD_EPDC_DATA06 = 19,
  35. MX7D_PAD_EPDC_DATA07 = 20,
  36. MX7D_PAD_EPDC_DATA08 = 21,
  37. MX7D_PAD_EPDC_DATA09 = 22,
  38. MX7D_PAD_EPDC_DATA10 = 23,
  39. MX7D_PAD_EPDC_DATA11 = 24,
  40. MX7D_PAD_EPDC_DATA12 = 25,
  41. MX7D_PAD_EPDC_DATA13 = 26,
  42. MX7D_PAD_EPDC_DATA14 = 27,
  43. MX7D_PAD_EPDC_DATA15 = 28,
  44. MX7D_PAD_EPDC_SDCLK = 29,
  45. MX7D_PAD_EPDC_SDLE = 30,
  46. MX7D_PAD_EPDC_SDOE = 31,
  47. MX7D_PAD_EPDC_SDSHR = 32,
  48. MX7D_PAD_EPDC_SDCE0 = 33,
  49. MX7D_PAD_EPDC_SDCE1 = 34,
  50. MX7D_PAD_EPDC_SDCE2 = 35,
  51. MX7D_PAD_EPDC_SDCE3 = 36,
  52. MX7D_PAD_EPDC_GDCLK = 37,
  53. MX7D_PAD_EPDC_GDOE = 38,
  54. MX7D_PAD_EPDC_GDRL = 39,
  55. MX7D_PAD_EPDC_GDSP = 40,
  56. MX7D_PAD_EPDC_BDR0 = 41,
  57. MX7D_PAD_EPDC_BDR1 = 42,
  58. MX7D_PAD_EPDC_PWR_COM = 43,
  59. MX7D_PAD_EPDC_PWR_STAT = 44,
  60. MX7D_PAD_LCD_CLK = 45,
  61. MX7D_PAD_LCD_ENABLE = 46,
  62. MX7D_PAD_LCD_HSYNC = 47,
  63. MX7D_PAD_LCD_VSYNC = 48,
  64. MX7D_PAD_LCD_RESET = 49,
  65. MX7D_PAD_LCD_DATA00 = 50,
  66. MX7D_PAD_LCD_DATA01 = 51,
  67. MX7D_PAD_LCD_DATA02 = 52,
  68. MX7D_PAD_LCD_DATA03 = 53,
  69. MX7D_PAD_LCD_DATA04 = 54,
  70. MX7D_PAD_LCD_DATA05 = 55,
  71. MX7D_PAD_LCD_DATA06 = 56,
  72. MX7D_PAD_LCD_DATA07 = 57,
  73. MX7D_PAD_LCD_DATA08 = 58,
  74. MX7D_PAD_LCD_DATA09 = 59,
  75. MX7D_PAD_LCD_DATA10 = 60,
  76. MX7D_PAD_LCD_DATA11 = 61,
  77. MX7D_PAD_LCD_DATA12 = 62,
  78. MX7D_PAD_LCD_DATA13 = 63,
  79. MX7D_PAD_LCD_DATA14 = 64,
  80. MX7D_PAD_LCD_DATA15 = 65,
  81. MX7D_PAD_LCD_DATA16 = 66,
  82. MX7D_PAD_LCD_DATA17 = 67,
  83. MX7D_PAD_LCD_DATA18 = 68,
  84. MX7D_PAD_LCD_DATA19 = 69,
  85. MX7D_PAD_LCD_DATA20 = 70,
  86. MX7D_PAD_LCD_DATA21 = 71,
  87. MX7D_PAD_LCD_DATA22 = 72,
  88. MX7D_PAD_LCD_DATA23 = 73,
  89. MX7D_PAD_UART1_RX_DATA = 74,
  90. MX7D_PAD_UART1_TX_DATA = 75,
  91. MX7D_PAD_UART2_RX_DATA = 76,
  92. MX7D_PAD_UART2_TX_DATA = 77,
  93. MX7D_PAD_UART3_RX_DATA = 78,
  94. MX7D_PAD_UART3_TX_DATA = 79,
  95. MX7D_PAD_UART3_RTS_B = 80,
  96. MX7D_PAD_UART3_CTS_B = 81,
  97. MX7D_PAD_I2C1_SCL = 82,
  98. MX7D_PAD_I2C1_SDA = 83,
  99. MX7D_PAD_I2C2_SCL = 84,
  100. MX7D_PAD_I2C2_SDA = 85,
  101. MX7D_PAD_I2C3_SCL = 86,
  102. MX7D_PAD_I2C3_SDA = 87,
  103. MX7D_PAD_I2C4_SCL = 88,
  104. MX7D_PAD_I2C4_SDA = 89,
  105. MX7D_PAD_ECSPI1_SCLK = 90,
  106. MX7D_PAD_ECSPI1_MOSI = 91,
  107. MX7D_PAD_ECSPI1_MISO = 92,
  108. MX7D_PAD_ECSPI1_SS0 = 93,
  109. MX7D_PAD_ECSPI2_SCLK = 94,
  110. MX7D_PAD_ECSPI2_MOSI = 95,
  111. MX7D_PAD_ECSPI2_MISO = 96,
  112. MX7D_PAD_ECSPI2_SS0 = 97,
  113. MX7D_PAD_SD1_CD_B = 98,
  114. MX7D_PAD_SD1_WP = 99,
  115. MX7D_PAD_SD1_RESET_B = 100,
  116. MX7D_PAD_SD1_CLK = 101,
  117. MX7D_PAD_SD1_CMD = 102,
  118. MX7D_PAD_SD1_DATA0 = 103,
  119. MX7D_PAD_SD1_DATA1 = 104,
  120. MX7D_PAD_SD1_DATA2 = 105,
  121. MX7D_PAD_SD1_DATA3 = 106,
  122. MX7D_PAD_SD2_CD_B = 107,
  123. MX7D_PAD_SD2_WP = 108,
  124. MX7D_PAD_SD2_RESET_B = 109,
  125. MX7D_PAD_SD2_CLK = 110,
  126. MX7D_PAD_SD2_CMD = 111,
  127. MX7D_PAD_SD2_DATA0 = 112,
  128. MX7D_PAD_SD2_DATA1 = 113,
  129. MX7D_PAD_SD2_DATA2 = 114,
  130. MX7D_PAD_SD2_DATA3 = 115,
  131. MX7D_PAD_SD3_CLK = 116,
  132. MX7D_PAD_SD3_CMD = 117,
  133. MX7D_PAD_SD3_DATA0 = 118,
  134. MX7D_PAD_SD3_DATA1 = 119,
  135. MX7D_PAD_SD3_DATA2 = 120,
  136. MX7D_PAD_SD3_DATA3 = 121,
  137. MX7D_PAD_SD3_DATA4 = 122,
  138. MX7D_PAD_SD3_DATA5 = 123,
  139. MX7D_PAD_SD3_DATA6 = 124,
  140. MX7D_PAD_SD3_DATA7 = 125,
  141. MX7D_PAD_SD3_STROBE = 126,
  142. MX7D_PAD_SD3_RESET_B = 127,
  143. MX7D_PAD_SAI1_RX_DATA = 128,
  144. MX7D_PAD_SAI1_TX_BCLK = 129,
  145. MX7D_PAD_SAI1_TX_SYNC = 130,
  146. MX7D_PAD_SAI1_TX_DATA = 131,
  147. MX7D_PAD_SAI1_RX_SYNC = 132,
  148. MX7D_PAD_SAI1_RX_BCLK = 133,
  149. MX7D_PAD_SAI1_MCLK = 134,
  150. MX7D_PAD_SAI2_TX_SYNC = 135,
  151. MX7D_PAD_SAI2_TX_BCLK = 136,
  152. MX7D_PAD_SAI2_RX_DATA = 137,
  153. MX7D_PAD_SAI2_TX_DATA = 138,
  154. MX7D_PAD_ENET1_RGMII_RD0 = 139,
  155. MX7D_PAD_ENET1_RGMII_RD1 = 140,
  156. MX7D_PAD_ENET1_RGMII_RD2 = 141,
  157. MX7D_PAD_ENET1_RGMII_RD3 = 142,
  158. MX7D_PAD_ENET1_RGMII_RX_CTL = 143,
  159. MX7D_PAD_ENET1_RGMII_RXC = 144,
  160. MX7D_PAD_ENET1_RGMII_TD0 = 145,
  161. MX7D_PAD_ENET1_RGMII_TD1 = 146,
  162. MX7D_PAD_ENET1_RGMII_TD2 = 147,
  163. MX7D_PAD_ENET1_RGMII_TD3 = 148,
  164. MX7D_PAD_ENET1_RGMII_TX_CTL = 149,
  165. MX7D_PAD_ENET1_RGMII_TXC = 150,
  166. MX7D_PAD_ENET1_TX_CLK = 151,
  167. MX7D_PAD_ENET1_RX_CLK = 152,
  168. MX7D_PAD_ENET1_CRS = 153,
  169. MX7D_PAD_ENET1_COL = 154,
  170. };
  171. enum imx7d_lpsr_pads {
  172. MX7D_PAD_GPIO1_IO00 = 0,
  173. MX7D_PAD_GPIO1_IO01 = 1,
  174. MX7D_PAD_GPIO1_IO02 = 2,
  175. MX7D_PAD_GPIO1_IO03 = 3,
  176. MX7D_PAD_GPIO1_IO04 = 4,
  177. MX7D_PAD_GPIO1_IO05 = 5,
  178. MX7D_PAD_GPIO1_IO06 = 6,
  179. MX7D_PAD_GPIO1_IO07 = 7,
  180. };
  181. /* Pad names for the pinmux subsystem */
  182. static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = {
  183. IMX_PINCTRL_PIN(MX7D_PAD_RESERVE0),
  184. IMX_PINCTRL_PIN(MX7D_PAD_RESERVE1),
  185. IMX_PINCTRL_PIN(MX7D_PAD_RESERVE2),
  186. IMX_PINCTRL_PIN(MX7D_PAD_RESERVE3),
  187. IMX_PINCTRL_PIN(MX7D_PAD_RESERVE4),
  188. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO08),
  189. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO09),
  190. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO10),
  191. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO11),
  192. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO12),
  193. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO13),
  194. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO14),
  195. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO15),
  196. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA00),
  197. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA01),
  198. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA02),
  199. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA03),
  200. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA04),
  201. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA05),
  202. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA06),
  203. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA07),
  204. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA08),
  205. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA09),
  206. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA10),
  207. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA11),
  208. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA12),
  209. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA13),
  210. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA14),
  211. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA15),
  212. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCLK),
  213. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDLE),
  214. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDOE),
  215. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDSHR),
  216. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE0),
  217. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE1),
  218. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE2),
  219. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE3),
  220. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDCLK),
  221. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDOE),
  222. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDRL),
  223. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDSP),
  224. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR0),
  225. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR1),
  226. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_COM),
  227. IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_STAT),
  228. IMX_PINCTRL_PIN(MX7D_PAD_LCD_CLK),
  229. IMX_PINCTRL_PIN(MX7D_PAD_LCD_ENABLE),
  230. IMX_PINCTRL_PIN(MX7D_PAD_LCD_HSYNC),
  231. IMX_PINCTRL_PIN(MX7D_PAD_LCD_VSYNC),
  232. IMX_PINCTRL_PIN(MX7D_PAD_LCD_RESET),
  233. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA00),
  234. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA01),
  235. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA02),
  236. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA03),
  237. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA04),
  238. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA05),
  239. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA06),
  240. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA07),
  241. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA08),
  242. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA09),
  243. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA10),
  244. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA11),
  245. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA12),
  246. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA13),
  247. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA14),
  248. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA15),
  249. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA16),
  250. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA17),
  251. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA18),
  252. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA19),
  253. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA20),
  254. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA21),
  255. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA22),
  256. IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA23),
  257. IMX_PINCTRL_PIN(MX7D_PAD_UART1_RX_DATA),
  258. IMX_PINCTRL_PIN(MX7D_PAD_UART1_TX_DATA),
  259. IMX_PINCTRL_PIN(MX7D_PAD_UART2_RX_DATA),
  260. IMX_PINCTRL_PIN(MX7D_PAD_UART2_TX_DATA),
  261. IMX_PINCTRL_PIN(MX7D_PAD_UART3_RX_DATA),
  262. IMX_PINCTRL_PIN(MX7D_PAD_UART3_TX_DATA),
  263. IMX_PINCTRL_PIN(MX7D_PAD_UART3_RTS_B),
  264. IMX_PINCTRL_PIN(MX7D_PAD_UART3_CTS_B),
  265. IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SCL),
  266. IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SDA),
  267. IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SCL),
  268. IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SDA),
  269. IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SCL),
  270. IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SDA),
  271. IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SCL),
  272. IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SDA),
  273. IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SCLK),
  274. IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MOSI),
  275. IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MISO),
  276. IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SS0),
  277. IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SCLK),
  278. IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MOSI),
  279. IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MISO),
  280. IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SS0),
  281. IMX_PINCTRL_PIN(MX7D_PAD_SD1_CD_B),
  282. IMX_PINCTRL_PIN(MX7D_PAD_SD1_WP),
  283. IMX_PINCTRL_PIN(MX7D_PAD_SD1_RESET_B),
  284. IMX_PINCTRL_PIN(MX7D_PAD_SD1_CLK),
  285. IMX_PINCTRL_PIN(MX7D_PAD_SD1_CMD),
  286. IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA0),
  287. IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA1),
  288. IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA2),
  289. IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA3),
  290. IMX_PINCTRL_PIN(MX7D_PAD_SD2_CD_B),
  291. IMX_PINCTRL_PIN(MX7D_PAD_SD2_WP),
  292. IMX_PINCTRL_PIN(MX7D_PAD_SD2_RESET_B),
  293. IMX_PINCTRL_PIN(MX7D_PAD_SD2_CLK),
  294. IMX_PINCTRL_PIN(MX7D_PAD_SD2_CMD),
  295. IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA0),
  296. IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA1),
  297. IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA2),
  298. IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA3),
  299. IMX_PINCTRL_PIN(MX7D_PAD_SD3_CLK),
  300. IMX_PINCTRL_PIN(MX7D_PAD_SD3_CMD),
  301. IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA0),
  302. IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA1),
  303. IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA2),
  304. IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA3),
  305. IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA4),
  306. IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA5),
  307. IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA6),
  308. IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA7),
  309. IMX_PINCTRL_PIN(MX7D_PAD_SD3_STROBE),
  310. IMX_PINCTRL_PIN(MX7D_PAD_SD3_RESET_B),
  311. IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_DATA),
  312. IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_BCLK),
  313. IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_SYNC),
  314. IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_DATA),
  315. IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_SYNC),
  316. IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_BCLK),
  317. IMX_PINCTRL_PIN(MX7D_PAD_SAI1_MCLK),
  318. IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_SYNC),
  319. IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_BCLK),
  320. IMX_PINCTRL_PIN(MX7D_PAD_SAI2_RX_DATA),
  321. IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_DATA),
  322. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD0),
  323. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD1),
  324. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD2),
  325. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD3),
  326. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RX_CTL),
  327. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RXC),
  328. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD0),
  329. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD1),
  330. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD2),
  331. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD3),
  332. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TX_CTL),
  333. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TXC),
  334. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_TX_CLK),
  335. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RX_CLK),
  336. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_CRS),
  337. IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL),
  338. };
  339. /* Pad names for the pinmux subsystem */
  340. static const struct pinctrl_pin_desc imx7d_lpsr_pinctrl_pads[] = {
  341. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO00),
  342. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO01),
  343. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO02),
  344. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO03),
  345. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO04),
  346. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO05),
  347. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO06),
  348. IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO07),
  349. };
  350. static const struct imx_pinctrl_soc_info imx7d_pinctrl_info = {
  351. .pins = imx7d_pinctrl_pads,
  352. .npins = ARRAY_SIZE(imx7d_pinctrl_pads),
  353. .gpr_compatible = "fsl,imx7d-iomuxc-gpr",
  354. };
  355. static const struct imx_pinctrl_soc_info imx7d_lpsr_pinctrl_info = {
  356. .pins = imx7d_lpsr_pinctrl_pads,
  357. .npins = ARRAY_SIZE(imx7d_lpsr_pinctrl_pads),
  358. .flags = ZERO_OFFSET_VALID,
  359. };
  360. static const struct of_device_id imx7d_pinctrl_of_match[] = {
  361. { .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, },
  362. { .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info },
  363. { /* sentinel */ }
  364. };
  365. static int imx7d_pinctrl_probe(struct platform_device *pdev)
  366. {
  367. const struct imx_pinctrl_soc_info *pinctrl_info;
  368. pinctrl_info = of_device_get_match_data(&pdev->dev);
  369. if (!pinctrl_info)
  370. return -ENODEV;
  371. return imx_pinctrl_probe(pdev, pinctrl_info);
  372. }
  373. static struct platform_driver imx7d_pinctrl_driver = {
  374. .driver = {
  375. .name = "imx7d-pinctrl",
  376. .of_match_table = of_match_ptr(imx7d_pinctrl_of_match),
  377. },
  378. .probe = imx7d_pinctrl_probe,
  379. };
  380. static int __init imx7d_pinctrl_init(void)
  381. {
  382. return platform_driver_register(&imx7d_pinctrl_driver);
  383. }
  384. arch_initcall(imx7d_pinctrl_init);