pinctrl-imx27.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408
  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // imx27 pinctrl driver based on imx pinmux core
  4. //
  5. // Copyright (C) 2013 Pengutronix
  6. //
  7. // Author: Markus Pargmann <mpa@pengutronix.de>
  8. #include <linux/err.h>
  9. #include <linux/init.h>
  10. #include <linux/io.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/pinctrl/pinctrl.h>
  14. #include "pinctrl-imx1.h"
  15. #define PAD_ID(port, pin) (port*32 + pin)
  16. #define PA 0
  17. #define PB 1
  18. #define PC 2
  19. #define PD 3
  20. #define PE 4
  21. #define PF 5
  22. enum imx27_pads {
  23. MX27_PAD_USBH2_CLK = PAD_ID(PA, 0),
  24. MX27_PAD_USBH2_DIR = PAD_ID(PA, 1),
  25. MX27_PAD_USBH2_DATA7 = PAD_ID(PA, 2),
  26. MX27_PAD_USBH2_NXT = PAD_ID(PA, 3),
  27. MX27_PAD_USBH2_STP = PAD_ID(PA, 4),
  28. MX27_PAD_LSCLK = PAD_ID(PA, 5),
  29. MX27_PAD_LD0 = PAD_ID(PA, 6),
  30. MX27_PAD_LD1 = PAD_ID(PA, 7),
  31. MX27_PAD_LD2 = PAD_ID(PA, 8),
  32. MX27_PAD_LD3 = PAD_ID(PA, 9),
  33. MX27_PAD_LD4 = PAD_ID(PA, 10),
  34. MX27_PAD_LD5 = PAD_ID(PA, 11),
  35. MX27_PAD_LD6 = PAD_ID(PA, 12),
  36. MX27_PAD_LD7 = PAD_ID(PA, 13),
  37. MX27_PAD_LD8 = PAD_ID(PA, 14),
  38. MX27_PAD_LD9 = PAD_ID(PA, 15),
  39. MX27_PAD_LD10 = PAD_ID(PA, 16),
  40. MX27_PAD_LD11 = PAD_ID(PA, 17),
  41. MX27_PAD_LD12 = PAD_ID(PA, 18),
  42. MX27_PAD_LD13 = PAD_ID(PA, 19),
  43. MX27_PAD_LD14 = PAD_ID(PA, 20),
  44. MX27_PAD_LD15 = PAD_ID(PA, 21),
  45. MX27_PAD_LD16 = PAD_ID(PA, 22),
  46. MX27_PAD_LD17 = PAD_ID(PA, 23),
  47. MX27_PAD_REV = PAD_ID(PA, 24),
  48. MX27_PAD_CLS = PAD_ID(PA, 25),
  49. MX27_PAD_PS = PAD_ID(PA, 26),
  50. MX27_PAD_SPL_SPR = PAD_ID(PA, 27),
  51. MX27_PAD_HSYNC = PAD_ID(PA, 28),
  52. MX27_PAD_VSYNC = PAD_ID(PA, 29),
  53. MX27_PAD_CONTRAST = PAD_ID(PA, 30),
  54. MX27_PAD_OE_ACD = PAD_ID(PA, 31),
  55. MX27_PAD_SD2_D0 = PAD_ID(PB, 4),
  56. MX27_PAD_SD2_D1 = PAD_ID(PB, 5),
  57. MX27_PAD_SD2_D2 = PAD_ID(PB, 6),
  58. MX27_PAD_SD2_D3 = PAD_ID(PB, 7),
  59. MX27_PAD_SD2_CMD = PAD_ID(PB, 8),
  60. MX27_PAD_SD2_CLK = PAD_ID(PB, 9),
  61. MX27_PAD_CSI_D0 = PAD_ID(PB, 10),
  62. MX27_PAD_CSI_D1 = PAD_ID(PB, 11),
  63. MX27_PAD_CSI_D2 = PAD_ID(PB, 12),
  64. MX27_PAD_CSI_D3 = PAD_ID(PB, 13),
  65. MX27_PAD_CSI_D4 = PAD_ID(PB, 14),
  66. MX27_PAD_CSI_MCLK = PAD_ID(PB, 15),
  67. MX27_PAD_CSI_PIXCLK = PAD_ID(PB, 16),
  68. MX27_PAD_CSI_D5 = PAD_ID(PB, 17),
  69. MX27_PAD_CSI_D6 = PAD_ID(PB, 18),
  70. MX27_PAD_CSI_D7 = PAD_ID(PB, 19),
  71. MX27_PAD_CSI_VSYNC = PAD_ID(PB, 20),
  72. MX27_PAD_CSI_HSYNC = PAD_ID(PB, 21),
  73. MX27_PAD_USBH1_SUSP = PAD_ID(PB, 22),
  74. MX27_PAD_USB_PWR = PAD_ID(PB, 23),
  75. MX27_PAD_USB_OC_B = PAD_ID(PB, 24),
  76. MX27_PAD_USBH1_RCV = PAD_ID(PB, 25),
  77. MX27_PAD_USBH1_FS = PAD_ID(PB, 26),
  78. MX27_PAD_USBH1_OE_B = PAD_ID(PB, 27),
  79. MX27_PAD_USBH1_TXDM = PAD_ID(PB, 28),
  80. MX27_PAD_USBH1_TXDP = PAD_ID(PB, 29),
  81. MX27_PAD_USBH1_RXDM = PAD_ID(PB, 30),
  82. MX27_PAD_USBH1_RXDP = PAD_ID(PB, 31),
  83. MX27_PAD_I2C2_SDA = PAD_ID(PC, 5),
  84. MX27_PAD_I2C2_SCL = PAD_ID(PC, 6),
  85. MX27_PAD_USBOTG_DATA5 = PAD_ID(PC, 7),
  86. MX27_PAD_USBOTG_DATA6 = PAD_ID(PC, 8),
  87. MX27_PAD_USBOTG_DATA0 = PAD_ID(PC, 9),
  88. MX27_PAD_USBOTG_DATA2 = PAD_ID(PC, 10),
  89. MX27_PAD_USBOTG_DATA1 = PAD_ID(PC, 11),
  90. MX27_PAD_USBOTG_DATA4 = PAD_ID(PC, 12),
  91. MX27_PAD_USBOTG_DATA3 = PAD_ID(PC, 13),
  92. MX27_PAD_TOUT = PAD_ID(PC, 14),
  93. MX27_PAD_TIN = PAD_ID(PC, 15),
  94. MX27_PAD_SSI4_FS = PAD_ID(PC, 16),
  95. MX27_PAD_SSI4_RXDAT = PAD_ID(PC, 17),
  96. MX27_PAD_SSI4_TXDAT = PAD_ID(PC, 18),
  97. MX27_PAD_SSI4_CLK = PAD_ID(PC, 19),
  98. MX27_PAD_SSI1_FS = PAD_ID(PC, 20),
  99. MX27_PAD_SSI1_RXDAT = PAD_ID(PC, 21),
  100. MX27_PAD_SSI1_TXDAT = PAD_ID(PC, 22),
  101. MX27_PAD_SSI1_CLK = PAD_ID(PC, 23),
  102. MX27_PAD_SSI2_FS = PAD_ID(PC, 24),
  103. MX27_PAD_SSI2_RXDAT = PAD_ID(PC, 25),
  104. MX27_PAD_SSI2_TXDAT = PAD_ID(PC, 26),
  105. MX27_PAD_SSI2_CLK = PAD_ID(PC, 27),
  106. MX27_PAD_SSI3_FS = PAD_ID(PC, 28),
  107. MX27_PAD_SSI3_RXDAT = PAD_ID(PC, 29),
  108. MX27_PAD_SSI3_TXDAT = PAD_ID(PC, 30),
  109. MX27_PAD_SSI3_CLK = PAD_ID(PC, 31),
  110. MX27_PAD_SD3_CMD = PAD_ID(PD, 0),
  111. MX27_PAD_SD3_CLK = PAD_ID(PD, 1),
  112. MX27_PAD_ATA_DATA0 = PAD_ID(PD, 2),
  113. MX27_PAD_ATA_DATA1 = PAD_ID(PD, 3),
  114. MX27_PAD_ATA_DATA2 = PAD_ID(PD, 4),
  115. MX27_PAD_ATA_DATA3 = PAD_ID(PD, 5),
  116. MX27_PAD_ATA_DATA4 = PAD_ID(PD, 6),
  117. MX27_PAD_ATA_DATA5 = PAD_ID(PD, 7),
  118. MX27_PAD_ATA_DATA6 = PAD_ID(PD, 8),
  119. MX27_PAD_ATA_DATA7 = PAD_ID(PD, 9),
  120. MX27_PAD_ATA_DATA8 = PAD_ID(PD, 10),
  121. MX27_PAD_ATA_DATA9 = PAD_ID(PD, 11),
  122. MX27_PAD_ATA_DATA10 = PAD_ID(PD, 12),
  123. MX27_PAD_ATA_DATA11 = PAD_ID(PD, 13),
  124. MX27_PAD_ATA_DATA12 = PAD_ID(PD, 14),
  125. MX27_PAD_ATA_DATA13 = PAD_ID(PD, 15),
  126. MX27_PAD_ATA_DATA14 = PAD_ID(PD, 16),
  127. MX27_PAD_I2C_DATA = PAD_ID(PD, 17),
  128. MX27_PAD_I2C_CLK = PAD_ID(PD, 18),
  129. MX27_PAD_CSPI2_SS2 = PAD_ID(PD, 19),
  130. MX27_PAD_CSPI2_SS1 = PAD_ID(PD, 20),
  131. MX27_PAD_CSPI2_SS0 = PAD_ID(PD, 21),
  132. MX27_PAD_CSPI2_SCLK = PAD_ID(PD, 22),
  133. MX27_PAD_CSPI2_MISO = PAD_ID(PD, 23),
  134. MX27_PAD_CSPI2_MOSI = PAD_ID(PD, 24),
  135. MX27_PAD_CSPI1_RDY = PAD_ID(PD, 25),
  136. MX27_PAD_CSPI1_SS2 = PAD_ID(PD, 26),
  137. MX27_PAD_CSPI1_SS1 = PAD_ID(PD, 27),
  138. MX27_PAD_CSPI1_SS0 = PAD_ID(PD, 28),
  139. MX27_PAD_CSPI1_SCLK = PAD_ID(PD, 29),
  140. MX27_PAD_CSPI1_MISO = PAD_ID(PD, 30),
  141. MX27_PAD_CSPI1_MOSI = PAD_ID(PD, 31),
  142. MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0),
  143. MX27_PAD_USBOTG_STP = PAD_ID(PE, 1),
  144. MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2),
  145. MX27_PAD_UART2_CTS = PAD_ID(PE, 3),
  146. MX27_PAD_UART2_RTS = PAD_ID(PE, 4),
  147. MX27_PAD_PWMO = PAD_ID(PE, 5),
  148. MX27_PAD_UART2_TXD = PAD_ID(PE, 6),
  149. MX27_PAD_UART2_RXD = PAD_ID(PE, 7),
  150. MX27_PAD_UART3_TXD = PAD_ID(PE, 8),
  151. MX27_PAD_UART3_RXD = PAD_ID(PE, 9),
  152. MX27_PAD_UART3_CTS = PAD_ID(PE, 10),
  153. MX27_PAD_UART3_RTS = PAD_ID(PE, 11),
  154. MX27_PAD_UART1_TXD = PAD_ID(PE, 12),
  155. MX27_PAD_UART1_RXD = PAD_ID(PE, 13),
  156. MX27_PAD_UART1_CTS = PAD_ID(PE, 14),
  157. MX27_PAD_UART1_RTS = PAD_ID(PE, 15),
  158. MX27_PAD_RTCK = PAD_ID(PE, 16),
  159. MX27_PAD_RESET_OUT_B = PAD_ID(PE, 17),
  160. MX27_PAD_SD1_D0 = PAD_ID(PE, 18),
  161. MX27_PAD_SD1_D1 = PAD_ID(PE, 19),
  162. MX27_PAD_SD1_D2 = PAD_ID(PE, 20),
  163. MX27_PAD_SD1_D3 = PAD_ID(PE, 21),
  164. MX27_PAD_SD1_CMD = PAD_ID(PE, 22),
  165. MX27_PAD_SD1_CLK = PAD_ID(PE, 23),
  166. MX27_PAD_USBOTG_CLK = PAD_ID(PE, 24),
  167. MX27_PAD_USBOTG_DATA7 = PAD_ID(PE, 25),
  168. MX27_PAD_NFRB = PAD_ID(PF, 0),
  169. MX27_PAD_NFCLE = PAD_ID(PF, 1),
  170. MX27_PAD_NFWP_B = PAD_ID(PF, 2),
  171. MX27_PAD_NFCE_B = PAD_ID(PF, 3),
  172. MX27_PAD_NFALE = PAD_ID(PF, 4),
  173. MX27_PAD_NFRE_B = PAD_ID(PF, 5),
  174. MX27_PAD_NFWE_B = PAD_ID(PF, 6),
  175. MX27_PAD_PC_POE = PAD_ID(PF, 7),
  176. MX27_PAD_PC_RW_B = PAD_ID(PF, 8),
  177. MX27_PAD_IOIS16 = PAD_ID(PF, 9),
  178. MX27_PAD_PC_RST = PAD_ID(PF, 10),
  179. MX27_PAD_PC_BVD2 = PAD_ID(PF, 11),
  180. MX27_PAD_PC_BVD1 = PAD_ID(PF, 12),
  181. MX27_PAD_PC_VS2 = PAD_ID(PF, 13),
  182. MX27_PAD_PC_VS1 = PAD_ID(PF, 14),
  183. MX27_PAD_CLKO = PAD_ID(PF, 15),
  184. MX27_PAD_PC_PWRON = PAD_ID(PF, 16),
  185. MX27_PAD_PC_READY = PAD_ID(PF, 17),
  186. MX27_PAD_PC_WAIT_B = PAD_ID(PF, 18),
  187. MX27_PAD_PC_CD2_B = PAD_ID(PF, 19),
  188. MX27_PAD_PC_CD1_B = PAD_ID(PF, 20),
  189. MX27_PAD_CS4_B = PAD_ID(PF, 21),
  190. MX27_PAD_CS5_B = PAD_ID(PF, 22),
  191. MX27_PAD_ATA_DATA15 = PAD_ID(PF, 23),
  192. };
  193. /* Pad names for the pinmux subsystem */
  194. static const struct pinctrl_pin_desc imx27_pinctrl_pads[] = {
  195. IMX_PINCTRL_PIN(MX27_PAD_USBH2_CLK),
  196. IMX_PINCTRL_PIN(MX27_PAD_USBH2_DIR),
  197. IMX_PINCTRL_PIN(MX27_PAD_USBH2_DATA7),
  198. IMX_PINCTRL_PIN(MX27_PAD_USBH2_NXT),
  199. IMX_PINCTRL_PIN(MX27_PAD_USBH2_STP),
  200. IMX_PINCTRL_PIN(MX27_PAD_LSCLK),
  201. IMX_PINCTRL_PIN(MX27_PAD_LD0),
  202. IMX_PINCTRL_PIN(MX27_PAD_LD1),
  203. IMX_PINCTRL_PIN(MX27_PAD_LD2),
  204. IMX_PINCTRL_PIN(MX27_PAD_LD3),
  205. IMX_PINCTRL_PIN(MX27_PAD_LD4),
  206. IMX_PINCTRL_PIN(MX27_PAD_LD5),
  207. IMX_PINCTRL_PIN(MX27_PAD_LD6),
  208. IMX_PINCTRL_PIN(MX27_PAD_LD7),
  209. IMX_PINCTRL_PIN(MX27_PAD_LD8),
  210. IMX_PINCTRL_PIN(MX27_PAD_LD9),
  211. IMX_PINCTRL_PIN(MX27_PAD_LD10),
  212. IMX_PINCTRL_PIN(MX27_PAD_LD11),
  213. IMX_PINCTRL_PIN(MX27_PAD_LD12),
  214. IMX_PINCTRL_PIN(MX27_PAD_LD13),
  215. IMX_PINCTRL_PIN(MX27_PAD_LD14),
  216. IMX_PINCTRL_PIN(MX27_PAD_LD15),
  217. IMX_PINCTRL_PIN(MX27_PAD_LD16),
  218. IMX_PINCTRL_PIN(MX27_PAD_LD17),
  219. IMX_PINCTRL_PIN(MX27_PAD_REV),
  220. IMX_PINCTRL_PIN(MX27_PAD_CLS),
  221. IMX_PINCTRL_PIN(MX27_PAD_PS),
  222. IMX_PINCTRL_PIN(MX27_PAD_SPL_SPR),
  223. IMX_PINCTRL_PIN(MX27_PAD_HSYNC),
  224. IMX_PINCTRL_PIN(MX27_PAD_VSYNC),
  225. IMX_PINCTRL_PIN(MX27_PAD_CONTRAST),
  226. IMX_PINCTRL_PIN(MX27_PAD_OE_ACD),
  227. IMX_PINCTRL_PIN(MX27_PAD_SD2_D0),
  228. IMX_PINCTRL_PIN(MX27_PAD_SD2_D1),
  229. IMX_PINCTRL_PIN(MX27_PAD_SD2_D2),
  230. IMX_PINCTRL_PIN(MX27_PAD_SD2_D3),
  231. IMX_PINCTRL_PIN(MX27_PAD_SD2_CMD),
  232. IMX_PINCTRL_PIN(MX27_PAD_SD2_CLK),
  233. IMX_PINCTRL_PIN(MX27_PAD_CSI_D0),
  234. IMX_PINCTRL_PIN(MX27_PAD_CSI_D1),
  235. IMX_PINCTRL_PIN(MX27_PAD_CSI_D2),
  236. IMX_PINCTRL_PIN(MX27_PAD_CSI_D3),
  237. IMX_PINCTRL_PIN(MX27_PAD_CSI_D4),
  238. IMX_PINCTRL_PIN(MX27_PAD_CSI_MCLK),
  239. IMX_PINCTRL_PIN(MX27_PAD_CSI_PIXCLK),
  240. IMX_PINCTRL_PIN(MX27_PAD_CSI_D5),
  241. IMX_PINCTRL_PIN(MX27_PAD_CSI_D6),
  242. IMX_PINCTRL_PIN(MX27_PAD_CSI_D7),
  243. IMX_PINCTRL_PIN(MX27_PAD_CSI_VSYNC),
  244. IMX_PINCTRL_PIN(MX27_PAD_CSI_HSYNC),
  245. IMX_PINCTRL_PIN(MX27_PAD_USBH1_SUSP),
  246. IMX_PINCTRL_PIN(MX27_PAD_USB_PWR),
  247. IMX_PINCTRL_PIN(MX27_PAD_USB_OC_B),
  248. IMX_PINCTRL_PIN(MX27_PAD_USBH1_RCV),
  249. IMX_PINCTRL_PIN(MX27_PAD_USBH1_FS),
  250. IMX_PINCTRL_PIN(MX27_PAD_USBH1_OE_B),
  251. IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDM),
  252. IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDP),
  253. IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDM),
  254. IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDP),
  255. IMX_PINCTRL_PIN(MX27_PAD_I2C2_SDA),
  256. IMX_PINCTRL_PIN(MX27_PAD_I2C2_SCL),
  257. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA5),
  258. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA6),
  259. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA0),
  260. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA2),
  261. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA1),
  262. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA4),
  263. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA3),
  264. IMX_PINCTRL_PIN(MX27_PAD_TOUT),
  265. IMX_PINCTRL_PIN(MX27_PAD_TIN),
  266. IMX_PINCTRL_PIN(MX27_PAD_SSI4_FS),
  267. IMX_PINCTRL_PIN(MX27_PAD_SSI4_RXDAT),
  268. IMX_PINCTRL_PIN(MX27_PAD_SSI4_TXDAT),
  269. IMX_PINCTRL_PIN(MX27_PAD_SSI4_CLK),
  270. IMX_PINCTRL_PIN(MX27_PAD_SSI1_FS),
  271. IMX_PINCTRL_PIN(MX27_PAD_SSI1_RXDAT),
  272. IMX_PINCTRL_PIN(MX27_PAD_SSI1_TXDAT),
  273. IMX_PINCTRL_PIN(MX27_PAD_SSI1_CLK),
  274. IMX_PINCTRL_PIN(MX27_PAD_SSI2_FS),
  275. IMX_PINCTRL_PIN(MX27_PAD_SSI2_RXDAT),
  276. IMX_PINCTRL_PIN(MX27_PAD_SSI2_TXDAT),
  277. IMX_PINCTRL_PIN(MX27_PAD_SSI2_CLK),
  278. IMX_PINCTRL_PIN(MX27_PAD_SSI3_FS),
  279. IMX_PINCTRL_PIN(MX27_PAD_SSI3_RXDAT),
  280. IMX_PINCTRL_PIN(MX27_PAD_SSI3_TXDAT),
  281. IMX_PINCTRL_PIN(MX27_PAD_SSI3_CLK),
  282. IMX_PINCTRL_PIN(MX27_PAD_SD3_CMD),
  283. IMX_PINCTRL_PIN(MX27_PAD_SD3_CLK),
  284. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA0),
  285. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA1),
  286. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA2),
  287. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA3),
  288. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA4),
  289. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA5),
  290. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA6),
  291. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA7),
  292. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA8),
  293. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA9),
  294. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA10),
  295. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA11),
  296. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA12),
  297. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA13),
  298. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA14),
  299. IMX_PINCTRL_PIN(MX27_PAD_I2C_DATA),
  300. IMX_PINCTRL_PIN(MX27_PAD_I2C_CLK),
  301. IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS2),
  302. IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS1),
  303. IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS0),
  304. IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SCLK),
  305. IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MISO),
  306. IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MOSI),
  307. IMX_PINCTRL_PIN(MX27_PAD_CSPI1_RDY),
  308. IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS2),
  309. IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS1),
  310. IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS0),
  311. IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SCLK),
  312. IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MISO),
  313. IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MOSI),
  314. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_NXT),
  315. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_STP),
  316. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DIR),
  317. IMX_PINCTRL_PIN(MX27_PAD_UART2_CTS),
  318. IMX_PINCTRL_PIN(MX27_PAD_UART2_RTS),
  319. IMX_PINCTRL_PIN(MX27_PAD_PWMO),
  320. IMX_PINCTRL_PIN(MX27_PAD_UART2_TXD),
  321. IMX_PINCTRL_PIN(MX27_PAD_UART2_RXD),
  322. IMX_PINCTRL_PIN(MX27_PAD_UART3_TXD),
  323. IMX_PINCTRL_PIN(MX27_PAD_UART3_RXD),
  324. IMX_PINCTRL_PIN(MX27_PAD_UART3_CTS),
  325. IMX_PINCTRL_PIN(MX27_PAD_UART3_RTS),
  326. IMX_PINCTRL_PIN(MX27_PAD_UART1_TXD),
  327. IMX_PINCTRL_PIN(MX27_PAD_UART1_RXD),
  328. IMX_PINCTRL_PIN(MX27_PAD_UART1_CTS),
  329. IMX_PINCTRL_PIN(MX27_PAD_UART1_RTS),
  330. IMX_PINCTRL_PIN(MX27_PAD_RTCK),
  331. IMX_PINCTRL_PIN(MX27_PAD_RESET_OUT_B),
  332. IMX_PINCTRL_PIN(MX27_PAD_SD1_D0),
  333. IMX_PINCTRL_PIN(MX27_PAD_SD1_D1),
  334. IMX_PINCTRL_PIN(MX27_PAD_SD1_D2),
  335. IMX_PINCTRL_PIN(MX27_PAD_SD1_D3),
  336. IMX_PINCTRL_PIN(MX27_PAD_SD1_CMD),
  337. IMX_PINCTRL_PIN(MX27_PAD_SD1_CLK),
  338. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_CLK),
  339. IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA7),
  340. IMX_PINCTRL_PIN(MX27_PAD_NFRB),
  341. IMX_PINCTRL_PIN(MX27_PAD_NFCLE),
  342. IMX_PINCTRL_PIN(MX27_PAD_NFWP_B),
  343. IMX_PINCTRL_PIN(MX27_PAD_NFCE_B),
  344. IMX_PINCTRL_PIN(MX27_PAD_NFALE),
  345. IMX_PINCTRL_PIN(MX27_PAD_NFRE_B),
  346. IMX_PINCTRL_PIN(MX27_PAD_NFWE_B),
  347. IMX_PINCTRL_PIN(MX27_PAD_PC_POE),
  348. IMX_PINCTRL_PIN(MX27_PAD_PC_RW_B),
  349. IMX_PINCTRL_PIN(MX27_PAD_IOIS16),
  350. IMX_PINCTRL_PIN(MX27_PAD_PC_RST),
  351. IMX_PINCTRL_PIN(MX27_PAD_PC_BVD2),
  352. IMX_PINCTRL_PIN(MX27_PAD_PC_BVD1),
  353. IMX_PINCTRL_PIN(MX27_PAD_PC_VS2),
  354. IMX_PINCTRL_PIN(MX27_PAD_PC_VS1),
  355. IMX_PINCTRL_PIN(MX27_PAD_CLKO),
  356. IMX_PINCTRL_PIN(MX27_PAD_PC_PWRON),
  357. IMX_PINCTRL_PIN(MX27_PAD_PC_READY),
  358. IMX_PINCTRL_PIN(MX27_PAD_PC_WAIT_B),
  359. IMX_PINCTRL_PIN(MX27_PAD_PC_CD2_B),
  360. IMX_PINCTRL_PIN(MX27_PAD_PC_CD1_B),
  361. IMX_PINCTRL_PIN(MX27_PAD_CS4_B),
  362. IMX_PINCTRL_PIN(MX27_PAD_CS5_B),
  363. IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA15),
  364. };
  365. static struct imx1_pinctrl_soc_info imx27_pinctrl_info = {
  366. .pins = imx27_pinctrl_pads,
  367. .npins = ARRAY_SIZE(imx27_pinctrl_pads),
  368. };
  369. static const struct of_device_id imx27_pinctrl_of_match[] = {
  370. { .compatible = "fsl,imx27-iomuxc", },
  371. { /* sentinel */ }
  372. };
  373. static int imx27_pinctrl_probe(struct platform_device *pdev)
  374. {
  375. return imx1_pinctrl_core_probe(pdev, &imx27_pinctrl_info);
  376. }
  377. static struct platform_driver imx27_pinctrl_driver = {
  378. .driver = {
  379. .name = "imx27-pinctrl",
  380. .of_match_table = of_match_ptr(imx27_pinctrl_of_match),
  381. },
  382. .probe = imx27_pinctrl_probe,
  383. };
  384. static int __init imx27_pinctrl_init(void)
  385. {
  386. return platform_driver_register(&imx27_pinctrl_driver);
  387. }
  388. arch_initcall(imx27_pinctrl_init);