phy-rcar-gen3-usb2.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Renesas R-Car Gen3 for USB2.0 PHY driver
  4. *
  5. * Copyright (C) 2015-2017 Renesas Electronics Corporation
  6. *
  7. * This is based on the phy-rcar-gen2 driver:
  8. * Copyright (C) 2014 Renesas Solutions Corp.
  9. * Copyright (C) 2014 Cogent Embedded, Inc.
  10. */
  11. #include <linux/extcon-provider.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/io.h>
  14. #include <linux/module.h>
  15. #include <linux/mutex.h>
  16. #include <linux/of.h>
  17. #include <linux/of_address.h>
  18. #include <linux/of_device.h>
  19. #include <linux/phy/phy.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/string.h>
  24. #include <linux/usb/of.h>
  25. #include <linux/workqueue.h>
  26. /******* USB2.0 Host registers (original offset is +0x200) *******/
  27. #define USB2_INT_ENABLE 0x000
  28. #define USB2_USBCTR 0x00c
  29. #define USB2_SPD_RSM_TIMSET 0x10c
  30. #define USB2_OC_TIMSET 0x110
  31. #define USB2_COMMCTRL 0x600
  32. #define USB2_OBINTSTA 0x604
  33. #define USB2_OBINTEN 0x608
  34. #define USB2_VBCTRL 0x60c
  35. #define USB2_LINECTRL1 0x610
  36. #define USB2_ADPCTRL 0x630
  37. /* INT_ENABLE */
  38. #define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
  39. #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */
  40. #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */
  41. /* USBCTR */
  42. #define USB2_USBCTR_DIRPD BIT(2)
  43. #define USB2_USBCTR_PLL_RST BIT(1)
  44. /* SPD_RSM_TIMSET */
  45. #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
  46. /* OC_TIMSET */
  47. #define USB2_OC_TIMSET_INIT 0x000209ab
  48. /* COMMCTRL */
  49. #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
  50. /* OBINTSTA and OBINTEN */
  51. #define USB2_OBINT_SESSVLDCHG BIT(12)
  52. #define USB2_OBINT_IDDIGCHG BIT(11)
  53. #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
  54. USB2_OBINT_IDDIGCHG)
  55. /* VBCTRL */
  56. #define USB2_VBCTRL_OCCLREN BIT(16)
  57. #define USB2_VBCTRL_DRVVBUSSEL BIT(8)
  58. /* LINECTRL1 */
  59. #define USB2_LINECTRL1_DPRPD_EN BIT(19)
  60. #define USB2_LINECTRL1_DP_RPD BIT(18)
  61. #define USB2_LINECTRL1_DMRPD_EN BIT(17)
  62. #define USB2_LINECTRL1_DM_RPD BIT(16)
  63. #define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
  64. /* ADPCTRL */
  65. #define USB2_ADPCTRL_OTGSESSVLD BIT(20)
  66. #define USB2_ADPCTRL_IDDIG BIT(19)
  67. #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
  68. #define USB2_ADPCTRL_DRVVBUS BIT(4)
  69. #define NUM_OF_PHYS 4
  70. enum rcar_gen3_phy_index {
  71. PHY_INDEX_BOTH_HC,
  72. PHY_INDEX_OHCI,
  73. PHY_INDEX_EHCI,
  74. PHY_INDEX_HSUSB
  75. };
  76. static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
  77. USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
  78. USB2_INT_ENABLE_USBH_INTA_EN,
  79. USB2_INT_ENABLE_USBH_INTB_EN,
  80. 0
  81. };
  82. struct rcar_gen3_phy {
  83. struct phy *phy;
  84. struct rcar_gen3_chan *ch;
  85. u32 int_enable_bits;
  86. bool initialized;
  87. bool otg_initialized;
  88. bool powered;
  89. };
  90. struct rcar_gen3_chan {
  91. void __iomem *base;
  92. struct device *dev; /* platform_device's device */
  93. struct extcon_dev *extcon;
  94. struct rcar_gen3_phy rphys[NUM_OF_PHYS];
  95. struct regulator *vbus;
  96. struct work_struct work;
  97. struct mutex lock; /* protects rphys[...].powered */
  98. enum usb_dr_mode dr_mode;
  99. int irq;
  100. bool extcon_host;
  101. bool is_otg_channel;
  102. bool uses_otg_pins;
  103. };
  104. /*
  105. * Combination about is_otg_channel and uses_otg_pins:
  106. *
  107. * Parameters || Behaviors
  108. * is_otg_channel | uses_otg_pins || irqs | role sysfs
  109. * ---------------------+---------------++--------------+------------
  110. * true | true || enabled | enabled
  111. * true | false || disabled | enabled
  112. * false | any || disabled | disabled
  113. */
  114. static void rcar_gen3_phy_usb2_work(struct work_struct *work)
  115. {
  116. struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
  117. work);
  118. if (ch->extcon_host) {
  119. extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
  120. extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
  121. } else {
  122. extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
  123. extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
  124. }
  125. }
  126. static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
  127. {
  128. void __iomem *usb2_base = ch->base;
  129. u32 val = readl(usb2_base + USB2_COMMCTRL);
  130. dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
  131. if (host)
  132. val &= ~USB2_COMMCTRL_OTG_PERI;
  133. else
  134. val |= USB2_COMMCTRL_OTG_PERI;
  135. writel(val, usb2_base + USB2_COMMCTRL);
  136. }
  137. static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
  138. {
  139. void __iomem *usb2_base = ch->base;
  140. u32 val = readl(usb2_base + USB2_LINECTRL1);
  141. dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
  142. val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
  143. if (dp)
  144. val |= USB2_LINECTRL1_DP_RPD;
  145. if (dm)
  146. val |= USB2_LINECTRL1_DM_RPD;
  147. writel(val, usb2_base + USB2_LINECTRL1);
  148. }
  149. static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
  150. {
  151. void __iomem *usb2_base = ch->base;
  152. u32 val = readl(usb2_base + USB2_ADPCTRL);
  153. dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
  154. if (vbus)
  155. val |= USB2_ADPCTRL_DRVVBUS;
  156. else
  157. val &= ~USB2_ADPCTRL_DRVVBUS;
  158. writel(val, usb2_base + USB2_ADPCTRL);
  159. }
  160. static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
  161. {
  162. void __iomem *usb2_base = ch->base;
  163. u32 val = readl(usb2_base + USB2_OBINTEN);
  164. if (ch->uses_otg_pins && enable)
  165. val |= USB2_OBINT_BITS;
  166. else
  167. val &= ~USB2_OBINT_BITS;
  168. writel(val, usb2_base + USB2_OBINTEN);
  169. }
  170. static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
  171. {
  172. rcar_gen3_set_linectrl(ch, 1, 1);
  173. rcar_gen3_set_host_mode(ch, 1);
  174. rcar_gen3_enable_vbus_ctrl(ch, 1);
  175. ch->extcon_host = true;
  176. schedule_work(&ch->work);
  177. }
  178. static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
  179. {
  180. rcar_gen3_set_linectrl(ch, 0, 1);
  181. rcar_gen3_set_host_mode(ch, 0);
  182. rcar_gen3_enable_vbus_ctrl(ch, 0);
  183. ch->extcon_host = false;
  184. schedule_work(&ch->work);
  185. }
  186. static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
  187. {
  188. void __iomem *usb2_base = ch->base;
  189. u32 val;
  190. val = readl(usb2_base + USB2_LINECTRL1);
  191. writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
  192. rcar_gen3_set_linectrl(ch, 1, 1);
  193. rcar_gen3_set_host_mode(ch, 1);
  194. rcar_gen3_enable_vbus_ctrl(ch, 0);
  195. val = readl(usb2_base + USB2_LINECTRL1);
  196. writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
  197. }
  198. static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
  199. {
  200. rcar_gen3_set_linectrl(ch, 0, 1);
  201. rcar_gen3_set_host_mode(ch, 0);
  202. rcar_gen3_enable_vbus_ctrl(ch, 1);
  203. }
  204. static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
  205. {
  206. rcar_gen3_control_otg_irq(ch, 0);
  207. rcar_gen3_enable_vbus_ctrl(ch, 1);
  208. rcar_gen3_init_for_host(ch);
  209. rcar_gen3_control_otg_irq(ch, 1);
  210. }
  211. static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
  212. {
  213. if (!ch->uses_otg_pins)
  214. return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
  215. return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
  216. }
  217. static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
  218. {
  219. if (!rcar_gen3_check_id(ch))
  220. rcar_gen3_init_for_host(ch);
  221. else
  222. rcar_gen3_init_for_peri(ch);
  223. }
  224. static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
  225. {
  226. return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
  227. }
  228. static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
  229. {
  230. if (rcar_gen3_is_host(ch))
  231. return PHY_MODE_USB_HOST;
  232. return PHY_MODE_USB_DEVICE;
  233. }
  234. static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
  235. {
  236. int i;
  237. for (i = 0; i < NUM_OF_PHYS; i++) {
  238. if (ch->rphys[i].initialized)
  239. return true;
  240. }
  241. return false;
  242. }
  243. static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch)
  244. {
  245. int i;
  246. for (i = 0; i < NUM_OF_PHYS; i++) {
  247. if (ch->rphys[i].otg_initialized)
  248. return false;
  249. }
  250. return true;
  251. }
  252. static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
  253. {
  254. int i;
  255. for (i = 0; i < NUM_OF_PHYS; i++) {
  256. if (ch->rphys[i].powered)
  257. return false;
  258. }
  259. return true;
  260. }
  261. static ssize_t role_store(struct device *dev, struct device_attribute *attr,
  262. const char *buf, size_t count)
  263. {
  264. struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
  265. bool is_b_device;
  266. enum phy_mode cur_mode, new_mode;
  267. if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
  268. return -EIO;
  269. if (sysfs_streq(buf, "host"))
  270. new_mode = PHY_MODE_USB_HOST;
  271. else if (sysfs_streq(buf, "peripheral"))
  272. new_mode = PHY_MODE_USB_DEVICE;
  273. else
  274. return -EINVAL;
  275. /* is_b_device: true is B-Device. false is A-Device. */
  276. is_b_device = rcar_gen3_check_id(ch);
  277. cur_mode = rcar_gen3_get_phy_mode(ch);
  278. /* If current and new mode is the same, this returns the error */
  279. if (cur_mode == new_mode)
  280. return -EINVAL;
  281. if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
  282. if (!is_b_device) /* A-Peripheral */
  283. rcar_gen3_init_from_a_peri_to_a_host(ch);
  284. else /* B-Peripheral */
  285. rcar_gen3_init_for_b_host(ch);
  286. } else { /* And is_host must be true */
  287. if (!is_b_device) /* A-Host */
  288. rcar_gen3_init_for_a_peri(ch);
  289. else /* B-Host */
  290. rcar_gen3_init_for_peri(ch);
  291. }
  292. return count;
  293. }
  294. static ssize_t role_show(struct device *dev, struct device_attribute *attr,
  295. char *buf)
  296. {
  297. struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
  298. if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
  299. return -EIO;
  300. return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
  301. "peripheral");
  302. }
  303. static DEVICE_ATTR_RW(role);
  304. static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
  305. {
  306. void __iomem *usb2_base = ch->base;
  307. u32 val;
  308. /* Should not use functions of read-modify-write a register */
  309. val = readl(usb2_base + USB2_LINECTRL1);
  310. val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
  311. USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
  312. writel(val, usb2_base + USB2_LINECTRL1);
  313. val = readl(usb2_base + USB2_VBCTRL);
  314. val &= ~USB2_VBCTRL_OCCLREN;
  315. writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
  316. val = readl(usb2_base + USB2_ADPCTRL);
  317. writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
  318. msleep(20);
  319. writel(0xffffffff, usb2_base + USB2_OBINTSTA);
  320. writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
  321. rcar_gen3_device_recognition(ch);
  322. }
  323. static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
  324. {
  325. struct rcar_gen3_chan *ch = _ch;
  326. void __iomem *usb2_base = ch->base;
  327. u32 status = readl(usb2_base + USB2_OBINTSTA);
  328. irqreturn_t ret = IRQ_NONE;
  329. if (status & USB2_OBINT_BITS) {
  330. dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
  331. writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
  332. rcar_gen3_device_recognition(ch);
  333. ret = IRQ_HANDLED;
  334. }
  335. return ret;
  336. }
  337. static int rcar_gen3_phy_usb2_init(struct phy *p)
  338. {
  339. struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
  340. struct rcar_gen3_chan *channel = rphy->ch;
  341. void __iomem *usb2_base = channel->base;
  342. u32 val;
  343. int ret;
  344. if (!rcar_gen3_is_any_rphy_initialized(channel) && channel->irq >= 0) {
  345. INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
  346. ret = request_irq(channel->irq, rcar_gen3_phy_usb2_irq,
  347. IRQF_SHARED, dev_name(channel->dev), channel);
  348. if (ret < 0) {
  349. dev_err(channel->dev, "No irq handler (%d)\n", channel->irq);
  350. return ret;
  351. }
  352. }
  353. /* Initialize USB2 part */
  354. val = readl(usb2_base + USB2_INT_ENABLE);
  355. val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
  356. writel(val, usb2_base + USB2_INT_ENABLE);
  357. writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
  358. writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
  359. /* Initialize otg part */
  360. if (channel->is_otg_channel) {
  361. if (rcar_gen3_needs_init_otg(channel))
  362. rcar_gen3_init_otg(channel);
  363. rphy->otg_initialized = true;
  364. }
  365. rphy->initialized = true;
  366. return 0;
  367. }
  368. static int rcar_gen3_phy_usb2_exit(struct phy *p)
  369. {
  370. struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
  371. struct rcar_gen3_chan *channel = rphy->ch;
  372. void __iomem *usb2_base = channel->base;
  373. u32 val;
  374. rphy->initialized = false;
  375. if (channel->is_otg_channel)
  376. rphy->otg_initialized = false;
  377. val = readl(usb2_base + USB2_INT_ENABLE);
  378. val &= ~rphy->int_enable_bits;
  379. if (!rcar_gen3_is_any_rphy_initialized(channel))
  380. val &= ~USB2_INT_ENABLE_UCOM_INTEN;
  381. writel(val, usb2_base + USB2_INT_ENABLE);
  382. if (channel->irq >= 0 && !rcar_gen3_is_any_rphy_initialized(channel))
  383. free_irq(channel->irq, channel);
  384. return 0;
  385. }
  386. static int rcar_gen3_phy_usb2_power_on(struct phy *p)
  387. {
  388. struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
  389. struct rcar_gen3_chan *channel = rphy->ch;
  390. void __iomem *usb2_base = channel->base;
  391. u32 val;
  392. int ret = 0;
  393. mutex_lock(&channel->lock);
  394. if (!rcar_gen3_are_all_rphys_power_off(channel))
  395. goto out;
  396. if (channel->vbus) {
  397. ret = regulator_enable(channel->vbus);
  398. if (ret)
  399. goto out;
  400. }
  401. val = readl(usb2_base + USB2_USBCTR);
  402. val |= USB2_USBCTR_PLL_RST;
  403. writel(val, usb2_base + USB2_USBCTR);
  404. val &= ~USB2_USBCTR_PLL_RST;
  405. writel(val, usb2_base + USB2_USBCTR);
  406. out:
  407. /* The powered flag should be set for any other phys anyway */
  408. rphy->powered = true;
  409. mutex_unlock(&channel->lock);
  410. return 0;
  411. }
  412. static int rcar_gen3_phy_usb2_power_off(struct phy *p)
  413. {
  414. struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
  415. struct rcar_gen3_chan *channel = rphy->ch;
  416. int ret = 0;
  417. mutex_lock(&channel->lock);
  418. rphy->powered = false;
  419. if (!rcar_gen3_are_all_rphys_power_off(channel))
  420. goto out;
  421. if (channel->vbus)
  422. ret = regulator_disable(channel->vbus);
  423. out:
  424. mutex_unlock(&channel->lock);
  425. return ret;
  426. }
  427. static const struct phy_ops rcar_gen3_phy_usb2_ops = {
  428. .init = rcar_gen3_phy_usb2_init,
  429. .exit = rcar_gen3_phy_usb2_exit,
  430. .power_on = rcar_gen3_phy_usb2_power_on,
  431. .power_off = rcar_gen3_phy_usb2_power_off,
  432. .owner = THIS_MODULE,
  433. };
  434. static const struct phy_ops rz_g1c_phy_usb2_ops = {
  435. .init = rcar_gen3_phy_usb2_init,
  436. .exit = rcar_gen3_phy_usb2_exit,
  437. .owner = THIS_MODULE,
  438. };
  439. static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
  440. {
  441. .compatible = "renesas,usb2-phy-r8a77470",
  442. .data = &rz_g1c_phy_usb2_ops,
  443. },
  444. {
  445. .compatible = "renesas,usb2-phy-r8a7795",
  446. .data = &rcar_gen3_phy_usb2_ops,
  447. },
  448. {
  449. .compatible = "renesas,usb2-phy-r8a7796",
  450. .data = &rcar_gen3_phy_usb2_ops,
  451. },
  452. {
  453. .compatible = "renesas,usb2-phy-r8a77965",
  454. .data = &rcar_gen3_phy_usb2_ops,
  455. },
  456. {
  457. .compatible = "renesas,rcar-gen3-usb2-phy",
  458. .data = &rcar_gen3_phy_usb2_ops,
  459. },
  460. { /* sentinel */ },
  461. };
  462. MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
  463. static const unsigned int rcar_gen3_phy_cable[] = {
  464. EXTCON_USB,
  465. EXTCON_USB_HOST,
  466. EXTCON_NONE,
  467. };
  468. static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
  469. struct of_phandle_args *args)
  470. {
  471. struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
  472. if (args->args_count == 0) /* For old version dts */
  473. return ch->rphys[PHY_INDEX_BOTH_HC].phy;
  474. else if (args->args_count > 1) /* Prevent invalid args count */
  475. return ERR_PTR(-ENODEV);
  476. if (args->args[0] >= NUM_OF_PHYS)
  477. return ERR_PTR(-ENODEV);
  478. return ch->rphys[args->args[0]].phy;
  479. }
  480. static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
  481. {
  482. enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
  483. int i;
  484. /*
  485. * If one of device nodes has other dr_mode except UNKNOWN,
  486. * this function returns UNKNOWN. To achieve backward compatibility,
  487. * this loop starts the index as 0.
  488. */
  489. for (i = 0; i < NUM_OF_PHYS; i++) {
  490. enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
  491. if (mode != USB_DR_MODE_UNKNOWN) {
  492. if (candidate == USB_DR_MODE_UNKNOWN)
  493. candidate = mode;
  494. else if (candidate != mode)
  495. return USB_DR_MODE_UNKNOWN;
  496. }
  497. }
  498. return candidate;
  499. }
  500. static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
  501. {
  502. struct device *dev = &pdev->dev;
  503. struct rcar_gen3_chan *channel;
  504. struct phy_provider *provider;
  505. struct resource *res;
  506. const struct phy_ops *phy_usb2_ops;
  507. int ret = 0, i;
  508. if (!dev->of_node) {
  509. dev_err(dev, "This driver needs device tree\n");
  510. return -EINVAL;
  511. }
  512. channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
  513. if (!channel)
  514. return -ENOMEM;
  515. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  516. channel->base = devm_ioremap_resource(dev, res);
  517. if (IS_ERR(channel->base))
  518. return PTR_ERR(channel->base);
  519. /* get irq number here and request_irq for OTG in phy_init */
  520. channel->irq = platform_get_irq_optional(pdev, 0);
  521. channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
  522. if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
  523. int ret;
  524. channel->is_otg_channel = true;
  525. channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
  526. "renesas,no-otg-pins");
  527. channel->extcon = devm_extcon_dev_allocate(dev,
  528. rcar_gen3_phy_cable);
  529. if (IS_ERR(channel->extcon))
  530. return PTR_ERR(channel->extcon);
  531. ret = devm_extcon_dev_register(dev, channel->extcon);
  532. if (ret < 0) {
  533. dev_err(dev, "Failed to register extcon\n");
  534. return ret;
  535. }
  536. }
  537. /*
  538. * devm_phy_create() will call pm_runtime_enable(&phy->dev);
  539. * And then, phy-core will manage runtime pm for this device.
  540. */
  541. pm_runtime_enable(dev);
  542. phy_usb2_ops = of_device_get_match_data(dev);
  543. if (!phy_usb2_ops) {
  544. ret = -EINVAL;
  545. goto error;
  546. }
  547. mutex_init(&channel->lock);
  548. for (i = 0; i < NUM_OF_PHYS; i++) {
  549. channel->rphys[i].phy = devm_phy_create(dev, NULL,
  550. phy_usb2_ops);
  551. if (IS_ERR(channel->rphys[i].phy)) {
  552. dev_err(dev, "Failed to create USB2 PHY\n");
  553. ret = PTR_ERR(channel->rphys[i].phy);
  554. goto error;
  555. }
  556. channel->rphys[i].ch = channel;
  557. channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
  558. phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
  559. }
  560. channel->vbus = devm_regulator_get_optional(dev, "vbus");
  561. if (IS_ERR(channel->vbus)) {
  562. if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
  563. ret = PTR_ERR(channel->vbus);
  564. goto error;
  565. }
  566. channel->vbus = NULL;
  567. }
  568. platform_set_drvdata(pdev, channel);
  569. channel->dev = dev;
  570. provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
  571. if (IS_ERR(provider)) {
  572. dev_err(dev, "Failed to register PHY provider\n");
  573. ret = PTR_ERR(provider);
  574. goto error;
  575. } else if (channel->is_otg_channel) {
  576. int ret;
  577. ret = device_create_file(dev, &dev_attr_role);
  578. if (ret < 0)
  579. goto error;
  580. }
  581. return 0;
  582. error:
  583. pm_runtime_disable(dev);
  584. return ret;
  585. }
  586. static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
  587. {
  588. struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
  589. if (channel->is_otg_channel)
  590. device_remove_file(&pdev->dev, &dev_attr_role);
  591. pm_runtime_disable(&pdev->dev);
  592. return 0;
  593. };
  594. static struct platform_driver rcar_gen3_phy_usb2_driver = {
  595. .driver = {
  596. .name = "phy_rcar_gen3_usb2",
  597. .of_match_table = rcar_gen3_phy_usb2_match_table,
  598. },
  599. .probe = rcar_gen3_phy_usb2_probe,
  600. .remove = rcar_gen3_phy_usb2_remove,
  601. };
  602. module_platform_driver(rcar_gen3_phy_usb2_driver);
  603. MODULE_LICENSE("GPL v2");
  604. MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
  605. MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");