yenta_socket.c 39 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Regular cardbus driver ("yenta_socket")
  4. *
  5. * (C) Copyright 1999, 2000 Linus Torvalds
  6. *
  7. * Changelog:
  8. * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
  9. * Dynamically adjust the size of the bridge resource
  10. *
  11. * May 2003: Dominik Brodowski <linux@brodo.de>
  12. * Merge pci_socket.c and yenta.c into one file
  13. */
  14. #include <linux/init.h>
  15. #include <linux/pci.h>
  16. #include <linux/workqueue.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/delay.h>
  19. #include <linux/module.h>
  20. #include <linux/io.h>
  21. #include <linux/slab.h>
  22. #include <pcmcia/ss.h>
  23. #include "yenta_socket.h"
  24. #include "i82365.h"
  25. static bool disable_clkrun;
  26. module_param(disable_clkrun, bool, 0444);
  27. MODULE_PARM_DESC(disable_clkrun,
  28. "If PC card doesn't function properly, please try this option (TI and Ricoh bridges only)");
  29. static bool isa_probe = 1;
  30. module_param(isa_probe, bool, 0444);
  31. MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
  32. static bool pwr_irqs_off;
  33. module_param(pwr_irqs_off, bool, 0644);
  34. MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
  35. static char o2_speedup[] = "default";
  36. module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
  37. MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
  38. "or 'default' (uses recommended behaviour for the detected bridge)");
  39. /*
  40. * Only probe "regular" interrupts, don't
  41. * touch dangerous spots like the mouse irq,
  42. * because there are mice that apparently
  43. * get really confused if they get fondled
  44. * too intimately.
  45. *
  46. * Default to 11, 10, 9, 7, 6, 5, 4, 3.
  47. */
  48. static u32 isa_interrupts = 0x0ef8;
  49. #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
  50. /* Don't ask.. */
  51. #define to_cycles(ns) ((ns)/120)
  52. #define to_ns(cycles) ((cycles)*120)
  53. /*
  54. * yenta PCI irq probing.
  55. * currently only used in the TI/EnE initialization code
  56. */
  57. #ifdef CONFIG_YENTA_TI
  58. static int yenta_probe_cb_irq(struct yenta_socket *socket);
  59. static unsigned int yenta_probe_irq(struct yenta_socket *socket,
  60. u32 isa_irq_mask);
  61. #endif
  62. static unsigned int override_bios;
  63. module_param(override_bios, uint, 0000);
  64. MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
  65. /*
  66. * Generate easy-to-use ways of reading a cardbus sockets
  67. * regular memory space ("cb_xxx"), configuration space
  68. * ("config_xxx") and compatibility space ("exca_xxxx")
  69. */
  70. static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
  71. {
  72. u32 val = readl(socket->base + reg);
  73. debug("%04x %08x\n", socket, reg, val);
  74. return val;
  75. }
  76. static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
  77. {
  78. debug("%04x %08x\n", socket, reg, val);
  79. writel(val, socket->base + reg);
  80. readl(socket->base + reg); /* avoid problems with PCI write posting */
  81. }
  82. static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
  83. {
  84. u8 val;
  85. pci_read_config_byte(socket->dev, offset, &val);
  86. debug("%04x %02x\n", socket, offset, val);
  87. return val;
  88. }
  89. static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
  90. {
  91. u16 val;
  92. pci_read_config_word(socket->dev, offset, &val);
  93. debug("%04x %04x\n", socket, offset, val);
  94. return val;
  95. }
  96. static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
  97. {
  98. u32 val;
  99. pci_read_config_dword(socket->dev, offset, &val);
  100. debug("%04x %08x\n", socket, offset, val);
  101. return val;
  102. }
  103. static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
  104. {
  105. debug("%04x %02x\n", socket, offset, val);
  106. pci_write_config_byte(socket->dev, offset, val);
  107. }
  108. static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
  109. {
  110. debug("%04x %04x\n", socket, offset, val);
  111. pci_write_config_word(socket->dev, offset, val);
  112. }
  113. static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
  114. {
  115. debug("%04x %08x\n", socket, offset, val);
  116. pci_write_config_dword(socket->dev, offset, val);
  117. }
  118. static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
  119. {
  120. u8 val = readb(socket->base + 0x800 + reg);
  121. debug("%04x %02x\n", socket, reg, val);
  122. return val;
  123. }
  124. static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
  125. {
  126. u16 val;
  127. val = readb(socket->base + 0x800 + reg);
  128. val |= readb(socket->base + 0x800 + reg + 1) << 8;
  129. debug("%04x %04x\n", socket, reg, val);
  130. return val;
  131. }
  132. static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
  133. {
  134. debug("%04x %02x\n", socket, reg, val);
  135. writeb(val, socket->base + 0x800 + reg);
  136. readb(socket->base + 0x800 + reg); /* PCI write posting... */
  137. }
  138. static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
  139. {
  140. debug("%04x %04x\n", socket, reg, val);
  141. writeb(val, socket->base + 0x800 + reg);
  142. writeb(val >> 8, socket->base + 0x800 + reg + 1);
  143. /* PCI write posting... */
  144. readb(socket->base + 0x800 + reg);
  145. readb(socket->base + 0x800 + reg + 1);
  146. }
  147. static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
  148. {
  149. struct yenta_socket *socket = dev_get_drvdata(yentadev);
  150. int offset = 0, i;
  151. offset = snprintf(buf, PAGE_SIZE, "CB registers:");
  152. for (i = 0; i < 0x24; i += 4) {
  153. unsigned val;
  154. if (!(i & 15))
  155. offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
  156. val = cb_readl(socket, i);
  157. offset += scnprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
  158. }
  159. offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
  160. for (i = 0; i < 0x45; i++) {
  161. unsigned char val;
  162. if (!(i & 7)) {
  163. if (i & 8) {
  164. memcpy(buf + offset, " -", 2);
  165. offset += 2;
  166. } else
  167. offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
  168. }
  169. val = exca_readb(socket, i);
  170. offset += scnprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
  171. }
  172. buf[offset++] = '\n';
  173. return offset;
  174. }
  175. static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
  176. /*
  177. * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
  178. * on what kind of card is inserted..
  179. */
  180. static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
  181. {
  182. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  183. unsigned int val;
  184. u32 state = cb_readl(socket, CB_SOCKET_STATE);
  185. val = (state & CB_3VCARD) ? SS_3VCARD : 0;
  186. val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
  187. val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
  188. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
  189. if (state & CB_CBCARD) {
  190. val |= SS_CARDBUS;
  191. val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
  192. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
  193. val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
  194. } else if (state & CB_16BITCARD) {
  195. u8 status = exca_readb(socket, I365_STATUS);
  196. val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
  197. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  198. val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
  199. } else {
  200. val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
  201. val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
  202. }
  203. val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
  204. val |= (status & I365_CS_READY) ? SS_READY : 0;
  205. val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
  206. }
  207. *value = val;
  208. return 0;
  209. }
  210. static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
  211. {
  212. /* some birdges require to use the ExCA registers to power 16bit cards */
  213. if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
  214. (socket->flags & YENTA_16BIT_POWER_EXCA)) {
  215. u8 reg, old;
  216. reg = old = exca_readb(socket, I365_POWER);
  217. reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
  218. /* i82365SL-DF style */
  219. if (socket->flags & YENTA_16BIT_POWER_DF) {
  220. switch (state->Vcc) {
  221. case 33:
  222. reg |= I365_VCC_3V;
  223. break;
  224. case 50:
  225. reg |= I365_VCC_5V;
  226. break;
  227. default:
  228. reg = 0;
  229. break;
  230. }
  231. switch (state->Vpp) {
  232. case 33:
  233. case 50:
  234. reg |= I365_VPP1_5V;
  235. break;
  236. case 120:
  237. reg |= I365_VPP1_12V;
  238. break;
  239. }
  240. } else {
  241. /* i82365SL-B style */
  242. switch (state->Vcc) {
  243. case 50:
  244. reg |= I365_VCC_5V;
  245. break;
  246. default:
  247. reg = 0;
  248. break;
  249. }
  250. switch (state->Vpp) {
  251. case 50:
  252. reg |= I365_VPP1_5V | I365_VPP2_5V;
  253. break;
  254. case 120:
  255. reg |= I365_VPP1_12V | I365_VPP2_12V;
  256. break;
  257. }
  258. }
  259. if (reg != old)
  260. exca_writeb(socket, I365_POWER, reg);
  261. } else {
  262. u32 reg = 0; /* CB_SC_STPCLK? */
  263. switch (state->Vcc) {
  264. case 33:
  265. reg = CB_SC_VCC_3V;
  266. break;
  267. case 50:
  268. reg = CB_SC_VCC_5V;
  269. break;
  270. default:
  271. reg = 0;
  272. break;
  273. }
  274. switch (state->Vpp) {
  275. case 33:
  276. reg |= CB_SC_VPP_3V;
  277. break;
  278. case 50:
  279. reg |= CB_SC_VPP_5V;
  280. break;
  281. case 120:
  282. reg |= CB_SC_VPP_12V;
  283. break;
  284. }
  285. if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
  286. cb_writel(socket, CB_SOCKET_CONTROL, reg);
  287. }
  288. }
  289. static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
  290. {
  291. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  292. u16 bridge;
  293. /* if powering down: do it immediately */
  294. if (state->Vcc == 0)
  295. yenta_set_power(socket, state);
  296. socket->io_irq = state->io_irq;
  297. bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
  298. if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
  299. u8 intr;
  300. bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
  301. /* ISA interrupt control? */
  302. intr = exca_readb(socket, I365_INTCTL);
  303. intr = (intr & ~0xf);
  304. if (!socket->dev->irq) {
  305. intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
  306. bridge |= CB_BRIDGE_INTR;
  307. }
  308. exca_writeb(socket, I365_INTCTL, intr);
  309. } else {
  310. u8 reg;
  311. reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
  312. reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
  313. reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
  314. if (state->io_irq != socket->dev->irq) {
  315. reg |= state->io_irq;
  316. bridge |= CB_BRIDGE_INTR;
  317. }
  318. exca_writeb(socket, I365_INTCTL, reg);
  319. reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
  320. reg |= I365_PWR_NORESET;
  321. if (state->flags & SS_PWR_AUTO)
  322. reg |= I365_PWR_AUTO;
  323. if (state->flags & SS_OUTPUT_ENA)
  324. reg |= I365_PWR_OUT;
  325. if (exca_readb(socket, I365_POWER) != reg)
  326. exca_writeb(socket, I365_POWER, reg);
  327. /* CSC interrupt: no ISA irq for CSC */
  328. reg = exca_readb(socket, I365_CSCINT);
  329. reg &= I365_CSC_IRQ_MASK;
  330. reg |= I365_CSC_DETECT;
  331. if (state->flags & SS_IOCARD) {
  332. if (state->csc_mask & SS_STSCHG)
  333. reg |= I365_CSC_STSCHG;
  334. } else {
  335. if (state->csc_mask & SS_BATDEAD)
  336. reg |= I365_CSC_BVD1;
  337. if (state->csc_mask & SS_BATWARN)
  338. reg |= I365_CSC_BVD2;
  339. if (state->csc_mask & SS_READY)
  340. reg |= I365_CSC_READY;
  341. }
  342. exca_writeb(socket, I365_CSCINT, reg);
  343. exca_readb(socket, I365_CSC);
  344. if (sock->zoom_video)
  345. sock->zoom_video(sock, state->flags & SS_ZVCARD);
  346. }
  347. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  348. /* Socket event mask: get card insert/remove events.. */
  349. cb_writel(socket, CB_SOCKET_EVENT, -1);
  350. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  351. /* if powering up: do it as the last step when the socket is configured */
  352. if (state->Vcc != 0)
  353. yenta_set_power(socket, state);
  354. return 0;
  355. }
  356. static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
  357. {
  358. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  359. int map;
  360. unsigned char ioctl, addr, enable;
  361. map = io->map;
  362. if (map > 1)
  363. return -EINVAL;
  364. enable = I365_ENA_IO(map);
  365. addr = exca_readb(socket, I365_ADDRWIN);
  366. /* Disable the window before changing it.. */
  367. if (addr & enable) {
  368. addr &= ~enable;
  369. exca_writeb(socket, I365_ADDRWIN, addr);
  370. }
  371. exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
  372. exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
  373. ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
  374. if (io->flags & MAP_0WS)
  375. ioctl |= I365_IOCTL_0WS(map);
  376. if (io->flags & MAP_16BIT)
  377. ioctl |= I365_IOCTL_16BIT(map);
  378. if (io->flags & MAP_AUTOSZ)
  379. ioctl |= I365_IOCTL_IOCS16(map);
  380. exca_writeb(socket, I365_IOCTL, ioctl);
  381. if (io->flags & MAP_ACTIVE)
  382. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  383. return 0;
  384. }
  385. static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
  386. {
  387. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  388. struct pci_bus_region region;
  389. int map;
  390. unsigned char addr, enable;
  391. unsigned int start, stop, card_start;
  392. unsigned short word;
  393. pcibios_resource_to_bus(socket->dev->bus, &region, mem->res);
  394. map = mem->map;
  395. start = region.start;
  396. stop = region.end;
  397. card_start = mem->card_start;
  398. if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
  399. (card_start >> 26) || mem->speed > 1000)
  400. return -EINVAL;
  401. enable = I365_ENA_MEM(map);
  402. addr = exca_readb(socket, I365_ADDRWIN);
  403. if (addr & enable) {
  404. addr &= ~enable;
  405. exca_writeb(socket, I365_ADDRWIN, addr);
  406. }
  407. exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
  408. word = (start >> 12) & 0x0fff;
  409. if (mem->flags & MAP_16BIT)
  410. word |= I365_MEM_16BIT;
  411. if (mem->flags & MAP_0WS)
  412. word |= I365_MEM_0WS;
  413. exca_writew(socket, I365_MEM(map) + I365_W_START, word);
  414. word = (stop >> 12) & 0x0fff;
  415. switch (to_cycles(mem->speed)) {
  416. case 0:
  417. break;
  418. case 1:
  419. word |= I365_MEM_WS0;
  420. break;
  421. case 2:
  422. word |= I365_MEM_WS1;
  423. break;
  424. default:
  425. word |= I365_MEM_WS1 | I365_MEM_WS0;
  426. break;
  427. }
  428. exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
  429. word = ((card_start - start) >> 12) & 0x3fff;
  430. if (mem->flags & MAP_WRPROT)
  431. word |= I365_MEM_WRPROT;
  432. if (mem->flags & MAP_ATTRIB)
  433. word |= I365_MEM_REG;
  434. exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
  435. if (mem->flags & MAP_ACTIVE)
  436. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  437. return 0;
  438. }
  439. static irqreturn_t yenta_interrupt(int irq, void *dev_id)
  440. {
  441. unsigned int events;
  442. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  443. u8 csc;
  444. u32 cb_event;
  445. /* Clear interrupt status for the event */
  446. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  447. cb_writel(socket, CB_SOCKET_EVENT, cb_event);
  448. csc = exca_readb(socket, I365_CSC);
  449. if (!(cb_event || csc))
  450. return IRQ_NONE;
  451. events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
  452. events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
  453. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  454. events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
  455. } else {
  456. events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
  457. events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
  458. events |= (csc & I365_CSC_READY) ? SS_READY : 0;
  459. }
  460. if (events)
  461. pcmcia_parse_events(&socket->socket, events);
  462. return IRQ_HANDLED;
  463. }
  464. static void yenta_interrupt_wrapper(struct timer_list *t)
  465. {
  466. struct yenta_socket *socket = from_timer(socket, t, poll_timer);
  467. yenta_interrupt(0, (void *)socket);
  468. socket->poll_timer.expires = jiffies + HZ;
  469. add_timer(&socket->poll_timer);
  470. }
  471. static void yenta_clear_maps(struct yenta_socket *socket)
  472. {
  473. int i;
  474. struct resource res = { .start = 0, .end = 0x0fff };
  475. pccard_io_map io = { 0, 0, 0, 0, 1 };
  476. pccard_mem_map mem = { .res = &res, };
  477. yenta_set_socket(&socket->socket, &dead_socket);
  478. for (i = 0; i < 2; i++) {
  479. io.map = i;
  480. yenta_set_io_map(&socket->socket, &io);
  481. }
  482. for (i = 0; i < 5; i++) {
  483. mem.map = i;
  484. yenta_set_mem_map(&socket->socket, &mem);
  485. }
  486. }
  487. /* redoes voltage interrogation if required */
  488. static void yenta_interrogate(struct yenta_socket *socket)
  489. {
  490. u32 state;
  491. state = cb_readl(socket, CB_SOCKET_STATE);
  492. if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
  493. (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
  494. ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
  495. cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
  496. }
  497. /* Called at resume and initialization events */
  498. static int yenta_sock_init(struct pcmcia_socket *sock)
  499. {
  500. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  501. exca_writeb(socket, I365_GBLCTL, 0x00);
  502. exca_writeb(socket, I365_GENCTL, 0x00);
  503. /* Redo card voltage interrogation */
  504. yenta_interrogate(socket);
  505. yenta_clear_maps(socket);
  506. if (socket->type && socket->type->sock_init)
  507. socket->type->sock_init(socket);
  508. /* Re-enable CSC interrupts */
  509. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  510. return 0;
  511. }
  512. static int yenta_sock_suspend(struct pcmcia_socket *sock)
  513. {
  514. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  515. /* Disable CSC interrupts */
  516. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  517. return 0;
  518. }
  519. /*
  520. * Use an adaptive allocation for the memory resource,
  521. * sometimes the memory behind pci bridges is limited:
  522. * 1/8 of the size of the io window of the parent.
  523. * max 4 MB, min 16 kB. We try very hard to not get below
  524. * the "ACC" values, though.
  525. */
  526. #define BRIDGE_MEM_MAX (4*1024*1024)
  527. #define BRIDGE_MEM_ACC (128*1024)
  528. #define BRIDGE_MEM_MIN (16*1024)
  529. #define BRIDGE_IO_MAX 512
  530. #define BRIDGE_IO_ACC 256
  531. #define BRIDGE_IO_MIN 32
  532. #ifndef PCIBIOS_MIN_CARDBUS_IO
  533. #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
  534. #endif
  535. static int yenta_search_one_res(struct resource *root, struct resource *res,
  536. u32 min)
  537. {
  538. u32 align, size, start, end;
  539. if (res->flags & IORESOURCE_IO) {
  540. align = 1024;
  541. size = BRIDGE_IO_MAX;
  542. start = PCIBIOS_MIN_CARDBUS_IO;
  543. end = ~0U;
  544. } else {
  545. unsigned long avail = root->end - root->start;
  546. int i;
  547. size = BRIDGE_MEM_MAX;
  548. if (size > avail/8) {
  549. size = (avail+1)/8;
  550. /* round size down to next power of 2 */
  551. i = 0;
  552. while ((size /= 2) != 0)
  553. i++;
  554. size = 1 << i;
  555. }
  556. if (size < min)
  557. size = min;
  558. align = size;
  559. start = PCIBIOS_MIN_MEM;
  560. end = ~0U;
  561. }
  562. do {
  563. if (allocate_resource(root, res, size, start, end, align,
  564. NULL, NULL) == 0) {
  565. return 1;
  566. }
  567. size = size/2;
  568. align = size;
  569. } while (size >= min);
  570. return 0;
  571. }
  572. static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
  573. u32 min)
  574. {
  575. struct resource *root;
  576. int i;
  577. pci_bus_for_each_resource(socket->dev->bus, root, i) {
  578. if (!root)
  579. continue;
  580. if ((res->flags ^ root->flags) &
  581. (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
  582. continue; /* Wrong type */
  583. if (yenta_search_one_res(root, res, min))
  584. return 1;
  585. }
  586. return 0;
  587. }
  588. static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
  589. {
  590. struct pci_dev *dev = socket->dev;
  591. struct resource *res;
  592. struct pci_bus_region region;
  593. unsigned mask;
  594. res = &dev->resource[nr];
  595. /* Already allocated? */
  596. if (res->parent)
  597. return 0;
  598. /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
  599. mask = ~0xfff;
  600. if (type & IORESOURCE_IO)
  601. mask = ~3;
  602. res->name = dev->subordinate->name;
  603. res->flags = type;
  604. region.start = config_readl(socket, addr_start) & mask;
  605. region.end = config_readl(socket, addr_end) | ~mask;
  606. if (region.start && region.end > region.start && !override_bios) {
  607. pcibios_bus_to_resource(dev->bus, res, &region);
  608. if (pci_claim_resource(dev, nr) == 0)
  609. return 0;
  610. dev_info(&dev->dev,
  611. "Preassigned resource %d busy or not available, reconfiguring...\n",
  612. nr);
  613. }
  614. if (type & IORESOURCE_IO) {
  615. if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
  616. (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
  617. (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
  618. return 1;
  619. } else {
  620. if (type & IORESOURCE_PREFETCH) {
  621. if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
  622. (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
  623. (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
  624. return 1;
  625. /* Approximating prefetchable by non-prefetchable */
  626. res->flags = IORESOURCE_MEM;
  627. }
  628. if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
  629. (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
  630. (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
  631. return 1;
  632. }
  633. dev_info(&dev->dev,
  634. "no resource of type %x available, trying to continue...\n",
  635. type);
  636. res->start = res->end = res->flags = 0;
  637. return 0;
  638. }
  639. static void yenta_free_res(struct yenta_socket *socket, int nr)
  640. {
  641. struct pci_dev *dev = socket->dev;
  642. struct resource *res;
  643. res = &dev->resource[nr];
  644. if (res->start != 0 && res->end != 0)
  645. release_resource(res);
  646. res->start = res->end = res->flags = 0;
  647. }
  648. /*
  649. * Allocate the bridge mappings for the device..
  650. */
  651. static void yenta_allocate_resources(struct yenta_socket *socket)
  652. {
  653. int program = 0;
  654. program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW,
  655. IORESOURCE_IO,
  656. PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
  657. program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW,
  658. IORESOURCE_IO,
  659. PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
  660. program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW,
  661. IORESOURCE_MEM | IORESOURCE_PREFETCH,
  662. PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
  663. program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW,
  664. IORESOURCE_MEM,
  665. PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
  666. if (program)
  667. pci_setup_cardbus(socket->dev->subordinate);
  668. }
  669. /*
  670. * Free the bridge mappings for the device..
  671. */
  672. static void yenta_free_resources(struct yenta_socket *socket)
  673. {
  674. yenta_free_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW);
  675. yenta_free_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW);
  676. yenta_free_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW);
  677. yenta_free_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW);
  678. }
  679. /*
  680. * Close it down - release our resources and go home..
  681. */
  682. static void yenta_close(struct pci_dev *dev)
  683. {
  684. struct yenta_socket *sock = pci_get_drvdata(dev);
  685. /* Remove the register attributes */
  686. device_remove_file(&dev->dev, &dev_attr_yenta_registers);
  687. /* we don't want a dying socket registered */
  688. pcmcia_unregister_socket(&sock->socket);
  689. /* Disable all events so we don't die in an IRQ storm */
  690. cb_writel(sock, CB_SOCKET_MASK, 0x0);
  691. exca_writeb(sock, I365_CSCINT, 0);
  692. if (sock->cb_irq)
  693. free_irq(sock->cb_irq, sock);
  694. else
  695. del_timer_sync(&sock->poll_timer);
  696. iounmap(sock->base);
  697. yenta_free_resources(sock);
  698. pci_release_regions(dev);
  699. pci_disable_device(dev);
  700. pci_set_drvdata(dev, NULL);
  701. kfree(sock);
  702. }
  703. static struct pccard_operations yenta_socket_operations = {
  704. .init = yenta_sock_init,
  705. .suspend = yenta_sock_suspend,
  706. .get_status = yenta_get_status,
  707. .set_socket = yenta_set_socket,
  708. .set_io_map = yenta_set_io_map,
  709. .set_mem_map = yenta_set_mem_map,
  710. };
  711. #ifdef CONFIG_YENTA_TI
  712. #include "ti113x.h"
  713. #endif
  714. #ifdef CONFIG_YENTA_RICOH
  715. #include "ricoh.h"
  716. #endif
  717. #ifdef CONFIG_YENTA_TOSHIBA
  718. #include "topic.h"
  719. #endif
  720. #ifdef CONFIG_YENTA_O2
  721. #include "o2micro.h"
  722. #endif
  723. enum {
  724. CARDBUS_TYPE_DEFAULT = -1,
  725. CARDBUS_TYPE_TI,
  726. CARDBUS_TYPE_TI113X,
  727. CARDBUS_TYPE_TI12XX,
  728. CARDBUS_TYPE_TI1250,
  729. CARDBUS_TYPE_RICOH,
  730. CARDBUS_TYPE_TOPIC95,
  731. CARDBUS_TYPE_TOPIC97,
  732. CARDBUS_TYPE_O2MICRO,
  733. CARDBUS_TYPE_ENE,
  734. };
  735. /*
  736. * Different cardbus controllers have slightly different
  737. * initialization sequences etc details. List them here..
  738. */
  739. static struct cardbus_type cardbus_type[] = {
  740. #ifdef CONFIG_YENTA_TI
  741. [CARDBUS_TYPE_TI] = {
  742. .override = ti_override,
  743. .save_state = ti_save_state,
  744. .restore_state = ti_restore_state,
  745. .sock_init = ti_init,
  746. },
  747. [CARDBUS_TYPE_TI113X] = {
  748. .override = ti113x_override,
  749. .save_state = ti_save_state,
  750. .restore_state = ti_restore_state,
  751. .sock_init = ti_init,
  752. },
  753. [CARDBUS_TYPE_TI12XX] = {
  754. .override = ti12xx_override,
  755. .save_state = ti_save_state,
  756. .restore_state = ti_restore_state,
  757. .sock_init = ti_init,
  758. },
  759. [CARDBUS_TYPE_TI1250] = {
  760. .override = ti1250_override,
  761. .save_state = ti_save_state,
  762. .restore_state = ti_restore_state,
  763. .sock_init = ti_init,
  764. },
  765. [CARDBUS_TYPE_ENE] = {
  766. .override = ene_override,
  767. .save_state = ti_save_state,
  768. .restore_state = ti_restore_state,
  769. .sock_init = ti_init,
  770. },
  771. #endif
  772. #ifdef CONFIG_YENTA_RICOH
  773. [CARDBUS_TYPE_RICOH] = {
  774. .override = ricoh_override,
  775. .save_state = ricoh_save_state,
  776. .restore_state = ricoh_restore_state,
  777. },
  778. #endif
  779. #ifdef CONFIG_YENTA_TOSHIBA
  780. [CARDBUS_TYPE_TOPIC95] = {
  781. .override = topic95_override,
  782. },
  783. [CARDBUS_TYPE_TOPIC97] = {
  784. .override = topic97_override,
  785. },
  786. #endif
  787. #ifdef CONFIG_YENTA_O2
  788. [CARDBUS_TYPE_O2MICRO] = {
  789. .override = o2micro_override,
  790. .restore_state = o2micro_restore_state,
  791. },
  792. #endif
  793. };
  794. static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
  795. {
  796. int i;
  797. unsigned long val;
  798. u32 mask;
  799. u8 reg;
  800. /*
  801. * Probe for usable interrupts using the force
  802. * register to generate bogus card status events.
  803. */
  804. cb_writel(socket, CB_SOCKET_EVENT, -1);
  805. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  806. reg = exca_readb(socket, I365_CSCINT);
  807. exca_writeb(socket, I365_CSCINT, 0);
  808. val = probe_irq_on() & isa_irq_mask;
  809. for (i = 1; i < 16; i++) {
  810. if (!((val >> i) & 1))
  811. continue;
  812. exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
  813. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  814. udelay(100);
  815. cb_writel(socket, CB_SOCKET_EVENT, -1);
  816. }
  817. cb_writel(socket, CB_SOCKET_MASK, 0);
  818. exca_writeb(socket, I365_CSCINT, reg);
  819. mask = probe_irq_mask(val) & 0xffff;
  820. return mask;
  821. }
  822. /*
  823. * yenta PCI irq probing.
  824. * currently only used in the TI/EnE initialization code
  825. */
  826. #ifdef CONFIG_YENTA_TI
  827. /* interrupt handler, only used during probing */
  828. static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
  829. {
  830. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  831. u8 csc;
  832. u32 cb_event;
  833. /* Clear interrupt status for the event */
  834. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  835. cb_writel(socket, CB_SOCKET_EVENT, -1);
  836. csc = exca_readb(socket, I365_CSC);
  837. if (cb_event || csc) {
  838. socket->probe_status = 1;
  839. return IRQ_HANDLED;
  840. }
  841. return IRQ_NONE;
  842. }
  843. /* probes the PCI interrupt, use only on override functions */
  844. static int yenta_probe_cb_irq(struct yenta_socket *socket)
  845. {
  846. u8 reg = 0;
  847. if (!socket->cb_irq)
  848. return -1;
  849. socket->probe_status = 0;
  850. if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
  851. dev_warn(&socket->dev->dev,
  852. "request_irq() in yenta_probe_cb_irq() failed!\n");
  853. return -1;
  854. }
  855. /* generate interrupt, wait */
  856. if (!socket->dev->irq)
  857. reg = exca_readb(socket, I365_CSCINT);
  858. exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
  859. cb_writel(socket, CB_SOCKET_EVENT, -1);
  860. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  861. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  862. msleep(100);
  863. /* disable interrupts */
  864. cb_writel(socket, CB_SOCKET_MASK, 0);
  865. exca_writeb(socket, I365_CSCINT, reg);
  866. cb_writel(socket, CB_SOCKET_EVENT, -1);
  867. exca_readb(socket, I365_CSC);
  868. free_irq(socket->cb_irq, socket);
  869. return (int) socket->probe_status;
  870. }
  871. #endif /* CONFIG_YENTA_TI */
  872. /*
  873. * Set static data that doesn't need re-initializing..
  874. */
  875. static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
  876. {
  877. socket->socket.pci_irq = socket->cb_irq;
  878. if (isa_probe)
  879. socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
  880. else
  881. socket->socket.irq_mask = 0;
  882. dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
  883. socket->socket.irq_mask, socket->cb_irq);
  884. }
  885. /*
  886. * Initialize the standard cardbus registers
  887. */
  888. static void yenta_config_init(struct yenta_socket *socket)
  889. {
  890. u16 bridge;
  891. struct pci_dev *dev = socket->dev;
  892. struct pci_bus_region region;
  893. pcibios_resource_to_bus(socket->dev->bus, &region, &dev->resource[0]);
  894. config_writel(socket, CB_LEGACY_MODE_BASE, 0);
  895. config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
  896. config_writew(socket, PCI_COMMAND,
  897. PCI_COMMAND_IO |
  898. PCI_COMMAND_MEMORY |
  899. PCI_COMMAND_MASTER |
  900. PCI_COMMAND_WAIT);
  901. /* MAGIC NUMBERS! Fixme */
  902. config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
  903. config_writeb(socket, PCI_LATENCY_TIMER, 168);
  904. config_writel(socket, PCI_PRIMARY_BUS,
  905. (176 << 24) | /* sec. latency timer */
  906. ((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */
  907. ((unsigned int)dev->subordinate->busn_res.start << 8) | /* secondary bus */
  908. dev->subordinate->primary); /* primary bus */
  909. /*
  910. * Set up the bridging state:
  911. * - enable write posting.
  912. * - memory window 0 prefetchable, window 1 non-prefetchable
  913. * - PCI interrupts enabled if a PCI interrupt exists..
  914. */
  915. bridge = config_readw(socket, CB_BRIDGE_CONTROL);
  916. bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
  917. bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
  918. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  919. }
  920. /**
  921. * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
  922. * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
  923. *
  924. * Checks if devices on the bus which the CardBus bridge bridges to would be
  925. * invisible during PCI scans because of a misconfigured subordinate number
  926. * of the parent brige - some BIOSes seem to be too lazy to set it right.
  927. * Does the fixup carefully by checking how far it can go without conflicts.
  928. * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
  929. */
  930. static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
  931. {
  932. struct pci_bus *sibling;
  933. unsigned char upper_limit;
  934. /*
  935. * We only check and fix the parent bridge: All systems which need
  936. * this fixup that have been reviewed are laptops and the only bridge
  937. * which needed fixing was the parent bridge of the CardBus bridge:
  938. */
  939. struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
  940. /* Check bus numbers are already set up correctly: */
  941. if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end)
  942. return; /* The subordinate number is ok, nothing to do */
  943. if (!bridge_to_fix->parent)
  944. return; /* Root bridges are ok */
  945. /* stay within the limits of the bus range of the parent: */
  946. upper_limit = bridge_to_fix->parent->busn_res.end;
  947. /* check the bus ranges of all sibling bridges to prevent overlap */
  948. list_for_each_entry(sibling, &bridge_to_fix->parent->children,
  949. node) {
  950. /*
  951. * If the sibling has a higher secondary bus number
  952. * and it's secondary is equal or smaller than our
  953. * current upper limit, set the new upper limit to
  954. * the bus number below the sibling's range:
  955. */
  956. if (sibling->busn_res.start > bridge_to_fix->busn_res.end
  957. && sibling->busn_res.start <= upper_limit)
  958. upper_limit = sibling->busn_res.start - 1;
  959. }
  960. /* Show that the wanted subordinate number is not possible: */
  961. if (cardbus_bridge->busn_res.end > upper_limit)
  962. dev_warn(&cardbus_bridge->dev,
  963. "Upper limit for fixing this bridge's parent bridge: #%02x\n",
  964. upper_limit);
  965. /* If we have room to increase the bridge's subordinate number, */
  966. if (bridge_to_fix->busn_res.end < upper_limit) {
  967. /* use the highest number of the hidden bus, within limits */
  968. unsigned char subordinate_to_assign =
  969. min_t(int, cardbus_bridge->busn_res.end, upper_limit);
  970. dev_info(&bridge_to_fix->dev,
  971. "Raising subordinate bus# of parent bus (#%02x) from #%02x to #%02x\n",
  972. bridge_to_fix->number,
  973. (int)bridge_to_fix->busn_res.end,
  974. subordinate_to_assign);
  975. /* Save the new subordinate in the bus struct of the bridge */
  976. bridge_to_fix->busn_res.end = subordinate_to_assign;
  977. /* and update the PCI config space with the new subordinate */
  978. pci_write_config_byte(bridge_to_fix->self,
  979. PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end);
  980. }
  981. }
  982. /*
  983. * Initialize a cardbus controller. Make sure we have a usable
  984. * interrupt, and that we can map the cardbus area. Fill in the
  985. * socket information structure..
  986. */
  987. static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
  988. {
  989. struct yenta_socket *socket;
  990. int ret;
  991. /*
  992. * If we failed to assign proper bus numbers for this cardbus
  993. * controller during PCI probe, its subordinate pci_bus is NULL.
  994. * Bail out if so.
  995. */
  996. if (!dev->subordinate) {
  997. dev_err(&dev->dev, "no bus associated! (try 'pci=assign-busses')\n");
  998. return -ENODEV;
  999. }
  1000. socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
  1001. if (!socket)
  1002. return -ENOMEM;
  1003. /* prepare pcmcia_socket */
  1004. socket->socket.ops = &yenta_socket_operations;
  1005. socket->socket.resource_ops = &pccard_nonstatic_ops;
  1006. socket->socket.dev.parent = &dev->dev;
  1007. socket->socket.driver_data = socket;
  1008. socket->socket.owner = THIS_MODULE;
  1009. socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
  1010. socket->socket.map_size = 0x1000;
  1011. socket->socket.cb_dev = dev;
  1012. /* prepare struct yenta_socket */
  1013. socket->dev = dev;
  1014. pci_set_drvdata(dev, socket);
  1015. /*
  1016. * Do some basic sanity checking..
  1017. */
  1018. if (pci_enable_device(dev)) {
  1019. ret = -EBUSY;
  1020. goto free;
  1021. }
  1022. ret = pci_request_regions(dev, "yenta_socket");
  1023. if (ret)
  1024. goto disable;
  1025. if (!pci_resource_start(dev, 0)) {
  1026. dev_err(&dev->dev, "No cardbus resource!\n");
  1027. ret = -ENODEV;
  1028. goto release;
  1029. }
  1030. /*
  1031. * Ok, start setup.. Map the cardbus registers,
  1032. * and request the IRQ.
  1033. */
  1034. socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
  1035. if (!socket->base) {
  1036. ret = -ENOMEM;
  1037. goto release;
  1038. }
  1039. /*
  1040. * report the subsystem vendor and device for help debugging
  1041. * the irq stuff...
  1042. */
  1043. dev_info(&dev->dev, "CardBus bridge found [%04x:%04x]\n",
  1044. dev->subsystem_vendor, dev->subsystem_device);
  1045. yenta_config_init(socket);
  1046. /* Disable all events */
  1047. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  1048. /* Set up the bridge regions.. */
  1049. yenta_allocate_resources(socket);
  1050. socket->cb_irq = dev->irq;
  1051. /* Do we have special options for the device? */
  1052. if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
  1053. id->driver_data < ARRAY_SIZE(cardbus_type)) {
  1054. socket->type = &cardbus_type[id->driver_data];
  1055. ret = socket->type->override(socket);
  1056. if (ret < 0)
  1057. goto unmap;
  1058. }
  1059. /* We must finish initialization here */
  1060. if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
  1061. /* No IRQ or request_irq failed. Poll */
  1062. socket->cb_irq = 0; /* But zero is a valid IRQ number. */
  1063. timer_setup(&socket->poll_timer, yenta_interrupt_wrapper, 0);
  1064. mod_timer(&socket->poll_timer, jiffies + HZ);
  1065. dev_info(&dev->dev,
  1066. "no PCI IRQ, CardBus support disabled for this socket.\n");
  1067. dev_info(&dev->dev,
  1068. "check your BIOS CardBus, BIOS IRQ or ACPI settings.\n");
  1069. } else {
  1070. socket->socket.features |= SS_CAP_CARDBUS;
  1071. }
  1072. /* Figure out what the dang thing can do for the PCMCIA layer... */
  1073. yenta_interrogate(socket);
  1074. yenta_get_socket_capabilities(socket, isa_interrupts);
  1075. dev_info(&dev->dev, "Socket status: %08x\n",
  1076. cb_readl(socket, CB_SOCKET_STATE));
  1077. yenta_fixup_parent_bridge(dev->subordinate);
  1078. /* Register it with the pcmcia layer.. */
  1079. ret = pcmcia_register_socket(&socket->socket);
  1080. if (ret)
  1081. goto free_irq;
  1082. /* Add the yenta register attributes */
  1083. ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
  1084. if (ret)
  1085. goto unregister_socket;
  1086. return ret;
  1087. /* error path... */
  1088. unregister_socket:
  1089. pcmcia_unregister_socket(&socket->socket);
  1090. free_irq:
  1091. if (socket->cb_irq)
  1092. free_irq(socket->cb_irq, socket);
  1093. else
  1094. del_timer_sync(&socket->poll_timer);
  1095. unmap:
  1096. iounmap(socket->base);
  1097. yenta_free_resources(socket);
  1098. release:
  1099. pci_release_regions(dev);
  1100. disable:
  1101. pci_disable_device(dev);
  1102. free:
  1103. pci_set_drvdata(dev, NULL);
  1104. kfree(socket);
  1105. return ret;
  1106. }
  1107. #ifdef CONFIG_PM
  1108. static int yenta_dev_suspend_noirq(struct device *dev)
  1109. {
  1110. struct pci_dev *pdev = to_pci_dev(dev);
  1111. struct yenta_socket *socket = pci_get_drvdata(pdev);
  1112. if (!socket)
  1113. return 0;
  1114. if (socket->type && socket->type->save_state)
  1115. socket->type->save_state(socket);
  1116. pci_save_state(pdev);
  1117. pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
  1118. pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
  1119. pci_disable_device(pdev);
  1120. return 0;
  1121. }
  1122. static int yenta_dev_resume_noirq(struct device *dev)
  1123. {
  1124. struct pci_dev *pdev = to_pci_dev(dev);
  1125. struct yenta_socket *socket = pci_get_drvdata(pdev);
  1126. int ret;
  1127. if (!socket)
  1128. return 0;
  1129. pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
  1130. pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
  1131. ret = pci_enable_device(pdev);
  1132. if (ret)
  1133. return ret;
  1134. pci_set_master(pdev);
  1135. if (socket->type && socket->type->restore_state)
  1136. socket->type->restore_state(socket);
  1137. return 0;
  1138. }
  1139. static const struct dev_pm_ops yenta_pm_ops = {
  1140. .suspend_noirq = yenta_dev_suspend_noirq,
  1141. .resume_noirq = yenta_dev_resume_noirq,
  1142. .freeze_noirq = yenta_dev_suspend_noirq,
  1143. .thaw_noirq = yenta_dev_resume_noirq,
  1144. .poweroff_noirq = yenta_dev_suspend_noirq,
  1145. .restore_noirq = yenta_dev_resume_noirq,
  1146. };
  1147. #define YENTA_PM_OPS (&yenta_pm_ops)
  1148. #else
  1149. #define YENTA_PM_OPS NULL
  1150. #endif
  1151. #define CB_ID(vend, dev, type) \
  1152. { \
  1153. .vendor = vend, \
  1154. .device = dev, \
  1155. .subvendor = PCI_ANY_ID, \
  1156. .subdevice = PCI_ANY_ID, \
  1157. .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
  1158. .class_mask = ~0, \
  1159. .driver_data = CARDBUS_TYPE_##type, \
  1160. }
  1161. static const struct pci_device_id yenta_table[] = {
  1162. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
  1163. /*
  1164. * TBD: Check if these TI variants can use more
  1165. * advanced overrides instead. (I can't get the
  1166. * data sheets for these devices. --rmk)
  1167. */
  1168. #ifdef CONFIG_YENTA_TI
  1169. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
  1170. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
  1171. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
  1172. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
  1173. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
  1174. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
  1175. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
  1176. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
  1177. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
  1178. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
  1179. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
  1180. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
  1181. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
  1182. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
  1183. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
  1184. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
  1185. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
  1186. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
  1187. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
  1188. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
  1189. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
  1190. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
  1191. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
  1192. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
  1193. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
  1194. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
  1195. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
  1196. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
  1197. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
  1198. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
  1199. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
  1200. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
  1201. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
  1202. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
  1203. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
  1204. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
  1205. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
  1206. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
  1207. #endif /* CONFIG_YENTA_TI */
  1208. #ifdef CONFIG_YENTA_RICOH
  1209. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
  1210. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
  1211. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
  1212. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
  1213. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
  1214. #endif
  1215. #ifdef CONFIG_YENTA_TOSHIBA
  1216. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
  1217. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
  1218. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
  1219. #endif
  1220. #ifdef CONFIG_YENTA_O2
  1221. CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
  1222. #endif
  1223. /* match any cardbus bridge */
  1224. CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
  1225. { /* all zeroes */ }
  1226. };
  1227. MODULE_DEVICE_TABLE(pci, yenta_table);
  1228. static struct pci_driver yenta_cardbus_driver = {
  1229. .name = "yenta_cardbus",
  1230. .id_table = yenta_table,
  1231. .probe = yenta_probe,
  1232. .remove = yenta_close,
  1233. .driver.pm = YENTA_PM_OPS,
  1234. };
  1235. module_pci_driver(yenta_cardbus_driver);
  1236. MODULE_LICENSE("GPL");