soc_common.h 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * linux/drivers/pcmcia/soc_common.h
  4. *
  5. * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
  6. *
  7. * This file contains definitions for the PCMCIA support code common to
  8. * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
  9. */
  10. #ifndef _ASM_ARCH_PCMCIA
  11. #define _ASM_ARCH_PCMCIA
  12. /* include the world */
  13. #include <linux/clk.h>
  14. #include <linux/cpufreq.h>
  15. #include <pcmcia/ss.h>
  16. #include <pcmcia/cistpl.h>
  17. struct device;
  18. struct gpio_desc;
  19. struct pcmcia_low_level;
  20. struct regulator;
  21. struct soc_pcmcia_regulator {
  22. struct regulator *reg;
  23. bool on;
  24. };
  25. /*
  26. * This structure encapsulates per-socket state which we might need to
  27. * use when responding to a Card Services query of some kind.
  28. */
  29. struct soc_pcmcia_socket {
  30. struct pcmcia_socket socket;
  31. /*
  32. * Info from low level handler
  33. */
  34. unsigned int nr;
  35. struct clk *clk;
  36. /*
  37. * Core PCMCIA state
  38. */
  39. const struct pcmcia_low_level *ops;
  40. unsigned int status;
  41. socket_state_t cs_state;
  42. unsigned short spd_io[MAX_IO_WIN];
  43. unsigned short spd_mem[MAX_WIN];
  44. unsigned short spd_attr[MAX_WIN];
  45. struct resource res_skt;
  46. struct resource res_io;
  47. struct resource res_mem;
  48. struct resource res_attr;
  49. void __iomem *virt_io;
  50. struct {
  51. int gpio;
  52. struct gpio_desc *desc;
  53. unsigned int irq;
  54. const char *name;
  55. } stat[6];
  56. #define SOC_STAT_CD 0 /* Card detect */
  57. #define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */
  58. #define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */
  59. #define SOC_STAT_RDY 3 /* Ready / Interrupt */
  60. #define SOC_STAT_VS1 4 /* Voltage sense 1 */
  61. #define SOC_STAT_VS2 5 /* Voltage sense 2 */
  62. struct gpio_desc *gpio_reset;
  63. struct gpio_desc *gpio_bus_enable;
  64. struct soc_pcmcia_regulator vcc;
  65. struct soc_pcmcia_regulator vpp;
  66. unsigned int irq_state;
  67. #ifdef CONFIG_CPU_FREQ
  68. struct notifier_block cpufreq_nb;
  69. #endif
  70. struct timer_list poll_timer;
  71. struct list_head node;
  72. void *driver_data;
  73. };
  74. struct skt_dev_info {
  75. int nskt;
  76. struct soc_pcmcia_socket skt[];
  77. };
  78. struct pcmcia_state {
  79. unsigned detect: 1,
  80. ready: 1,
  81. bvd1: 1,
  82. bvd2: 1,
  83. wrprot: 1,
  84. vs_3v: 1,
  85. vs_Xv: 1;
  86. };
  87. struct pcmcia_low_level {
  88. struct module *owner;
  89. /* first socket in system */
  90. int first;
  91. /* nr of sockets */
  92. int nr;
  93. int (*hw_init)(struct soc_pcmcia_socket *);
  94. void (*hw_shutdown)(struct soc_pcmcia_socket *);
  95. void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
  96. int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
  97. /*
  98. * Enable card status IRQs on (re-)initialisation. This can
  99. * be called at initialisation, power management event, or
  100. * pcmcia event.
  101. */
  102. void (*socket_init)(struct soc_pcmcia_socket *);
  103. /*
  104. * Disable card status IRQs and PCMCIA bus on suspend.
  105. */
  106. void (*socket_suspend)(struct soc_pcmcia_socket *);
  107. /*
  108. * Hardware specific timing routines.
  109. * If provided, the get_timing routine overrides the SOC default.
  110. */
  111. unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
  112. int (*set_timing)(struct soc_pcmcia_socket *);
  113. int (*show_timing)(struct soc_pcmcia_socket *, char *);
  114. #ifdef CONFIG_CPU_FREQ
  115. /*
  116. * CPUFREQ support.
  117. */
  118. int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
  119. #endif
  120. };
  121. struct soc_pcmcia_timing {
  122. unsigned short io;
  123. unsigned short mem;
  124. unsigned short attr;
  125. };
  126. extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
  127. void soc_pcmcia_init_one(struct soc_pcmcia_socket *skt,
  128. const struct pcmcia_low_level *ops, struct device *dev);
  129. void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
  130. int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
  131. int soc_pcmcia_request_gpiods(struct soc_pcmcia_socket *skt);
  132. void soc_common_cf_socket_state(struct soc_pcmcia_socket *skt,
  133. struct pcmcia_state *state);
  134. int soc_pcmcia_regulator_set(struct soc_pcmcia_socket *skt,
  135. struct soc_pcmcia_regulator *r, int v);
  136. #ifdef CONFIG_PCMCIA_DEBUG
  137. extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
  138. int lvl, const char *fmt, ...);
  139. #define debug(skt, lvl, fmt, arg...) \
  140. soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
  141. #else
  142. #define debug(skt, lvl, fmt, arg...) do { } while (0)
  143. #endif
  144. /*
  145. * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
  146. * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
  147. * a minimum value of 165ns, as well. Section 4.7.2 (describing
  148. * common and attribute memory write timing) says that twWE has a
  149. * minimum value of 150ns for a 250ns cycle time (for 5V operation;
  150. * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
  151. * operation, also section 4.7.4). Section 4.7.3 says that taOE
  152. * has a maximum value of 150ns for a 300ns cycle time (for 5V
  153. * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
  154. *
  155. * When configuring memory maps, Card Services appears to adopt the policy
  156. * that a memory access time of "0" means "use the default." The default
  157. * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
  158. * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
  159. * memory command width time is 300ns.
  160. */
  161. #define SOC_PCMCIA_IO_ACCESS (165)
  162. #define SOC_PCMCIA_5V_MEM_ACCESS (150)
  163. #define SOC_PCMCIA_3V_MEM_ACCESS (300)
  164. #define SOC_PCMCIA_ATTR_MEM_ACCESS (300)
  165. /*
  166. * The socket driver actually works nicely in interrupt-driven form,
  167. * so the (relatively infrequent) polling is "just to be sure."
  168. */
  169. #define SOC_PCMCIA_POLL_PERIOD (2*HZ)
  170. /* I/O pins replacing memory pins
  171. * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
  172. *
  173. * These signals change meaning when going from memory-only to
  174. * memory-or-I/O interface:
  175. */
  176. #define iostschg bvd1
  177. #define iospkr bvd2
  178. #endif