pd6729.c 18 KB

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  1. /*
  2. * Driver for the Cirrus PD6729 PCI-PCMCIA bridge.
  3. *
  4. * Based on the i82092.c driver.
  5. *
  6. * This software may be used and distributed according to the terms of
  7. * the GNU General Public License, incorporated herein by reference.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/slab.h>
  12. #include <linux/pci.h>
  13. #include <linux/init.h>
  14. #include <linux/workqueue.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/device.h>
  17. #include <linux/io.h>
  18. #include <pcmcia/ss.h>
  19. #include "pd6729.h"
  20. #include "i82365.h"
  21. #include "cirrus.h"
  22. MODULE_LICENSE("GPL");
  23. MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge");
  24. MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>");
  25. #define MAX_SOCKETS 2
  26. /*
  27. * simple helper functions
  28. * External clock time, in nanoseconds. 120 ns = 8.33 MHz
  29. */
  30. #define to_cycles(ns) ((ns)/120)
  31. #ifndef NO_IRQ
  32. #define NO_IRQ ((unsigned int)(0))
  33. #endif
  34. /*
  35. * PARAMETERS
  36. * irq_mode=n
  37. * Specifies the interrupt delivery mode. The default (1) is to use PCI
  38. * interrupts; a value of 0 selects ISA interrupts. This must be set for
  39. * correct operation of PCI card readers.
  40. */
  41. static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */
  42. module_param(irq_mode, int, 0444);
  43. MODULE_PARM_DESC(irq_mode,
  44. "interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1");
  45. static DEFINE_SPINLOCK(port_lock);
  46. /* basic value read/write functions */
  47. static unsigned char indirect_read(struct pd6729_socket *socket,
  48. unsigned short reg)
  49. {
  50. unsigned long port;
  51. unsigned char val;
  52. unsigned long flags;
  53. spin_lock_irqsave(&port_lock, flags);
  54. reg += socket->number * 0x40;
  55. port = socket->io_base;
  56. outb(reg, port);
  57. val = inb(port + 1);
  58. spin_unlock_irqrestore(&port_lock, flags);
  59. return val;
  60. }
  61. static unsigned short indirect_read16(struct pd6729_socket *socket,
  62. unsigned short reg)
  63. {
  64. unsigned long port;
  65. unsigned short tmp;
  66. unsigned long flags;
  67. spin_lock_irqsave(&port_lock, flags);
  68. reg = reg + socket->number * 0x40;
  69. port = socket->io_base;
  70. outb(reg, port);
  71. tmp = inb(port + 1);
  72. reg++;
  73. outb(reg, port);
  74. tmp = tmp | (inb(port + 1) << 8);
  75. spin_unlock_irqrestore(&port_lock, flags);
  76. return tmp;
  77. }
  78. static void indirect_write(struct pd6729_socket *socket, unsigned short reg,
  79. unsigned char value)
  80. {
  81. unsigned long port;
  82. unsigned long flags;
  83. spin_lock_irqsave(&port_lock, flags);
  84. reg = reg + socket->number * 0x40;
  85. port = socket->io_base;
  86. outb(reg, port);
  87. outb(value, port + 1);
  88. spin_unlock_irqrestore(&port_lock, flags);
  89. }
  90. static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg,
  91. unsigned char mask)
  92. {
  93. unsigned long port;
  94. unsigned char val;
  95. unsigned long flags;
  96. spin_lock_irqsave(&port_lock, flags);
  97. reg = reg + socket->number * 0x40;
  98. port = socket->io_base;
  99. outb(reg, port);
  100. val = inb(port + 1);
  101. val |= mask;
  102. outb(reg, port);
  103. outb(val, port + 1);
  104. spin_unlock_irqrestore(&port_lock, flags);
  105. }
  106. static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg,
  107. unsigned char mask)
  108. {
  109. unsigned long port;
  110. unsigned char val;
  111. unsigned long flags;
  112. spin_lock_irqsave(&port_lock, flags);
  113. reg = reg + socket->number * 0x40;
  114. port = socket->io_base;
  115. outb(reg, port);
  116. val = inb(port + 1);
  117. val &= ~mask;
  118. outb(reg, port);
  119. outb(val, port + 1);
  120. spin_unlock_irqrestore(&port_lock, flags);
  121. }
  122. static void indirect_write16(struct pd6729_socket *socket, unsigned short reg,
  123. unsigned short value)
  124. {
  125. unsigned long port;
  126. unsigned char val;
  127. unsigned long flags;
  128. spin_lock_irqsave(&port_lock, flags);
  129. reg = reg + socket->number * 0x40;
  130. port = socket->io_base;
  131. outb(reg, port);
  132. val = value & 255;
  133. outb(val, port + 1);
  134. reg++;
  135. outb(reg, port);
  136. val = value >> 8;
  137. outb(val, port + 1);
  138. spin_unlock_irqrestore(&port_lock, flags);
  139. }
  140. /* Interrupt handler functionality */
  141. static irqreturn_t pd6729_interrupt(int irq, void *dev)
  142. {
  143. struct pd6729_socket *socket = (struct pd6729_socket *)dev;
  144. int i;
  145. int loopcount = 0;
  146. int handled = 0;
  147. unsigned int events, active = 0;
  148. while (1) {
  149. loopcount++;
  150. if (loopcount > 20) {
  151. printk(KERN_ERR "pd6729: infinite eventloop "
  152. "in interrupt\n");
  153. break;
  154. }
  155. active = 0;
  156. for (i = 0; i < MAX_SOCKETS; i++) {
  157. unsigned int csc;
  158. /* card status change register */
  159. csc = indirect_read(&socket[i], I365_CSC);
  160. if (csc == 0) /* no events on this socket */
  161. continue;
  162. handled = 1;
  163. events = 0;
  164. if (csc & I365_CSC_DETECT) {
  165. events |= SS_DETECT;
  166. dev_vdbg(&socket[i].socket.dev,
  167. "Card detected in socket %i!\n", i);
  168. }
  169. if (indirect_read(&socket[i], I365_INTCTL)
  170. & I365_PC_IOCARD) {
  171. /* For IO/CARDS, bit 0 means "read the card" */
  172. events |= (csc & I365_CSC_STSCHG)
  173. ? SS_STSCHG : 0;
  174. } else {
  175. /* Check for battery/ready events */
  176. events |= (csc & I365_CSC_BVD1)
  177. ? SS_BATDEAD : 0;
  178. events |= (csc & I365_CSC_BVD2)
  179. ? SS_BATWARN : 0;
  180. events |= (csc & I365_CSC_READY)
  181. ? SS_READY : 0;
  182. }
  183. if (events)
  184. pcmcia_parse_events(&socket[i].socket, events);
  185. active |= events;
  186. }
  187. if (active == 0) /* no more events to handle */
  188. break;
  189. }
  190. return IRQ_RETVAL(handled);
  191. }
  192. /* socket functions */
  193. static void pd6729_interrupt_wrapper(struct timer_list *t)
  194. {
  195. struct pd6729_socket *socket = from_timer(socket, t, poll_timer);
  196. pd6729_interrupt(0, (void *)socket);
  197. mod_timer(&socket->poll_timer, jiffies + HZ);
  198. }
  199. static int pd6729_get_status(struct pcmcia_socket *sock, u_int *value)
  200. {
  201. struct pd6729_socket *socket
  202. = container_of(sock, struct pd6729_socket, socket);
  203. unsigned int status;
  204. unsigned int data;
  205. struct pd6729_socket *t;
  206. /* Interface Status Register */
  207. status = indirect_read(socket, I365_STATUS);
  208. *value = 0;
  209. if ((status & I365_CS_DETECT) == I365_CS_DETECT)
  210. *value |= SS_DETECT;
  211. /*
  212. * IO cards have a different meaning of bits 0,1
  213. * Also notice the inverse-logic on the bits
  214. */
  215. if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) {
  216. /* IO card */
  217. if (!(status & I365_CS_STSCHG))
  218. *value |= SS_STSCHG;
  219. } else {
  220. /* non I/O card */
  221. if (!(status & I365_CS_BVD1))
  222. *value |= SS_BATDEAD;
  223. if (!(status & I365_CS_BVD2))
  224. *value |= SS_BATWARN;
  225. }
  226. if (status & I365_CS_WRPROT)
  227. *value |= SS_WRPROT; /* card is write protected */
  228. if (status & I365_CS_READY)
  229. *value |= SS_READY; /* card is not busy */
  230. if (status & I365_CS_POWERON)
  231. *value |= SS_POWERON; /* power is applied to the card */
  232. t = (socket->number) ? socket : socket + 1;
  233. indirect_write(t, PD67_EXT_INDEX, PD67_EXTERN_DATA);
  234. data = indirect_read16(t, PD67_EXT_DATA);
  235. *value |= (data & PD67_EXD_VS1(socket->number)) ? 0 : SS_3VCARD;
  236. return 0;
  237. }
  238. static int pd6729_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
  239. {
  240. struct pd6729_socket *socket
  241. = container_of(sock, struct pd6729_socket, socket);
  242. unsigned char reg, data;
  243. /* First, set the global controller options */
  244. indirect_write(socket, I365_GBLCTL, 0x00);
  245. indirect_write(socket, I365_GENCTL, 0x00);
  246. /* Values for the IGENC register */
  247. socket->card_irq = state->io_irq;
  248. reg = 0;
  249. /* The reset bit has "inverse" logic */
  250. if (!(state->flags & SS_RESET))
  251. reg |= I365_PC_RESET;
  252. if (state->flags & SS_IOCARD)
  253. reg |= I365_PC_IOCARD;
  254. /* IGENC, Interrupt and General Control Register */
  255. indirect_write(socket, I365_INTCTL, reg);
  256. /* Power registers */
  257. reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
  258. if (state->flags & SS_PWR_AUTO) {
  259. dev_dbg(&sock->dev, "Auto power\n");
  260. reg |= I365_PWR_AUTO; /* automatic power mngmnt */
  261. }
  262. if (state->flags & SS_OUTPUT_ENA) {
  263. dev_dbg(&sock->dev, "Power Enabled\n");
  264. reg |= I365_PWR_OUT; /* enable power */
  265. }
  266. switch (state->Vcc) {
  267. case 0:
  268. break;
  269. case 33:
  270. dev_dbg(&sock->dev,
  271. "setting voltage to Vcc to 3.3V on socket %i\n",
  272. socket->number);
  273. reg |= I365_VCC_5V;
  274. indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
  275. break;
  276. case 50:
  277. dev_dbg(&sock->dev,
  278. "setting voltage to Vcc to 5V on socket %i\n",
  279. socket->number);
  280. reg |= I365_VCC_5V;
  281. indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
  282. break;
  283. default:
  284. dev_dbg(&sock->dev,
  285. "pd6729_set_socket called with invalid VCC power "
  286. "value: %i\n", state->Vcc);
  287. return -EINVAL;
  288. }
  289. switch (state->Vpp) {
  290. case 0:
  291. dev_dbg(&sock->dev, "not setting Vpp on socket %i\n",
  292. socket->number);
  293. break;
  294. case 33:
  295. case 50:
  296. dev_dbg(&sock->dev, "setting Vpp to Vcc for socket %i\n",
  297. socket->number);
  298. reg |= I365_VPP1_5V;
  299. break;
  300. case 120:
  301. dev_dbg(&sock->dev, "setting Vpp to 12.0\n");
  302. reg |= I365_VPP1_12V;
  303. break;
  304. default:
  305. dev_dbg(&sock->dev, "pd6729: pd6729_set_socket called with "
  306. "invalid VPP power value: %i\n", state->Vpp);
  307. return -EINVAL;
  308. }
  309. /* only write if changed */
  310. if (reg != indirect_read(socket, I365_POWER))
  311. indirect_write(socket, I365_POWER, reg);
  312. if (irq_mode == 1) {
  313. /* all interrupts are to be done as PCI interrupts */
  314. data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ;
  315. } else
  316. data = 0;
  317. indirect_write(socket, PD67_EXT_INDEX, PD67_EXT_CTL_1);
  318. indirect_write(socket, PD67_EXT_DATA, data);
  319. /* Enable specific interrupt events */
  320. reg = 0x00;
  321. if (state->csc_mask & SS_DETECT)
  322. reg |= I365_CSC_DETECT;
  323. if (state->flags & SS_IOCARD) {
  324. if (state->csc_mask & SS_STSCHG)
  325. reg |= I365_CSC_STSCHG;
  326. } else {
  327. if (state->csc_mask & SS_BATDEAD)
  328. reg |= I365_CSC_BVD1;
  329. if (state->csc_mask & SS_BATWARN)
  330. reg |= I365_CSC_BVD2;
  331. if (state->csc_mask & SS_READY)
  332. reg |= I365_CSC_READY;
  333. }
  334. if (irq_mode == 1)
  335. reg |= 0x30; /* management IRQ: PCI INTA# = "irq 3" */
  336. indirect_write(socket, I365_CSCINT, reg);
  337. reg = indirect_read(socket, I365_INTCTL);
  338. if (irq_mode == 1)
  339. reg |= 0x03; /* card IRQ: PCI INTA# = "irq 3" */
  340. else
  341. reg |= socket->card_irq;
  342. indirect_write(socket, I365_INTCTL, reg);
  343. /* now clear the (probably bogus) pending stuff by doing a dummy read */
  344. (void)indirect_read(socket, I365_CSC);
  345. return 0;
  346. }
  347. static int pd6729_set_io_map(struct pcmcia_socket *sock,
  348. struct pccard_io_map *io)
  349. {
  350. struct pd6729_socket *socket
  351. = container_of(sock, struct pd6729_socket, socket);
  352. unsigned char map, ioctl;
  353. map = io->map;
  354. /* Check error conditions */
  355. if (map > 1) {
  356. dev_dbg(&sock->dev, "pd6729_set_io_map with invalid map\n");
  357. return -EINVAL;
  358. }
  359. /* Turn off the window before changing anything */
  360. if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map))
  361. indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map));
  362. /* dev_dbg(&sock->dev, "set_io_map: Setting range to %x - %x\n",
  363. io->start, io->stop);*/
  364. /* write the new values */
  365. indirect_write16(socket, I365_IO(map)+I365_W_START, io->start);
  366. indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop);
  367. ioctl = indirect_read(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
  368. if (io->flags & MAP_0WS)
  369. ioctl |= I365_IOCTL_0WS(map);
  370. if (io->flags & MAP_16BIT)
  371. ioctl |= I365_IOCTL_16BIT(map);
  372. if (io->flags & MAP_AUTOSZ)
  373. ioctl |= I365_IOCTL_IOCS16(map);
  374. indirect_write(socket, I365_IOCTL, ioctl);
  375. /* Turn the window back on if needed */
  376. if (io->flags & MAP_ACTIVE)
  377. indirect_setbit(socket, I365_ADDRWIN, I365_ENA_IO(map));
  378. return 0;
  379. }
  380. static int pd6729_set_mem_map(struct pcmcia_socket *sock,
  381. struct pccard_mem_map *mem)
  382. {
  383. struct pd6729_socket *socket
  384. = container_of(sock, struct pd6729_socket, socket);
  385. unsigned short base, i;
  386. unsigned char map;
  387. map = mem->map;
  388. if (map > 4) {
  389. dev_warn(&sock->dev, "invalid map requested\n");
  390. return -EINVAL;
  391. }
  392. if ((mem->res->start > mem->res->end) || (mem->speed > 1000)) {
  393. dev_warn(&sock->dev, "invalid invalid address / speed\n");
  394. return -EINVAL;
  395. }
  396. /* Turn off the window before changing anything */
  397. if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map))
  398. indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
  399. /* write the start address */
  400. base = I365_MEM(map);
  401. i = (mem->res->start >> 12) & 0x0fff;
  402. if (mem->flags & MAP_16BIT)
  403. i |= I365_MEM_16BIT;
  404. if (mem->flags & MAP_0WS)
  405. i |= I365_MEM_0WS;
  406. indirect_write16(socket, base + I365_W_START, i);
  407. /* write the stop address */
  408. i = (mem->res->end >> 12) & 0x0fff;
  409. switch (to_cycles(mem->speed)) {
  410. case 0:
  411. break;
  412. case 1:
  413. i |= I365_MEM_WS0;
  414. break;
  415. case 2:
  416. i |= I365_MEM_WS1;
  417. break;
  418. default:
  419. i |= I365_MEM_WS1 | I365_MEM_WS0;
  420. break;
  421. }
  422. indirect_write16(socket, base + I365_W_STOP, i);
  423. /* Take care of high byte */
  424. indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map));
  425. indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24);
  426. /* card start */
  427. i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff;
  428. if (mem->flags & MAP_WRPROT)
  429. i |= I365_MEM_WRPROT;
  430. if (mem->flags & MAP_ATTRIB) {
  431. /* dev_dbg(&sock->dev, "requesting attribute memory for "
  432. "socket %i\n", socket->number);*/
  433. i |= I365_MEM_REG;
  434. } else {
  435. /* dev_dbg(&sock->dev, "requesting normal memory for "
  436. "socket %i\n", socket->number);*/
  437. }
  438. indirect_write16(socket, base + I365_W_OFF, i);
  439. /* Enable the window if necessary */
  440. if (mem->flags & MAP_ACTIVE)
  441. indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
  442. return 0;
  443. }
  444. static int pd6729_init(struct pcmcia_socket *sock)
  445. {
  446. int i;
  447. struct resource res = { .end = 0x0fff };
  448. pccard_io_map io = { 0, 0, 0, 0, 1 };
  449. pccard_mem_map mem = { .res = &res, };
  450. pd6729_set_socket(sock, &dead_socket);
  451. for (i = 0; i < 2; i++) {
  452. io.map = i;
  453. pd6729_set_io_map(sock, &io);
  454. }
  455. for (i = 0; i < 5; i++) {
  456. mem.map = i;
  457. pd6729_set_mem_map(sock, &mem);
  458. }
  459. return 0;
  460. }
  461. /* the pccard structure and its functions */
  462. static struct pccard_operations pd6729_operations = {
  463. .init = pd6729_init,
  464. .get_status = pd6729_get_status,
  465. .set_socket = pd6729_set_socket,
  466. .set_io_map = pd6729_set_io_map,
  467. .set_mem_map = pd6729_set_mem_map,
  468. };
  469. static irqreturn_t pd6729_test(int irq, void *dev)
  470. {
  471. pr_devel("-> hit on irq %d\n", irq);
  472. return IRQ_HANDLED;
  473. }
  474. static int pd6729_check_irq(int irq)
  475. {
  476. int ret;
  477. ret = request_irq(irq, pd6729_test, IRQF_PROBE_SHARED, "x",
  478. pd6729_test);
  479. if (ret)
  480. return -1;
  481. free_irq(irq, pd6729_test);
  482. return 0;
  483. }
  484. static u_int pd6729_isa_scan(void)
  485. {
  486. u_int mask0, mask = 0;
  487. int i;
  488. if (irq_mode == 1) {
  489. printk(KERN_INFO "pd6729: PCI card interrupts, "
  490. "PCI status changes\n");
  491. return 0;
  492. }
  493. mask0 = PD67_MASK;
  494. /* just find interrupts that aren't in use */
  495. for (i = 0; i < 16; i++)
  496. if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0))
  497. mask |= (1 << i);
  498. printk(KERN_INFO "pd6729: ISA irqs = ");
  499. for (i = 0; i < 16; i++)
  500. if (mask & (1<<i))
  501. printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i);
  502. if (mask == 0)
  503. printk("none!");
  504. else
  505. printk(" polling status changes.\n");
  506. return mask;
  507. }
  508. static int pd6729_pci_probe(struct pci_dev *dev,
  509. const struct pci_device_id *id)
  510. {
  511. int i, j, ret;
  512. u_int mask;
  513. char configbyte;
  514. struct pd6729_socket *socket;
  515. socket = kcalloc(MAX_SOCKETS, sizeof(struct pd6729_socket),
  516. GFP_KERNEL);
  517. if (!socket) {
  518. dev_warn(&dev->dev, "failed to kzalloc socket.\n");
  519. return -ENOMEM;
  520. }
  521. ret = pci_enable_device(dev);
  522. if (ret) {
  523. dev_warn(&dev->dev, "failed to enable pci_device.\n");
  524. goto err_out_free_mem;
  525. }
  526. if (!pci_resource_start(dev, 0)) {
  527. dev_warn(&dev->dev, "refusing to load the driver as the "
  528. "io_base is NULL.\n");
  529. ret = -ENOMEM;
  530. goto err_out_disable;
  531. }
  532. dev_info(&dev->dev, "Cirrus PD6729 PCI to PCMCIA Bridge at 0x%llx "
  533. "on irq %d\n",
  534. (unsigned long long)pci_resource_start(dev, 0), dev->irq);
  535. /*
  536. * Since we have no memory BARs some firmware may not
  537. * have had PCI_COMMAND_MEMORY enabled, yet the device needs it.
  538. */
  539. pci_read_config_byte(dev, PCI_COMMAND, &configbyte);
  540. if (!(configbyte & PCI_COMMAND_MEMORY)) {
  541. dev_dbg(&dev->dev, "pd6729: Enabling PCI_COMMAND_MEMORY.\n");
  542. configbyte |= PCI_COMMAND_MEMORY;
  543. pci_write_config_byte(dev, PCI_COMMAND, configbyte);
  544. }
  545. ret = pci_request_regions(dev, "pd6729");
  546. if (ret) {
  547. dev_warn(&dev->dev, "pci request region failed.\n");
  548. goto err_out_disable;
  549. }
  550. if (dev->irq == NO_IRQ)
  551. irq_mode = 0; /* fall back to ISA interrupt mode */
  552. mask = pd6729_isa_scan();
  553. if (irq_mode == 0 && mask == 0) {
  554. dev_warn(&dev->dev, "no ISA interrupt is available.\n");
  555. ret = -ENODEV;
  556. goto err_out_free_res;
  557. }
  558. for (i = 0; i < MAX_SOCKETS; i++) {
  559. socket[i].io_base = pci_resource_start(dev, 0);
  560. socket[i].socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
  561. socket[i].socket.map_size = 0x1000;
  562. socket[i].socket.irq_mask = mask;
  563. socket[i].socket.pci_irq = dev->irq;
  564. socket[i].socket.cb_dev = dev;
  565. socket[i].socket.owner = THIS_MODULE;
  566. socket[i].number = i;
  567. socket[i].socket.ops = &pd6729_operations;
  568. socket[i].socket.resource_ops = &pccard_nonstatic_ops;
  569. socket[i].socket.dev.parent = &dev->dev;
  570. socket[i].socket.driver_data = &socket[i];
  571. }
  572. pci_set_drvdata(dev, socket);
  573. if (irq_mode == 1) {
  574. /* Register the interrupt handler */
  575. ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED,
  576. "pd6729", socket);
  577. if (ret) {
  578. dev_err(&dev->dev, "Failed to register irq %d\n",
  579. dev->irq);
  580. goto err_out_free_res;
  581. }
  582. } else {
  583. /* poll Card status change */
  584. timer_setup(&socket->poll_timer, pd6729_interrupt_wrapper, 0);
  585. mod_timer(&socket->poll_timer, jiffies + HZ);
  586. }
  587. for (i = 0; i < MAX_SOCKETS; i++) {
  588. ret = pcmcia_register_socket(&socket[i].socket);
  589. if (ret) {
  590. dev_warn(&dev->dev, "pcmcia_register_socket failed.\n");
  591. for (j = 0; j < i ; j++)
  592. pcmcia_unregister_socket(&socket[j].socket);
  593. goto err_out_free_res2;
  594. }
  595. }
  596. return 0;
  597. err_out_free_res2:
  598. if (irq_mode == 1)
  599. free_irq(dev->irq, socket);
  600. else
  601. del_timer_sync(&socket->poll_timer);
  602. err_out_free_res:
  603. pci_release_regions(dev);
  604. err_out_disable:
  605. pci_disable_device(dev);
  606. err_out_free_mem:
  607. kfree(socket);
  608. return ret;
  609. }
  610. static void pd6729_pci_remove(struct pci_dev *dev)
  611. {
  612. int i;
  613. struct pd6729_socket *socket = pci_get_drvdata(dev);
  614. for (i = 0; i < MAX_SOCKETS; i++) {
  615. /* Turn off all interrupt sources */
  616. indirect_write(&socket[i], I365_CSCINT, 0);
  617. indirect_write(&socket[i], I365_INTCTL, 0);
  618. pcmcia_unregister_socket(&socket[i].socket);
  619. }
  620. if (irq_mode == 1)
  621. free_irq(dev->irq, socket);
  622. else
  623. del_timer_sync(&socket->poll_timer);
  624. pci_release_regions(dev);
  625. pci_disable_device(dev);
  626. kfree(socket);
  627. }
  628. static const struct pci_device_id pd6729_pci_ids[] = {
  629. { PCI_DEVICE(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6729) },
  630. { }
  631. };
  632. MODULE_DEVICE_TABLE(pci, pd6729_pci_ids);
  633. static struct pci_driver pd6729_pci_driver = {
  634. .name = "pd6729",
  635. .id_table = pd6729_pci_ids,
  636. .probe = pd6729_pci_probe,
  637. .remove = pd6729_pci_remove,
  638. };
  639. module_pci_driver(pd6729_pci_driver);