pme.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PCIe Native PME support
  4. *
  5. * Copyright (C) 2007 - 2009 Intel Corp
  6. * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
  7. * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
  8. */
  9. #define dev_fmt(fmt) "PME: " fmt
  10. #include <linux/pci.h>
  11. #include <linux/kernel.h>
  12. #include <linux/errno.h>
  13. #include <linux/slab.h>
  14. #include <linux/init.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/device.h>
  17. #include <linux/pm_runtime.h>
  18. #include "../pci.h"
  19. #include "portdrv.h"
  20. /*
  21. * If this switch is set, MSI will not be used for PCIe PME signaling. This
  22. * causes the PCIe port driver to use INTx interrupts only, but it turns out
  23. * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
  24. * wake-up from system sleep states.
  25. */
  26. bool pcie_pme_msi_disabled;
  27. static int __init pcie_pme_setup(char *str)
  28. {
  29. if (!strncmp(str, "nomsi", 5))
  30. pcie_pme_msi_disabled = true;
  31. return 1;
  32. }
  33. __setup("pcie_pme=", pcie_pme_setup);
  34. struct pcie_pme_service_data {
  35. spinlock_t lock;
  36. struct pcie_device *srv;
  37. struct work_struct work;
  38. bool noirq; /* If set, keep the PME interrupt disabled. */
  39. };
  40. /**
  41. * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
  42. * @dev: PCIe root port or event collector.
  43. * @enable: Enable or disable the interrupt.
  44. */
  45. void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
  46. {
  47. if (enable)
  48. pcie_capability_set_word(dev, PCI_EXP_RTCTL,
  49. PCI_EXP_RTCTL_PMEIE);
  50. else
  51. pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
  52. PCI_EXP_RTCTL_PMEIE);
  53. }
  54. /**
  55. * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
  56. * @bus: PCI bus to scan.
  57. *
  58. * Scan given PCI bus and all buses under it for devices asserting PME#.
  59. */
  60. static bool pcie_pme_walk_bus(struct pci_bus *bus)
  61. {
  62. struct pci_dev *dev;
  63. bool ret = false;
  64. list_for_each_entry(dev, &bus->devices, bus_list) {
  65. /* Skip PCIe devices in case we started from a root port. */
  66. if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
  67. if (dev->pme_poll)
  68. dev->pme_poll = false;
  69. pci_wakeup_event(dev);
  70. pm_request_resume(&dev->dev);
  71. ret = true;
  72. }
  73. if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
  74. ret = true;
  75. }
  76. return ret;
  77. }
  78. /**
  79. * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
  80. * @bus: Secondary bus of the bridge.
  81. * @devfn: Device/function number to check.
  82. *
  83. * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
  84. * PCIe PME message. In such that case the bridge should use the Requester ID
  85. * of device/function number 0 on its secondary bus.
  86. */
  87. static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
  88. {
  89. struct pci_dev *dev;
  90. bool found = false;
  91. if (devfn)
  92. return false;
  93. dev = pci_dev_get(bus->self);
  94. if (!dev)
  95. return false;
  96. if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
  97. down_read(&pci_bus_sem);
  98. if (pcie_pme_walk_bus(bus))
  99. found = true;
  100. up_read(&pci_bus_sem);
  101. }
  102. pci_dev_put(dev);
  103. return found;
  104. }
  105. /**
  106. * pcie_pme_handle_request - Find device that generated PME and handle it.
  107. * @port: Root port or event collector that generated the PME interrupt.
  108. * @req_id: PCIe Requester ID of the device that generated the PME.
  109. */
  110. static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
  111. {
  112. u8 busnr = req_id >> 8, devfn = req_id & 0xff;
  113. struct pci_bus *bus;
  114. struct pci_dev *dev;
  115. bool found = false;
  116. /* First, check if the PME is from the root port itself. */
  117. if (port->devfn == devfn && port->bus->number == busnr) {
  118. if (port->pme_poll)
  119. port->pme_poll = false;
  120. if (pci_check_pme_status(port)) {
  121. pm_request_resume(&port->dev);
  122. found = true;
  123. } else {
  124. /*
  125. * Apparently, the root port generated the PME on behalf
  126. * of a non-PCIe device downstream. If this is done by
  127. * a root port, the Requester ID field in its status
  128. * register may contain either the root port's, or the
  129. * source device's information (PCI Express Base
  130. * Specification, Rev. 2.0, Section 6.1.9).
  131. */
  132. down_read(&pci_bus_sem);
  133. found = pcie_pme_walk_bus(port->subordinate);
  134. up_read(&pci_bus_sem);
  135. }
  136. goto out;
  137. }
  138. /* Second, find the bus the source device is on. */
  139. bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
  140. if (!bus)
  141. goto out;
  142. /* Next, check if the PME is from a PCIe-PCI bridge. */
  143. found = pcie_pme_from_pci_bridge(bus, devfn);
  144. if (found)
  145. goto out;
  146. /* Finally, try to find the PME source on the bus. */
  147. down_read(&pci_bus_sem);
  148. list_for_each_entry(dev, &bus->devices, bus_list) {
  149. pci_dev_get(dev);
  150. if (dev->devfn == devfn) {
  151. found = true;
  152. break;
  153. }
  154. pci_dev_put(dev);
  155. }
  156. up_read(&pci_bus_sem);
  157. if (found) {
  158. /* The device is there, but we have to check its PME status. */
  159. found = pci_check_pme_status(dev);
  160. if (found) {
  161. if (dev->pme_poll)
  162. dev->pme_poll = false;
  163. pci_wakeup_event(dev);
  164. pm_request_resume(&dev->dev);
  165. }
  166. pci_dev_put(dev);
  167. } else if (devfn) {
  168. /*
  169. * The device is not there, but we can still try to recover by
  170. * assuming that the PME was reported by a PCIe-PCI bridge that
  171. * used devfn different from zero.
  172. */
  173. pci_info(port, "interrupt generated for non-existent device %02x:%02x.%d\n",
  174. busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
  175. found = pcie_pme_from_pci_bridge(bus, 0);
  176. }
  177. out:
  178. if (!found)
  179. pci_info(port, "Spurious native interrupt!\n");
  180. }
  181. /**
  182. * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
  183. * @work: Work structure giving access to service data.
  184. */
  185. static void pcie_pme_work_fn(struct work_struct *work)
  186. {
  187. struct pcie_pme_service_data *data =
  188. container_of(work, struct pcie_pme_service_data, work);
  189. struct pci_dev *port = data->srv->port;
  190. u32 rtsta;
  191. spin_lock_irq(&data->lock);
  192. for (;;) {
  193. if (data->noirq)
  194. break;
  195. pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
  196. if (rtsta == (u32) ~0)
  197. break;
  198. if (rtsta & PCI_EXP_RTSTA_PME) {
  199. /*
  200. * Clear PME status of the port. If there are other
  201. * pending PMEs, the status will be set again.
  202. */
  203. pcie_clear_root_pme_status(port);
  204. spin_unlock_irq(&data->lock);
  205. pcie_pme_handle_request(port, rtsta & 0xffff);
  206. spin_lock_irq(&data->lock);
  207. continue;
  208. }
  209. /* No need to loop if there are no more PMEs pending. */
  210. if (!(rtsta & PCI_EXP_RTSTA_PENDING))
  211. break;
  212. spin_unlock_irq(&data->lock);
  213. cpu_relax();
  214. spin_lock_irq(&data->lock);
  215. }
  216. if (!data->noirq)
  217. pcie_pme_interrupt_enable(port, true);
  218. spin_unlock_irq(&data->lock);
  219. }
  220. /**
  221. * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
  222. * @irq: Interrupt vector.
  223. * @context: Interrupt context pointer.
  224. */
  225. static irqreturn_t pcie_pme_irq(int irq, void *context)
  226. {
  227. struct pci_dev *port;
  228. struct pcie_pme_service_data *data;
  229. u32 rtsta;
  230. unsigned long flags;
  231. port = ((struct pcie_device *)context)->port;
  232. data = get_service_data((struct pcie_device *)context);
  233. spin_lock_irqsave(&data->lock, flags);
  234. pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
  235. if (rtsta == (u32) ~0 || !(rtsta & PCI_EXP_RTSTA_PME)) {
  236. spin_unlock_irqrestore(&data->lock, flags);
  237. return IRQ_NONE;
  238. }
  239. pcie_pme_interrupt_enable(port, false);
  240. spin_unlock_irqrestore(&data->lock, flags);
  241. /* We don't use pm_wq, because it's freezable. */
  242. schedule_work(&data->work);
  243. return IRQ_HANDLED;
  244. }
  245. /**
  246. * pcie_pme_can_wakeup - Set the wakeup capability flag.
  247. * @dev: PCI device to handle.
  248. * @ign: Ignored.
  249. */
  250. static int pcie_pme_can_wakeup(struct pci_dev *dev, void *ign)
  251. {
  252. device_set_wakeup_capable(&dev->dev, true);
  253. return 0;
  254. }
  255. /**
  256. * pcie_pme_mark_devices - Set the wakeup flag for devices below a port.
  257. * @port: PCIe root port or event collector to handle.
  258. *
  259. * For each device below given root port, including the port itself (or for each
  260. * root complex integrated endpoint if @port is a root complex event collector)
  261. * set the flag indicating that it can signal run-time wake-up events.
  262. */
  263. static void pcie_pme_mark_devices(struct pci_dev *port)
  264. {
  265. pcie_pme_can_wakeup(port, NULL);
  266. if (port->subordinate)
  267. pci_walk_bus(port->subordinate, pcie_pme_can_wakeup, NULL);
  268. }
  269. /**
  270. * pcie_pme_probe - Initialize PCIe PME service for given root port.
  271. * @srv: PCIe service to initialize.
  272. */
  273. static int pcie_pme_probe(struct pcie_device *srv)
  274. {
  275. struct pci_dev *port;
  276. struct pcie_pme_service_data *data;
  277. int ret;
  278. data = kzalloc(sizeof(*data), GFP_KERNEL);
  279. if (!data)
  280. return -ENOMEM;
  281. spin_lock_init(&data->lock);
  282. INIT_WORK(&data->work, pcie_pme_work_fn);
  283. data->srv = srv;
  284. set_service_data(srv, data);
  285. port = srv->port;
  286. pcie_pme_interrupt_enable(port, false);
  287. pcie_clear_root_pme_status(port);
  288. ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
  289. if (ret) {
  290. kfree(data);
  291. return ret;
  292. }
  293. pci_info(port, "Signaling with IRQ %d\n", srv->irq);
  294. pcie_pme_mark_devices(port);
  295. pcie_pme_interrupt_enable(port, true);
  296. return 0;
  297. }
  298. static bool pcie_pme_check_wakeup(struct pci_bus *bus)
  299. {
  300. struct pci_dev *dev;
  301. if (!bus)
  302. return false;
  303. list_for_each_entry(dev, &bus->devices, bus_list)
  304. if (device_may_wakeup(&dev->dev)
  305. || pcie_pme_check_wakeup(dev->subordinate))
  306. return true;
  307. return false;
  308. }
  309. static void pcie_pme_disable_interrupt(struct pci_dev *port,
  310. struct pcie_pme_service_data *data)
  311. {
  312. spin_lock_irq(&data->lock);
  313. pcie_pme_interrupt_enable(port, false);
  314. pcie_clear_root_pme_status(port);
  315. data->noirq = true;
  316. spin_unlock_irq(&data->lock);
  317. }
  318. /**
  319. * pcie_pme_suspend - Suspend PCIe PME service device.
  320. * @srv: PCIe service device to suspend.
  321. */
  322. static int pcie_pme_suspend(struct pcie_device *srv)
  323. {
  324. struct pcie_pme_service_data *data = get_service_data(srv);
  325. struct pci_dev *port = srv->port;
  326. bool wakeup;
  327. int ret;
  328. if (device_may_wakeup(&port->dev)) {
  329. wakeup = true;
  330. } else {
  331. down_read(&pci_bus_sem);
  332. wakeup = pcie_pme_check_wakeup(port->subordinate);
  333. up_read(&pci_bus_sem);
  334. }
  335. if (wakeup) {
  336. ret = enable_irq_wake(srv->irq);
  337. if (!ret)
  338. return 0;
  339. }
  340. pcie_pme_disable_interrupt(port, data);
  341. synchronize_irq(srv->irq);
  342. return 0;
  343. }
  344. /**
  345. * pcie_pme_resume - Resume PCIe PME service device.
  346. * @srv: PCIe service device to resume.
  347. */
  348. static int pcie_pme_resume(struct pcie_device *srv)
  349. {
  350. struct pcie_pme_service_data *data = get_service_data(srv);
  351. spin_lock_irq(&data->lock);
  352. if (data->noirq) {
  353. struct pci_dev *port = srv->port;
  354. pcie_clear_root_pme_status(port);
  355. pcie_pme_interrupt_enable(port, true);
  356. data->noirq = false;
  357. } else {
  358. disable_irq_wake(srv->irq);
  359. }
  360. spin_unlock_irq(&data->lock);
  361. return 0;
  362. }
  363. /**
  364. * pcie_pme_remove - Prepare PCIe PME service device for removal.
  365. * @srv: PCIe service device to remove.
  366. */
  367. static void pcie_pme_remove(struct pcie_device *srv)
  368. {
  369. struct pcie_pme_service_data *data = get_service_data(srv);
  370. pcie_pme_disable_interrupt(srv->port, data);
  371. free_irq(srv->irq, srv);
  372. cancel_work_sync(&data->work);
  373. kfree(data);
  374. }
  375. static struct pcie_port_service_driver pcie_pme_driver = {
  376. .name = "pcie_pme",
  377. .port_type = PCI_EXP_TYPE_ROOT_PORT,
  378. .service = PCIE_PORT_SERVICE_PME,
  379. .probe = pcie_pme_probe,
  380. .suspend = pcie_pme_suspend,
  381. .resume = pcie_pme_resume,
  382. .remove = pcie_pme_remove,
  383. };
  384. /**
  385. * pcie_pme_service_init - Register the PCIe PME service driver.
  386. */
  387. int __init pcie_pme_init(void)
  388. {
  389. return pcie_port_service_register(&pcie_pme_driver);
  390. }