Kconfig 4.0 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. #
  3. # PCI Express Port Bus Configuration
  4. #
  5. config PCIEPORTBUS
  6. bool "PCI Express Port Bus support"
  7. help
  8. This enables PCI Express Port Bus support. Users can then enable
  9. support for Native Hot-Plug, Advanced Error Reporting, Power
  10. Management Events, and Downstream Port Containment.
  11. #
  12. # Include service Kconfig here
  13. #
  14. config HOTPLUG_PCI_PCIE
  15. bool "PCI Express Hotplug driver"
  16. depends on HOTPLUG_PCI && PCIEPORTBUS
  17. help
  18. Say Y here if you have a motherboard that supports PCI Express Native
  19. Hotplug
  20. When in doubt, say N.
  21. config PCIEAER
  22. bool "PCI Express Advanced Error Reporting support"
  23. depends on PCIEPORTBUS
  24. select RAS
  25. help
  26. This enables PCI Express Root Port Advanced Error Reporting
  27. (AER) driver support. Error reporting messages sent to Root
  28. Port will be handled by PCI Express AER driver.
  29. config PCIEAER_INJECT
  30. tristate "PCI Express error injection support"
  31. depends on PCIEAER
  32. select GENERIC_IRQ_INJECTION
  33. help
  34. This enables PCI Express Root Port Advanced Error Reporting
  35. (AER) software error injector.
  36. Debugging AER code is quite difficult because it is hard
  37. to trigger various real hardware errors. Software-based
  38. error injection can fake almost all kinds of errors with the
  39. help of a user space helper tool aer-inject, which can be
  40. gotten from:
  41. https://www.kernel.org/pub/linux/utils/pci/aer-inject/
  42. #
  43. # PCI Express ECRC
  44. #
  45. config PCIE_ECRC
  46. bool "PCI Express ECRC settings control"
  47. depends on PCIEAER
  48. help
  49. Used to override firmware/bios settings for PCI Express ECRC
  50. (transaction layer end-to-end CRC checking).
  51. When in doubt, say N.
  52. #
  53. # PCI Express ASPM
  54. #
  55. config PCIEASPM
  56. bool "PCI Express ASPM control" if EXPERT
  57. default y
  58. help
  59. This enables OS control over PCI Express ASPM (Active State
  60. Power Management) and Clock Power Management. ASPM supports
  61. state L0/L0s/L1.
  62. ASPM is initially set up by the firmware. With this option enabled,
  63. Linux can modify this state in order to disable ASPM on known-bad
  64. hardware or configurations and enable it when known-safe.
  65. ASPM can be disabled or enabled at runtime via
  66. /sys/module/pcie_aspm/parameters/policy
  67. When in doubt, say Y.
  68. choice
  69. prompt "Default ASPM policy"
  70. default PCIEASPM_DEFAULT
  71. depends on PCIEASPM
  72. config PCIEASPM_DEFAULT
  73. bool "BIOS default"
  74. depends on PCIEASPM
  75. help
  76. Use the BIOS defaults for PCI Express ASPM.
  77. config PCIEASPM_POWERSAVE
  78. bool "Powersave"
  79. depends on PCIEASPM
  80. help
  81. Enable PCI Express ASPM L0s and L1 where possible, even if the
  82. BIOS did not.
  83. config PCIEASPM_POWER_SUPERSAVE
  84. bool "Power Supersave"
  85. depends on PCIEASPM
  86. help
  87. Same as PCIEASPM_POWERSAVE, except it also enables L1 substates where
  88. possible. This would result in higher power savings while staying in L1
  89. where the components support it.
  90. config PCIEASPM_PERFORMANCE
  91. bool "Performance"
  92. depends on PCIEASPM
  93. help
  94. Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.
  95. endchoice
  96. config PCIE_PME
  97. def_bool y
  98. depends on PCIEPORTBUS && PM
  99. config PCIE_DPC
  100. bool "PCI Express Downstream Port Containment support"
  101. depends on PCIEPORTBUS && PCIEAER
  102. help
  103. This enables PCI Express Downstream Port Containment (DPC)
  104. driver support. DPC events from Root and Downstream ports
  105. will be handled by the DPC driver. If your system doesn't
  106. have this capability or you do not want to use this feature,
  107. it is safe to answer N.
  108. config PCIE_PTM
  109. bool "PCI Express Precision Time Measurement support"
  110. help
  111. This enables PCI Express Precision Time Measurement (PTM)
  112. support.
  113. This is only useful if you have devices that support PTM, but it
  114. is safe to enable even if you don't.
  115. config PCIE_EDR
  116. bool "PCI Express Error Disconnect Recover support"
  117. depends on PCIE_DPC && ACPI
  118. help
  119. This option adds Error Disconnect Recover support as specified
  120. in the Downstream Port Containment Related Enhancements ECN to
  121. the PCI Firmware Specification r3.2. Enable this if you want to
  122. support hybrid DPC model which uses both firmware and OS to
  123. implement DPC.