pci-sysfs.c 38 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  4. * (C) Copyright 2002-2004 IBM Corp.
  5. * (C) Copyright 2003 Matthew Wilcox
  6. * (C) Copyright 2003 Hewlett-Packard
  7. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  8. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  9. *
  10. * File attributes for PCI devices
  11. *
  12. * Modeled after usb's driverfs.c
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/pci.h>
  17. #include <linux/stat.h>
  18. #include <linux/export.h>
  19. #include <linux/topology.h>
  20. #include <linux/mm.h>
  21. #include <linux/fs.h>
  22. #include <linux/capability.h>
  23. #include <linux/security.h>
  24. #include <linux/slab.h>
  25. #include <linux/vgaarb.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/of.h>
  28. #include "pci.h"
  29. static int sysfs_initialized; /* = 0 */
  30. /* show configuration fields */
  31. #define pci_config_attr(field, format_string) \
  32. static ssize_t \
  33. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  34. { \
  35. struct pci_dev *pdev; \
  36. \
  37. pdev = to_pci_dev(dev); \
  38. return sprintf(buf, format_string, pdev->field); \
  39. } \
  40. static DEVICE_ATTR_RO(field)
  41. pci_config_attr(vendor, "0x%04x\n");
  42. pci_config_attr(device, "0x%04x\n");
  43. pci_config_attr(subsystem_vendor, "0x%04x\n");
  44. pci_config_attr(subsystem_device, "0x%04x\n");
  45. pci_config_attr(revision, "0x%02x\n");
  46. pci_config_attr(class, "0x%06x\n");
  47. pci_config_attr(irq, "%u\n");
  48. static ssize_t broken_parity_status_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  54. }
  55. static ssize_t broken_parity_status_store(struct device *dev,
  56. struct device_attribute *attr,
  57. const char *buf, size_t count)
  58. {
  59. struct pci_dev *pdev = to_pci_dev(dev);
  60. unsigned long val;
  61. if (kstrtoul(buf, 0, &val) < 0)
  62. return -EINVAL;
  63. pdev->broken_parity_status = !!val;
  64. return count;
  65. }
  66. static DEVICE_ATTR_RW(broken_parity_status);
  67. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  68. struct device_attribute *attr, char *buf)
  69. {
  70. const struct cpumask *mask;
  71. #ifdef CONFIG_NUMA
  72. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  73. cpumask_of_node(dev_to_node(dev));
  74. #else
  75. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  76. #endif
  77. return cpumap_print_to_pagebuf(list, buf, mask);
  78. }
  79. static ssize_t local_cpus_show(struct device *dev,
  80. struct device_attribute *attr, char *buf)
  81. {
  82. return pci_dev_show_local_cpu(dev, false, attr, buf);
  83. }
  84. static DEVICE_ATTR_RO(local_cpus);
  85. static ssize_t local_cpulist_show(struct device *dev,
  86. struct device_attribute *attr, char *buf)
  87. {
  88. return pci_dev_show_local_cpu(dev, true, attr, buf);
  89. }
  90. static DEVICE_ATTR_RO(local_cpulist);
  91. /*
  92. * PCI Bus Class Devices
  93. */
  94. static ssize_t cpuaffinity_show(struct device *dev,
  95. struct device_attribute *attr, char *buf)
  96. {
  97. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  98. return cpumap_print_to_pagebuf(false, buf, cpumask);
  99. }
  100. static DEVICE_ATTR_RO(cpuaffinity);
  101. static ssize_t cpulistaffinity_show(struct device *dev,
  102. struct device_attribute *attr, char *buf)
  103. {
  104. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  105. return cpumap_print_to_pagebuf(true, buf, cpumask);
  106. }
  107. static DEVICE_ATTR_RO(cpulistaffinity);
  108. /* show resources */
  109. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  110. char *buf)
  111. {
  112. struct pci_dev *pci_dev = to_pci_dev(dev);
  113. char *str = buf;
  114. int i;
  115. int max;
  116. resource_size_t start, end;
  117. if (pci_dev->subordinate)
  118. max = DEVICE_COUNT_RESOURCE;
  119. else
  120. max = PCI_BRIDGE_RESOURCES;
  121. for (i = 0; i < max; i++) {
  122. struct resource *res = &pci_dev->resource[i];
  123. pci_resource_to_user(pci_dev, i, res, &start, &end);
  124. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  125. (unsigned long long)start,
  126. (unsigned long long)end,
  127. (unsigned long long)res->flags);
  128. }
  129. return (str - buf);
  130. }
  131. static DEVICE_ATTR_RO(resource);
  132. static ssize_t max_link_speed_show(struct device *dev,
  133. struct device_attribute *attr, char *buf)
  134. {
  135. struct pci_dev *pdev = to_pci_dev(dev);
  136. return sprintf(buf, "%s\n",
  137. pci_speed_string(pcie_get_speed_cap(pdev)));
  138. }
  139. static DEVICE_ATTR_RO(max_link_speed);
  140. static ssize_t max_link_width_show(struct device *dev,
  141. struct device_attribute *attr, char *buf)
  142. {
  143. struct pci_dev *pdev = to_pci_dev(dev);
  144. return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
  145. }
  146. static DEVICE_ATTR_RO(max_link_width);
  147. static ssize_t current_link_speed_show(struct device *dev,
  148. struct device_attribute *attr, char *buf)
  149. {
  150. struct pci_dev *pci_dev = to_pci_dev(dev);
  151. u16 linkstat;
  152. int err;
  153. enum pci_bus_speed speed;
  154. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  155. if (err)
  156. return -EINVAL;
  157. speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS];
  158. return sprintf(buf, "%s\n", pci_speed_string(speed));
  159. }
  160. static DEVICE_ATTR_RO(current_link_speed);
  161. static ssize_t current_link_width_show(struct device *dev,
  162. struct device_attribute *attr, char *buf)
  163. {
  164. struct pci_dev *pci_dev = to_pci_dev(dev);
  165. u16 linkstat;
  166. int err;
  167. err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
  168. if (err)
  169. return -EINVAL;
  170. return sprintf(buf, "%u\n",
  171. (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
  172. }
  173. static DEVICE_ATTR_RO(current_link_width);
  174. static ssize_t secondary_bus_number_show(struct device *dev,
  175. struct device_attribute *attr,
  176. char *buf)
  177. {
  178. struct pci_dev *pci_dev = to_pci_dev(dev);
  179. u8 sec_bus;
  180. int err;
  181. err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
  182. if (err)
  183. return -EINVAL;
  184. return sprintf(buf, "%u\n", sec_bus);
  185. }
  186. static DEVICE_ATTR_RO(secondary_bus_number);
  187. static ssize_t subordinate_bus_number_show(struct device *dev,
  188. struct device_attribute *attr,
  189. char *buf)
  190. {
  191. struct pci_dev *pci_dev = to_pci_dev(dev);
  192. u8 sub_bus;
  193. int err;
  194. err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
  195. if (err)
  196. return -EINVAL;
  197. return sprintf(buf, "%u\n", sub_bus);
  198. }
  199. static DEVICE_ATTR_RO(subordinate_bus_number);
  200. static ssize_t ari_enabled_show(struct device *dev,
  201. struct device_attribute *attr,
  202. char *buf)
  203. {
  204. struct pci_dev *pci_dev = to_pci_dev(dev);
  205. return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
  206. }
  207. static DEVICE_ATTR_RO(ari_enabled);
  208. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  209. char *buf)
  210. {
  211. struct pci_dev *pci_dev = to_pci_dev(dev);
  212. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  213. pci_dev->vendor, pci_dev->device,
  214. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  215. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  216. (u8)(pci_dev->class));
  217. }
  218. static DEVICE_ATTR_RO(modalias);
  219. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  220. const char *buf, size_t count)
  221. {
  222. struct pci_dev *pdev = to_pci_dev(dev);
  223. unsigned long val;
  224. ssize_t result = kstrtoul(buf, 0, &val);
  225. if (result < 0)
  226. return result;
  227. /* this can crash the machine when done on the "wrong" device */
  228. if (!capable(CAP_SYS_ADMIN))
  229. return -EPERM;
  230. device_lock(dev);
  231. if (dev->driver)
  232. result = -EBUSY;
  233. else if (val)
  234. result = pci_enable_device(pdev);
  235. else if (pci_is_enabled(pdev))
  236. pci_disable_device(pdev);
  237. else
  238. result = -EIO;
  239. device_unlock(dev);
  240. return result < 0 ? result : count;
  241. }
  242. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  243. char *buf)
  244. {
  245. struct pci_dev *pdev;
  246. pdev = to_pci_dev(dev);
  247. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  248. }
  249. static DEVICE_ATTR_RW(enable);
  250. #ifdef CONFIG_NUMA
  251. static ssize_t numa_node_store(struct device *dev,
  252. struct device_attribute *attr, const char *buf,
  253. size_t count)
  254. {
  255. struct pci_dev *pdev = to_pci_dev(dev);
  256. int node, ret;
  257. if (!capable(CAP_SYS_ADMIN))
  258. return -EPERM;
  259. ret = kstrtoint(buf, 0, &node);
  260. if (ret)
  261. return ret;
  262. if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
  263. return -EINVAL;
  264. if (node != NUMA_NO_NODE && !node_online(node))
  265. return -EINVAL;
  266. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  267. pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  268. node);
  269. dev->numa_node = node;
  270. return count;
  271. }
  272. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  273. char *buf)
  274. {
  275. return sprintf(buf, "%d\n", dev->numa_node);
  276. }
  277. static DEVICE_ATTR_RW(numa_node);
  278. #endif
  279. static ssize_t dma_mask_bits_show(struct device *dev,
  280. struct device_attribute *attr, char *buf)
  281. {
  282. struct pci_dev *pdev = to_pci_dev(dev);
  283. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  284. }
  285. static DEVICE_ATTR_RO(dma_mask_bits);
  286. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  287. struct device_attribute *attr,
  288. char *buf)
  289. {
  290. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  291. }
  292. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  293. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  294. char *buf)
  295. {
  296. struct pci_dev *pdev = to_pci_dev(dev);
  297. struct pci_bus *subordinate = pdev->subordinate;
  298. return sprintf(buf, "%u\n", subordinate ?
  299. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  300. : !pdev->no_msi);
  301. }
  302. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  303. const char *buf, size_t count)
  304. {
  305. struct pci_dev *pdev = to_pci_dev(dev);
  306. struct pci_bus *subordinate = pdev->subordinate;
  307. unsigned long val;
  308. if (kstrtoul(buf, 0, &val) < 0)
  309. return -EINVAL;
  310. if (!capable(CAP_SYS_ADMIN))
  311. return -EPERM;
  312. /*
  313. * "no_msi" and "bus_flags" only affect what happens when a driver
  314. * requests MSI or MSI-X. They don't affect any drivers that have
  315. * already requested MSI or MSI-X.
  316. */
  317. if (!subordinate) {
  318. pdev->no_msi = !val;
  319. pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
  320. val ? "allowed" : "disallowed");
  321. return count;
  322. }
  323. if (val)
  324. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  325. else
  326. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  327. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  328. val ? "allowed" : "disallowed");
  329. return count;
  330. }
  331. static DEVICE_ATTR_RW(msi_bus);
  332. static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
  333. {
  334. unsigned long val;
  335. struct pci_bus *b = NULL;
  336. if (kstrtoul(buf, 0, &val) < 0)
  337. return -EINVAL;
  338. if (val) {
  339. pci_lock_rescan_remove();
  340. while ((b = pci_find_next_bus(b)) != NULL)
  341. pci_rescan_bus(b);
  342. pci_unlock_rescan_remove();
  343. }
  344. return count;
  345. }
  346. static BUS_ATTR_WO(rescan);
  347. static struct attribute *pci_bus_attrs[] = {
  348. &bus_attr_rescan.attr,
  349. NULL,
  350. };
  351. static const struct attribute_group pci_bus_group = {
  352. .attrs = pci_bus_attrs,
  353. };
  354. const struct attribute_group *pci_bus_groups[] = {
  355. &pci_bus_group,
  356. NULL,
  357. };
  358. static ssize_t dev_rescan_store(struct device *dev,
  359. struct device_attribute *attr, const char *buf,
  360. size_t count)
  361. {
  362. unsigned long val;
  363. struct pci_dev *pdev = to_pci_dev(dev);
  364. if (kstrtoul(buf, 0, &val) < 0)
  365. return -EINVAL;
  366. if (val) {
  367. pci_lock_rescan_remove();
  368. pci_rescan_bus(pdev->bus);
  369. pci_unlock_rescan_remove();
  370. }
  371. return count;
  372. }
  373. static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,
  374. dev_rescan_store);
  375. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  376. const char *buf, size_t count)
  377. {
  378. unsigned long val;
  379. if (kstrtoul(buf, 0, &val) < 0)
  380. return -EINVAL;
  381. if (val && device_remove_file_self(dev, attr))
  382. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  383. return count;
  384. }
  385. static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
  386. remove_store);
  387. static ssize_t bus_rescan_store(struct device *dev,
  388. struct device_attribute *attr,
  389. const char *buf, size_t count)
  390. {
  391. unsigned long val;
  392. struct pci_bus *bus = to_pci_bus(dev);
  393. if (kstrtoul(buf, 0, &val) < 0)
  394. return -EINVAL;
  395. if (val) {
  396. pci_lock_rescan_remove();
  397. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  398. pci_rescan_bus_bridge_resize(bus->self);
  399. else
  400. pci_rescan_bus(bus);
  401. pci_unlock_rescan_remove();
  402. }
  403. return count;
  404. }
  405. static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,
  406. bus_rescan_store);
  407. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  408. static ssize_t d3cold_allowed_store(struct device *dev,
  409. struct device_attribute *attr,
  410. const char *buf, size_t count)
  411. {
  412. struct pci_dev *pdev = to_pci_dev(dev);
  413. unsigned long val;
  414. if (kstrtoul(buf, 0, &val) < 0)
  415. return -EINVAL;
  416. pdev->d3cold_allowed = !!val;
  417. if (pdev->d3cold_allowed)
  418. pci_d3cold_enable(pdev);
  419. else
  420. pci_d3cold_disable(pdev);
  421. pm_runtime_resume(dev);
  422. return count;
  423. }
  424. static ssize_t d3cold_allowed_show(struct device *dev,
  425. struct device_attribute *attr, char *buf)
  426. {
  427. struct pci_dev *pdev = to_pci_dev(dev);
  428. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  429. }
  430. static DEVICE_ATTR_RW(d3cold_allowed);
  431. #endif
  432. #ifdef CONFIG_OF
  433. static ssize_t devspec_show(struct device *dev,
  434. struct device_attribute *attr, char *buf)
  435. {
  436. struct pci_dev *pdev = to_pci_dev(dev);
  437. struct device_node *np = pci_device_to_OF_node(pdev);
  438. if (np == NULL)
  439. return 0;
  440. return sprintf(buf, "%pOF", np);
  441. }
  442. static DEVICE_ATTR_RO(devspec);
  443. #endif
  444. static ssize_t driver_override_store(struct device *dev,
  445. struct device_attribute *attr,
  446. const char *buf, size_t count)
  447. {
  448. struct pci_dev *pdev = to_pci_dev(dev);
  449. char *driver_override, *old, *cp;
  450. /* We need to keep extra room for a newline */
  451. if (count >= (PAGE_SIZE - 1))
  452. return -EINVAL;
  453. driver_override = kstrndup(buf, count, GFP_KERNEL);
  454. if (!driver_override)
  455. return -ENOMEM;
  456. cp = strchr(driver_override, '\n');
  457. if (cp)
  458. *cp = '\0';
  459. device_lock(dev);
  460. old = pdev->driver_override;
  461. if (strlen(driver_override)) {
  462. pdev->driver_override = driver_override;
  463. } else {
  464. kfree(driver_override);
  465. pdev->driver_override = NULL;
  466. }
  467. device_unlock(dev);
  468. kfree(old);
  469. return count;
  470. }
  471. static ssize_t driver_override_show(struct device *dev,
  472. struct device_attribute *attr, char *buf)
  473. {
  474. struct pci_dev *pdev = to_pci_dev(dev);
  475. ssize_t len;
  476. device_lock(dev);
  477. len = scnprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
  478. device_unlock(dev);
  479. return len;
  480. }
  481. static DEVICE_ATTR_RW(driver_override);
  482. static struct attribute *pci_dev_attrs[] = {
  483. &dev_attr_resource.attr,
  484. &dev_attr_vendor.attr,
  485. &dev_attr_device.attr,
  486. &dev_attr_subsystem_vendor.attr,
  487. &dev_attr_subsystem_device.attr,
  488. &dev_attr_revision.attr,
  489. &dev_attr_class.attr,
  490. &dev_attr_irq.attr,
  491. &dev_attr_local_cpus.attr,
  492. &dev_attr_local_cpulist.attr,
  493. &dev_attr_modalias.attr,
  494. #ifdef CONFIG_NUMA
  495. &dev_attr_numa_node.attr,
  496. #endif
  497. &dev_attr_dma_mask_bits.attr,
  498. &dev_attr_consistent_dma_mask_bits.attr,
  499. &dev_attr_enable.attr,
  500. &dev_attr_broken_parity_status.attr,
  501. &dev_attr_msi_bus.attr,
  502. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  503. &dev_attr_d3cold_allowed.attr,
  504. #endif
  505. #ifdef CONFIG_OF
  506. &dev_attr_devspec.attr,
  507. #endif
  508. &dev_attr_driver_override.attr,
  509. &dev_attr_ari_enabled.attr,
  510. NULL,
  511. };
  512. static struct attribute *pci_bridge_attrs[] = {
  513. &dev_attr_subordinate_bus_number.attr,
  514. &dev_attr_secondary_bus_number.attr,
  515. NULL,
  516. };
  517. static struct attribute *pcie_dev_attrs[] = {
  518. &dev_attr_current_link_speed.attr,
  519. &dev_attr_current_link_width.attr,
  520. &dev_attr_max_link_width.attr,
  521. &dev_attr_max_link_speed.attr,
  522. NULL,
  523. };
  524. static struct attribute *pcibus_attrs[] = {
  525. &dev_attr_bus_rescan.attr,
  526. &dev_attr_cpuaffinity.attr,
  527. &dev_attr_cpulistaffinity.attr,
  528. NULL,
  529. };
  530. static const struct attribute_group pcibus_group = {
  531. .attrs = pcibus_attrs,
  532. };
  533. const struct attribute_group *pcibus_groups[] = {
  534. &pcibus_group,
  535. NULL,
  536. };
  537. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  538. char *buf)
  539. {
  540. struct pci_dev *pdev = to_pci_dev(dev);
  541. struct pci_dev *vga_dev = vga_default_device();
  542. if (vga_dev)
  543. return sprintf(buf, "%u\n", (pdev == vga_dev));
  544. return sprintf(buf, "%u\n",
  545. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  546. IORESOURCE_ROM_SHADOW));
  547. }
  548. static DEVICE_ATTR_RO(boot_vga);
  549. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  550. struct bin_attribute *bin_attr, char *buf,
  551. loff_t off, size_t count)
  552. {
  553. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  554. unsigned int size = 64;
  555. loff_t init_off = off;
  556. u8 *data = (u8 *) buf;
  557. /* Several chips lock up trying to read undefined config space */
  558. if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
  559. size = dev->cfg_size;
  560. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  561. size = 128;
  562. if (off > size)
  563. return 0;
  564. if (off + count > size) {
  565. size -= off;
  566. count = size;
  567. } else {
  568. size = count;
  569. }
  570. pci_config_pm_runtime_get(dev);
  571. if ((off & 1) && size) {
  572. u8 val;
  573. pci_user_read_config_byte(dev, off, &val);
  574. data[off - init_off] = val;
  575. off++;
  576. size--;
  577. }
  578. if ((off & 3) && size > 2) {
  579. u16 val;
  580. pci_user_read_config_word(dev, off, &val);
  581. data[off - init_off] = val & 0xff;
  582. data[off - init_off + 1] = (val >> 8) & 0xff;
  583. off += 2;
  584. size -= 2;
  585. }
  586. while (size > 3) {
  587. u32 val;
  588. pci_user_read_config_dword(dev, off, &val);
  589. data[off - init_off] = val & 0xff;
  590. data[off - init_off + 1] = (val >> 8) & 0xff;
  591. data[off - init_off + 2] = (val >> 16) & 0xff;
  592. data[off - init_off + 3] = (val >> 24) & 0xff;
  593. off += 4;
  594. size -= 4;
  595. cond_resched();
  596. }
  597. if (size >= 2) {
  598. u16 val;
  599. pci_user_read_config_word(dev, off, &val);
  600. data[off - init_off] = val & 0xff;
  601. data[off - init_off + 1] = (val >> 8) & 0xff;
  602. off += 2;
  603. size -= 2;
  604. }
  605. if (size > 0) {
  606. u8 val;
  607. pci_user_read_config_byte(dev, off, &val);
  608. data[off - init_off] = val;
  609. off++;
  610. --size;
  611. }
  612. pci_config_pm_runtime_put(dev);
  613. return count;
  614. }
  615. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  616. struct bin_attribute *bin_attr, char *buf,
  617. loff_t off, size_t count)
  618. {
  619. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  620. unsigned int size = count;
  621. loff_t init_off = off;
  622. u8 *data = (u8 *) buf;
  623. int ret;
  624. ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
  625. if (ret)
  626. return ret;
  627. if (off > dev->cfg_size)
  628. return 0;
  629. if (off + count > dev->cfg_size) {
  630. size = dev->cfg_size - off;
  631. count = size;
  632. }
  633. pci_config_pm_runtime_get(dev);
  634. if ((off & 1) && size) {
  635. pci_user_write_config_byte(dev, off, data[off - init_off]);
  636. off++;
  637. size--;
  638. }
  639. if ((off & 3) && size > 2) {
  640. u16 val = data[off - init_off];
  641. val |= (u16) data[off - init_off + 1] << 8;
  642. pci_user_write_config_word(dev, off, val);
  643. off += 2;
  644. size -= 2;
  645. }
  646. while (size > 3) {
  647. u32 val = data[off - init_off];
  648. val |= (u32) data[off - init_off + 1] << 8;
  649. val |= (u32) data[off - init_off + 2] << 16;
  650. val |= (u32) data[off - init_off + 3] << 24;
  651. pci_user_write_config_dword(dev, off, val);
  652. off += 4;
  653. size -= 4;
  654. }
  655. if (size >= 2) {
  656. u16 val = data[off - init_off];
  657. val |= (u16) data[off - init_off + 1] << 8;
  658. pci_user_write_config_word(dev, off, val);
  659. off += 2;
  660. size -= 2;
  661. }
  662. if (size) {
  663. pci_user_write_config_byte(dev, off, data[off - init_off]);
  664. off++;
  665. --size;
  666. }
  667. pci_config_pm_runtime_put(dev);
  668. return count;
  669. }
  670. #ifdef HAVE_PCI_LEGACY
  671. /**
  672. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  673. * @filp: open sysfs file
  674. * @kobj: kobject corresponding to file to read from
  675. * @bin_attr: struct bin_attribute for this file
  676. * @buf: buffer to store results
  677. * @off: offset into legacy I/O port space
  678. * @count: number of bytes to read
  679. *
  680. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  681. * callback routine (pci_legacy_read).
  682. */
  683. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  684. struct bin_attribute *bin_attr, char *buf,
  685. loff_t off, size_t count)
  686. {
  687. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  688. /* Only support 1, 2 or 4 byte accesses */
  689. if (count != 1 && count != 2 && count != 4)
  690. return -EINVAL;
  691. return pci_legacy_read(bus, off, (u32 *)buf, count);
  692. }
  693. /**
  694. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  695. * @filp: open sysfs file
  696. * @kobj: kobject corresponding to file to read from
  697. * @bin_attr: struct bin_attribute for this file
  698. * @buf: buffer containing value to be written
  699. * @off: offset into legacy I/O port space
  700. * @count: number of bytes to write
  701. *
  702. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  703. * callback routine (pci_legacy_write).
  704. */
  705. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  706. struct bin_attribute *bin_attr, char *buf,
  707. loff_t off, size_t count)
  708. {
  709. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  710. /* Only support 1, 2 or 4 byte accesses */
  711. if (count != 1 && count != 2 && count != 4)
  712. return -EINVAL;
  713. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  714. }
  715. /**
  716. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  717. * @filp: open sysfs file
  718. * @kobj: kobject corresponding to device to be mapped
  719. * @attr: struct bin_attribute for this file
  720. * @vma: struct vm_area_struct passed to mmap
  721. *
  722. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  723. * legacy memory space (first meg of bus space) into application virtual
  724. * memory space.
  725. */
  726. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  727. struct bin_attribute *attr,
  728. struct vm_area_struct *vma)
  729. {
  730. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  731. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  732. }
  733. /**
  734. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  735. * @filp: open sysfs file
  736. * @kobj: kobject corresponding to device to be mapped
  737. * @attr: struct bin_attribute for this file
  738. * @vma: struct vm_area_struct passed to mmap
  739. *
  740. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  741. * legacy IO space (first meg of bus space) into application virtual
  742. * memory space. Returns -ENOSYS if the operation isn't supported
  743. */
  744. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  745. struct bin_attribute *attr,
  746. struct vm_area_struct *vma)
  747. {
  748. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  749. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  750. }
  751. /**
  752. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  753. * @b: bus to create files under
  754. * @mmap_type: I/O port or memory
  755. *
  756. * Stub implementation. Can be overridden by arch if necessary.
  757. */
  758. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  759. enum pci_mmap_state mmap_type)
  760. {
  761. }
  762. /**
  763. * pci_create_legacy_files - create legacy I/O port and memory files
  764. * @b: bus to create files under
  765. *
  766. * Some platforms allow access to legacy I/O port and ISA memory space on
  767. * a per-bus basis. This routine creates the files and ties them into
  768. * their associated read, write and mmap files from pci-sysfs.c
  769. *
  770. * On error unwind, but don't propagate the error to the caller
  771. * as it is ok to set up the PCI bus without these files.
  772. */
  773. void pci_create_legacy_files(struct pci_bus *b)
  774. {
  775. int error;
  776. b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
  777. GFP_ATOMIC);
  778. if (!b->legacy_io)
  779. goto kzalloc_err;
  780. sysfs_bin_attr_init(b->legacy_io);
  781. b->legacy_io->attr.name = "legacy_io";
  782. b->legacy_io->size = 0xffff;
  783. b->legacy_io->attr.mode = 0600;
  784. b->legacy_io->read = pci_read_legacy_io;
  785. b->legacy_io->write = pci_write_legacy_io;
  786. b->legacy_io->mmap = pci_mmap_legacy_io;
  787. pci_adjust_legacy_attr(b, pci_mmap_io);
  788. error = device_create_bin_file(&b->dev, b->legacy_io);
  789. if (error)
  790. goto legacy_io_err;
  791. /* Allocated above after the legacy_io struct */
  792. b->legacy_mem = b->legacy_io + 1;
  793. sysfs_bin_attr_init(b->legacy_mem);
  794. b->legacy_mem->attr.name = "legacy_mem";
  795. b->legacy_mem->size = 1024*1024;
  796. b->legacy_mem->attr.mode = 0600;
  797. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  798. pci_adjust_legacy_attr(b, pci_mmap_mem);
  799. error = device_create_bin_file(&b->dev, b->legacy_mem);
  800. if (error)
  801. goto legacy_mem_err;
  802. return;
  803. legacy_mem_err:
  804. device_remove_bin_file(&b->dev, b->legacy_io);
  805. legacy_io_err:
  806. kfree(b->legacy_io);
  807. b->legacy_io = NULL;
  808. kzalloc_err:
  809. dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
  810. }
  811. void pci_remove_legacy_files(struct pci_bus *b)
  812. {
  813. if (b->legacy_io) {
  814. device_remove_bin_file(&b->dev, b->legacy_io);
  815. device_remove_bin_file(&b->dev, b->legacy_mem);
  816. kfree(b->legacy_io); /* both are allocated here */
  817. }
  818. }
  819. #endif /* HAVE_PCI_LEGACY */
  820. #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
  821. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  822. enum pci_mmap_api mmap_api)
  823. {
  824. unsigned long nr, start, size;
  825. resource_size_t pci_start = 0, pci_end;
  826. if (pci_resource_len(pdev, resno) == 0)
  827. return 0;
  828. nr = vma_pages(vma);
  829. start = vma->vm_pgoff;
  830. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  831. if (mmap_api == PCI_MMAP_PROCFS) {
  832. pci_resource_to_user(pdev, resno, &pdev->resource[resno],
  833. &pci_start, &pci_end);
  834. pci_start >>= PAGE_SHIFT;
  835. }
  836. if (start >= pci_start && start < pci_start + size &&
  837. start + nr <= pci_start + size)
  838. return 1;
  839. return 0;
  840. }
  841. /**
  842. * pci_mmap_resource - map a PCI resource into user memory space
  843. * @kobj: kobject for mapping
  844. * @attr: struct bin_attribute for the file being mapped
  845. * @vma: struct vm_area_struct passed into the mmap
  846. * @write_combine: 1 for write_combine mapping
  847. *
  848. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  849. */
  850. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  851. struct vm_area_struct *vma, int write_combine)
  852. {
  853. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  854. int bar = (unsigned long)attr->private;
  855. enum pci_mmap_state mmap_type;
  856. struct resource *res = &pdev->resource[bar];
  857. int ret;
  858. ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
  859. if (ret)
  860. return ret;
  861. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
  862. return -EINVAL;
  863. if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
  864. return -EINVAL;
  865. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  866. return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
  867. }
  868. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  869. struct bin_attribute *attr,
  870. struct vm_area_struct *vma)
  871. {
  872. return pci_mmap_resource(kobj, attr, vma, 0);
  873. }
  874. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  875. struct bin_attribute *attr,
  876. struct vm_area_struct *vma)
  877. {
  878. return pci_mmap_resource(kobj, attr, vma, 1);
  879. }
  880. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  881. struct bin_attribute *attr, char *buf,
  882. loff_t off, size_t count, bool write)
  883. {
  884. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  885. int bar = (unsigned long)attr->private;
  886. unsigned long port = off;
  887. port += pci_resource_start(pdev, bar);
  888. if (port > pci_resource_end(pdev, bar))
  889. return 0;
  890. if (port + count - 1 > pci_resource_end(pdev, bar))
  891. return -EINVAL;
  892. switch (count) {
  893. case 1:
  894. if (write)
  895. outb(*(u8 *)buf, port);
  896. else
  897. *(u8 *)buf = inb(port);
  898. return 1;
  899. case 2:
  900. if (write)
  901. outw(*(u16 *)buf, port);
  902. else
  903. *(u16 *)buf = inw(port);
  904. return 2;
  905. case 4:
  906. if (write)
  907. outl(*(u32 *)buf, port);
  908. else
  909. *(u32 *)buf = inl(port);
  910. return 4;
  911. }
  912. return -EINVAL;
  913. }
  914. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  915. struct bin_attribute *attr, char *buf,
  916. loff_t off, size_t count)
  917. {
  918. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  919. }
  920. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  921. struct bin_attribute *attr, char *buf,
  922. loff_t off, size_t count)
  923. {
  924. int ret;
  925. ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
  926. if (ret)
  927. return ret;
  928. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  929. }
  930. /**
  931. * pci_remove_resource_files - cleanup resource files
  932. * @pdev: dev to cleanup
  933. *
  934. * If we created resource files for @pdev, remove them from sysfs and
  935. * free their resources.
  936. */
  937. static void pci_remove_resource_files(struct pci_dev *pdev)
  938. {
  939. int i;
  940. for (i = 0; i < PCI_STD_NUM_BARS; i++) {
  941. struct bin_attribute *res_attr;
  942. res_attr = pdev->res_attr[i];
  943. if (res_attr) {
  944. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  945. kfree(res_attr);
  946. }
  947. res_attr = pdev->res_attr_wc[i];
  948. if (res_attr) {
  949. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  950. kfree(res_attr);
  951. }
  952. }
  953. }
  954. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  955. {
  956. /* allocate attribute structure, piggyback attribute name */
  957. int name_len = write_combine ? 13 : 10;
  958. struct bin_attribute *res_attr;
  959. char *res_attr_name;
  960. int retval;
  961. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  962. if (!res_attr)
  963. return -ENOMEM;
  964. res_attr_name = (char *)(res_attr + 1);
  965. sysfs_bin_attr_init(res_attr);
  966. if (write_combine) {
  967. pdev->res_attr_wc[num] = res_attr;
  968. sprintf(res_attr_name, "resource%d_wc", num);
  969. res_attr->mmap = pci_mmap_resource_wc;
  970. } else {
  971. pdev->res_attr[num] = res_attr;
  972. sprintf(res_attr_name, "resource%d", num);
  973. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  974. res_attr->read = pci_read_resource_io;
  975. res_attr->write = pci_write_resource_io;
  976. if (arch_can_pci_mmap_io())
  977. res_attr->mmap = pci_mmap_resource_uc;
  978. } else {
  979. res_attr->mmap = pci_mmap_resource_uc;
  980. }
  981. }
  982. res_attr->attr.name = res_attr_name;
  983. res_attr->attr.mode = 0600;
  984. res_attr->size = pci_resource_len(pdev, num);
  985. res_attr->private = (void *)(unsigned long)num;
  986. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  987. if (retval)
  988. kfree(res_attr);
  989. return retval;
  990. }
  991. /**
  992. * pci_create_resource_files - create resource files in sysfs for @dev
  993. * @pdev: dev in question
  994. *
  995. * Walk the resources in @pdev creating files for each resource available.
  996. */
  997. static int pci_create_resource_files(struct pci_dev *pdev)
  998. {
  999. int i;
  1000. int retval;
  1001. /* Expose the PCI resources from this device as files */
  1002. for (i = 0; i < PCI_STD_NUM_BARS; i++) {
  1003. /* skip empty resources */
  1004. if (!pci_resource_len(pdev, i))
  1005. continue;
  1006. retval = pci_create_attr(pdev, i, 0);
  1007. /* for prefetchable resources, create a WC mappable file */
  1008. if (!retval && arch_can_pci_mmap_wc() &&
  1009. pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1010. retval = pci_create_attr(pdev, i, 1);
  1011. if (retval) {
  1012. pci_remove_resource_files(pdev);
  1013. return retval;
  1014. }
  1015. }
  1016. return 0;
  1017. }
  1018. #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */
  1019. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1020. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1021. #endif
  1022. /**
  1023. * pci_write_rom - used to enable access to the PCI ROM display
  1024. * @filp: sysfs file
  1025. * @kobj: kernel object handle
  1026. * @bin_attr: struct bin_attribute for this file
  1027. * @buf: user input
  1028. * @off: file offset
  1029. * @count: number of byte in input
  1030. *
  1031. * writing anything except 0 enables it
  1032. */
  1033. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1034. struct bin_attribute *bin_attr, char *buf,
  1035. loff_t off, size_t count)
  1036. {
  1037. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1038. if ((off == 0) && (*buf == '0') && (count == 2))
  1039. pdev->rom_attr_enabled = 0;
  1040. else
  1041. pdev->rom_attr_enabled = 1;
  1042. return count;
  1043. }
  1044. /**
  1045. * pci_read_rom - read a PCI ROM
  1046. * @filp: sysfs file
  1047. * @kobj: kernel object handle
  1048. * @bin_attr: struct bin_attribute for this file
  1049. * @buf: where to put the data we read from the ROM
  1050. * @off: file offset
  1051. * @count: number of bytes to read
  1052. *
  1053. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1054. * device corresponding to @kobj.
  1055. */
  1056. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1057. struct bin_attribute *bin_attr, char *buf,
  1058. loff_t off, size_t count)
  1059. {
  1060. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1061. void __iomem *rom;
  1062. size_t size;
  1063. if (!pdev->rom_attr_enabled)
  1064. return -EINVAL;
  1065. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1066. if (!rom || !size)
  1067. return -EIO;
  1068. if (off >= size)
  1069. count = 0;
  1070. else {
  1071. if (off + count > size)
  1072. count = size - off;
  1073. memcpy_fromio(buf, rom + off, count);
  1074. }
  1075. pci_unmap_rom(pdev, rom);
  1076. return count;
  1077. }
  1078. static const struct bin_attribute pci_config_attr = {
  1079. .attr = {
  1080. .name = "config",
  1081. .mode = 0644,
  1082. },
  1083. .size = PCI_CFG_SPACE_SIZE,
  1084. .read = pci_read_config,
  1085. .write = pci_write_config,
  1086. };
  1087. static const struct bin_attribute pcie_config_attr = {
  1088. .attr = {
  1089. .name = "config",
  1090. .mode = 0644,
  1091. },
  1092. .size = PCI_CFG_SPACE_EXP_SIZE,
  1093. .read = pci_read_config,
  1094. .write = pci_write_config,
  1095. };
  1096. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1097. const char *buf, size_t count)
  1098. {
  1099. struct pci_dev *pdev = to_pci_dev(dev);
  1100. unsigned long val;
  1101. ssize_t result = kstrtoul(buf, 0, &val);
  1102. if (result < 0)
  1103. return result;
  1104. if (val != 1)
  1105. return -EINVAL;
  1106. pm_runtime_get_sync(dev);
  1107. result = pci_reset_function(pdev);
  1108. pm_runtime_put(dev);
  1109. if (result < 0)
  1110. return result;
  1111. return count;
  1112. }
  1113. static DEVICE_ATTR(reset, 0200, NULL, reset_store);
  1114. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1115. {
  1116. int retval;
  1117. pcie_vpd_create_sysfs_dev_files(dev);
  1118. if (dev->reset_fn) {
  1119. retval = device_create_file(&dev->dev, &dev_attr_reset);
  1120. if (retval)
  1121. goto error;
  1122. }
  1123. return 0;
  1124. error:
  1125. pcie_vpd_remove_sysfs_dev_files(dev);
  1126. return retval;
  1127. }
  1128. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1129. {
  1130. int retval;
  1131. int rom_size;
  1132. struct bin_attribute *attr;
  1133. if (!sysfs_initialized)
  1134. return -EACCES;
  1135. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1136. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1137. else
  1138. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1139. if (retval)
  1140. goto err;
  1141. retval = pci_create_resource_files(pdev);
  1142. if (retval)
  1143. goto err_config_file;
  1144. /* If the device has a ROM, try to expose it in sysfs. */
  1145. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1146. if (rom_size) {
  1147. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1148. if (!attr) {
  1149. retval = -ENOMEM;
  1150. goto err_resource_files;
  1151. }
  1152. sysfs_bin_attr_init(attr);
  1153. attr->size = rom_size;
  1154. attr->attr.name = "rom";
  1155. attr->attr.mode = 0600;
  1156. attr->read = pci_read_rom;
  1157. attr->write = pci_write_rom;
  1158. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1159. if (retval) {
  1160. kfree(attr);
  1161. goto err_resource_files;
  1162. }
  1163. pdev->rom_attr = attr;
  1164. }
  1165. /* add sysfs entries for various capabilities */
  1166. retval = pci_create_capabilities_sysfs(pdev);
  1167. if (retval)
  1168. goto err_rom_file;
  1169. pci_create_firmware_label_files(pdev);
  1170. return 0;
  1171. err_rom_file:
  1172. if (pdev->rom_attr) {
  1173. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1174. kfree(pdev->rom_attr);
  1175. pdev->rom_attr = NULL;
  1176. }
  1177. err_resource_files:
  1178. pci_remove_resource_files(pdev);
  1179. err_config_file:
  1180. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1181. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1182. else
  1183. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1184. err:
  1185. return retval;
  1186. }
  1187. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1188. {
  1189. pcie_vpd_remove_sysfs_dev_files(dev);
  1190. if (dev->reset_fn) {
  1191. device_remove_file(&dev->dev, &dev_attr_reset);
  1192. dev->reset_fn = 0;
  1193. }
  1194. }
  1195. /**
  1196. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1197. * @pdev: device whose entries we should free
  1198. *
  1199. * Cleanup when @pdev is removed from sysfs.
  1200. */
  1201. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1202. {
  1203. if (!sysfs_initialized)
  1204. return;
  1205. pci_remove_capabilities_sysfs(pdev);
  1206. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1207. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1208. else
  1209. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1210. pci_remove_resource_files(pdev);
  1211. if (pdev->rom_attr) {
  1212. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1213. kfree(pdev->rom_attr);
  1214. pdev->rom_attr = NULL;
  1215. }
  1216. pci_remove_firmware_label_files(pdev);
  1217. }
  1218. static int __init pci_sysfs_init(void)
  1219. {
  1220. struct pci_dev *pdev = NULL;
  1221. int retval;
  1222. sysfs_initialized = 1;
  1223. for_each_pci_dev(pdev) {
  1224. retval = pci_create_sysfs_dev_files(pdev);
  1225. if (retval) {
  1226. pci_dev_put(pdev);
  1227. return retval;
  1228. }
  1229. }
  1230. return 0;
  1231. }
  1232. late_initcall(pci_sysfs_init);
  1233. static struct attribute *pci_dev_dev_attrs[] = {
  1234. &dev_attr_boot_vga.attr,
  1235. NULL,
  1236. };
  1237. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1238. struct attribute *a, int n)
  1239. {
  1240. struct device *dev = kobj_to_dev(kobj);
  1241. struct pci_dev *pdev = to_pci_dev(dev);
  1242. if (a == &dev_attr_boot_vga.attr)
  1243. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1244. return 0;
  1245. return a->mode;
  1246. }
  1247. static struct attribute *pci_dev_hp_attrs[] = {
  1248. &dev_attr_remove.attr,
  1249. &dev_attr_dev_rescan.attr,
  1250. NULL,
  1251. };
  1252. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1253. struct attribute *a, int n)
  1254. {
  1255. struct device *dev = kobj_to_dev(kobj);
  1256. struct pci_dev *pdev = to_pci_dev(dev);
  1257. if (pdev->is_virtfn)
  1258. return 0;
  1259. return a->mode;
  1260. }
  1261. static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
  1262. struct attribute *a, int n)
  1263. {
  1264. struct device *dev = kobj_to_dev(kobj);
  1265. struct pci_dev *pdev = to_pci_dev(dev);
  1266. if (pci_is_bridge(pdev))
  1267. return a->mode;
  1268. return 0;
  1269. }
  1270. static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
  1271. struct attribute *a, int n)
  1272. {
  1273. struct device *dev = kobj_to_dev(kobj);
  1274. struct pci_dev *pdev = to_pci_dev(dev);
  1275. if (pci_is_pcie(pdev))
  1276. return a->mode;
  1277. return 0;
  1278. }
  1279. static const struct attribute_group pci_dev_group = {
  1280. .attrs = pci_dev_attrs,
  1281. };
  1282. const struct attribute_group *pci_dev_groups[] = {
  1283. &pci_dev_group,
  1284. NULL,
  1285. };
  1286. static const struct attribute_group pci_dev_hp_attr_group = {
  1287. .attrs = pci_dev_hp_attrs,
  1288. .is_visible = pci_dev_hp_attrs_are_visible,
  1289. };
  1290. static const struct attribute_group pci_dev_attr_group = {
  1291. .attrs = pci_dev_dev_attrs,
  1292. .is_visible = pci_dev_attrs_are_visible,
  1293. };
  1294. static const struct attribute_group pci_bridge_attr_group = {
  1295. .attrs = pci_bridge_attrs,
  1296. .is_visible = pci_bridge_attrs_are_visible,
  1297. };
  1298. static const struct attribute_group pcie_dev_attr_group = {
  1299. .attrs = pcie_dev_attrs,
  1300. .is_visible = pcie_dev_attrs_are_visible,
  1301. };
  1302. static const struct attribute_group *pci_dev_attr_groups[] = {
  1303. &pci_dev_attr_group,
  1304. &pci_dev_hp_attr_group,
  1305. #ifdef CONFIG_PCI_IOV
  1306. &sriov_dev_attr_group,
  1307. #endif
  1308. &pci_bridge_attr_group,
  1309. &pcie_dev_attr_group,
  1310. #ifdef CONFIG_PCIEAER
  1311. &aer_stats_attr_group,
  1312. #endif
  1313. #ifdef CONFIG_PCIEASPM
  1314. &aspm_ctrl_attr_group,
  1315. #endif
  1316. NULL,
  1317. };
  1318. const struct device_type pci_dev_type = {
  1319. .groups = pci_dev_attr_groups,
  1320. };