iov.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PCI Express I/O Virtualization (IOV) support
  4. * Single Root IOV 1.0
  5. * Address Translation Service 1.0
  6. *
  7. * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
  8. */
  9. #include <linux/pci.h>
  10. #include <linux/slab.h>
  11. #include <linux/export.h>
  12. #include <linux/string.h>
  13. #include <linux/delay.h>
  14. #include "pci.h"
  15. #define VIRTFN_ID_LEN 16
  16. int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
  17. {
  18. if (!dev->is_physfn)
  19. return -EINVAL;
  20. return dev->bus->number + ((dev->devfn + dev->sriov->offset +
  21. dev->sriov->stride * vf_id) >> 8);
  22. }
  23. int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
  24. {
  25. if (!dev->is_physfn)
  26. return -EINVAL;
  27. return (dev->devfn + dev->sriov->offset +
  28. dev->sriov->stride * vf_id) & 0xff;
  29. }
  30. /*
  31. * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
  32. * change when NumVFs changes.
  33. *
  34. * Update iov->offset and iov->stride when NumVFs is written.
  35. */
  36. static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
  37. {
  38. struct pci_sriov *iov = dev->sriov;
  39. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
  40. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  41. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  42. }
  43. /*
  44. * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
  45. * determine how many additional bus numbers will be consumed by VFs.
  46. *
  47. * Iterate over all valid NumVFs, validate offset and stride, and calculate
  48. * the maximum number of bus numbers that could ever be required.
  49. */
  50. static int compute_max_vf_buses(struct pci_dev *dev)
  51. {
  52. struct pci_sriov *iov = dev->sriov;
  53. int nr_virtfn, busnr, rc = 0;
  54. for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
  55. pci_iov_set_numvfs(dev, nr_virtfn);
  56. if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
  57. rc = -EIO;
  58. goto out;
  59. }
  60. busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  61. if (busnr > iov->max_VF_buses)
  62. iov->max_VF_buses = busnr;
  63. }
  64. out:
  65. pci_iov_set_numvfs(dev, 0);
  66. return rc;
  67. }
  68. static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
  69. {
  70. struct pci_bus *child;
  71. if (bus->number == busnr)
  72. return bus;
  73. child = pci_find_bus(pci_domain_nr(bus), busnr);
  74. if (child)
  75. return child;
  76. child = pci_add_new_bus(bus, NULL, busnr);
  77. if (!child)
  78. return NULL;
  79. pci_bus_insert_busn_res(child, busnr, busnr);
  80. return child;
  81. }
  82. static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
  83. {
  84. if (physbus != virtbus && list_empty(&virtbus->devices))
  85. pci_remove_bus(virtbus);
  86. }
  87. resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
  88. {
  89. if (!dev->is_physfn)
  90. return 0;
  91. return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
  92. }
  93. static void pci_read_vf_config_common(struct pci_dev *virtfn)
  94. {
  95. struct pci_dev *physfn = virtfn->physfn;
  96. /*
  97. * Some config registers are the same across all associated VFs.
  98. * Read them once from VF0 so we can skip reading them from the
  99. * other VFs.
  100. *
  101. * PCIe r4.0, sec 9.3.4.1, technically doesn't require all VFs to
  102. * have the same Revision ID and Subsystem ID, but we assume they
  103. * do.
  104. */
  105. pci_read_config_dword(virtfn, PCI_CLASS_REVISION,
  106. &physfn->sriov->class);
  107. pci_read_config_byte(virtfn, PCI_HEADER_TYPE,
  108. &physfn->sriov->hdr_type);
  109. pci_read_config_word(virtfn, PCI_SUBSYSTEM_VENDOR_ID,
  110. &physfn->sriov->subsystem_vendor);
  111. pci_read_config_word(virtfn, PCI_SUBSYSTEM_ID,
  112. &physfn->sriov->subsystem_device);
  113. }
  114. int pci_iov_sysfs_link(struct pci_dev *dev,
  115. struct pci_dev *virtfn, int id)
  116. {
  117. char buf[VIRTFN_ID_LEN];
  118. int rc;
  119. sprintf(buf, "virtfn%u", id);
  120. rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
  121. if (rc)
  122. goto failed;
  123. rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
  124. if (rc)
  125. goto failed1;
  126. kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
  127. return 0;
  128. failed1:
  129. sysfs_remove_link(&dev->dev.kobj, buf);
  130. failed:
  131. return rc;
  132. }
  133. int pci_iov_add_virtfn(struct pci_dev *dev, int id)
  134. {
  135. int i;
  136. int rc = -ENOMEM;
  137. u64 size;
  138. struct pci_dev *virtfn;
  139. struct resource *res;
  140. struct pci_sriov *iov = dev->sriov;
  141. struct pci_bus *bus;
  142. bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
  143. if (!bus)
  144. goto failed;
  145. virtfn = pci_alloc_dev(bus);
  146. if (!virtfn)
  147. goto failed0;
  148. virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
  149. virtfn->vendor = dev->vendor;
  150. virtfn->device = iov->vf_device;
  151. virtfn->is_virtfn = 1;
  152. virtfn->physfn = pci_dev_get(dev);
  153. virtfn->no_command_memory = 1;
  154. if (id == 0)
  155. pci_read_vf_config_common(virtfn);
  156. rc = pci_setup_device(virtfn);
  157. if (rc)
  158. goto failed1;
  159. virtfn->dev.parent = dev->dev.parent;
  160. virtfn->multifunction = 0;
  161. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  162. res = &dev->resource[i + PCI_IOV_RESOURCES];
  163. if (!res->parent)
  164. continue;
  165. virtfn->resource[i].name = pci_name(virtfn);
  166. virtfn->resource[i].flags = res->flags;
  167. size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
  168. virtfn->resource[i].start = res->start + size * id;
  169. virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
  170. rc = request_resource(res, &virtfn->resource[i]);
  171. BUG_ON(rc);
  172. }
  173. pci_device_add(virtfn, virtfn->bus);
  174. rc = pci_iov_sysfs_link(dev, virtfn, id);
  175. if (rc)
  176. goto failed1;
  177. pci_bus_add_device(virtfn);
  178. return 0;
  179. failed1:
  180. pci_stop_and_remove_bus_device(virtfn);
  181. pci_dev_put(dev);
  182. failed0:
  183. virtfn_remove_bus(dev->bus, bus);
  184. failed:
  185. return rc;
  186. }
  187. void pci_iov_remove_virtfn(struct pci_dev *dev, int id)
  188. {
  189. char buf[VIRTFN_ID_LEN];
  190. struct pci_dev *virtfn;
  191. virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
  192. pci_iov_virtfn_bus(dev, id),
  193. pci_iov_virtfn_devfn(dev, id));
  194. if (!virtfn)
  195. return;
  196. sprintf(buf, "virtfn%u", id);
  197. sysfs_remove_link(&dev->dev.kobj, buf);
  198. /*
  199. * pci_stop_dev() could have been called for this virtfn already,
  200. * so the directory for the virtfn may have been removed before.
  201. * Double check to avoid spurious sysfs warnings.
  202. */
  203. if (virtfn->dev.kobj.sd)
  204. sysfs_remove_link(&virtfn->dev.kobj, "physfn");
  205. pci_stop_and_remove_bus_device(virtfn);
  206. virtfn_remove_bus(dev->bus, virtfn->bus);
  207. /* balance pci_get_domain_bus_and_slot() */
  208. pci_dev_put(virtfn);
  209. pci_dev_put(dev);
  210. }
  211. static ssize_t sriov_totalvfs_show(struct device *dev,
  212. struct device_attribute *attr,
  213. char *buf)
  214. {
  215. struct pci_dev *pdev = to_pci_dev(dev);
  216. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  217. }
  218. static ssize_t sriov_numvfs_show(struct device *dev,
  219. struct device_attribute *attr,
  220. char *buf)
  221. {
  222. struct pci_dev *pdev = to_pci_dev(dev);
  223. u16 num_vfs;
  224. /* Serialize vs sriov_numvfs_store() so readers see valid num_VFs */
  225. device_lock(&pdev->dev);
  226. num_vfs = pdev->sriov->num_VFs;
  227. device_unlock(&pdev->dev);
  228. return sprintf(buf, "%u\n", num_vfs);
  229. }
  230. /*
  231. * num_vfs > 0; number of VFs to enable
  232. * num_vfs = 0; disable all VFs
  233. *
  234. * Note: SRIOV spec does not allow partial VF
  235. * disable, so it's all or none.
  236. */
  237. static ssize_t sriov_numvfs_store(struct device *dev,
  238. struct device_attribute *attr,
  239. const char *buf, size_t count)
  240. {
  241. struct pci_dev *pdev = to_pci_dev(dev);
  242. int ret;
  243. u16 num_vfs;
  244. ret = kstrtou16(buf, 0, &num_vfs);
  245. if (ret < 0)
  246. return ret;
  247. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  248. return -ERANGE;
  249. device_lock(&pdev->dev);
  250. if (num_vfs == pdev->sriov->num_VFs)
  251. goto exit;
  252. /* is PF driver loaded w/callback */
  253. if (!pdev->driver || !pdev->driver->sriov_configure) {
  254. pci_info(pdev, "Driver does not support SRIOV configuration via sysfs\n");
  255. ret = -ENOENT;
  256. goto exit;
  257. }
  258. if (num_vfs == 0) {
  259. /* disable VFs */
  260. ret = pdev->driver->sriov_configure(pdev, 0);
  261. goto exit;
  262. }
  263. /* enable VFs */
  264. if (pdev->sriov->num_VFs) {
  265. pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  266. pdev->sriov->num_VFs, num_vfs);
  267. ret = -EBUSY;
  268. goto exit;
  269. }
  270. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  271. if (ret < 0)
  272. goto exit;
  273. if (ret != num_vfs)
  274. pci_warn(pdev, "%d VFs requested; only %d enabled\n",
  275. num_vfs, ret);
  276. exit:
  277. device_unlock(&pdev->dev);
  278. if (ret < 0)
  279. return ret;
  280. return count;
  281. }
  282. static ssize_t sriov_offset_show(struct device *dev,
  283. struct device_attribute *attr,
  284. char *buf)
  285. {
  286. struct pci_dev *pdev = to_pci_dev(dev);
  287. return sprintf(buf, "%u\n", pdev->sriov->offset);
  288. }
  289. static ssize_t sriov_stride_show(struct device *dev,
  290. struct device_attribute *attr,
  291. char *buf)
  292. {
  293. struct pci_dev *pdev = to_pci_dev(dev);
  294. return sprintf(buf, "%u\n", pdev->sriov->stride);
  295. }
  296. static ssize_t sriov_vf_device_show(struct device *dev,
  297. struct device_attribute *attr,
  298. char *buf)
  299. {
  300. struct pci_dev *pdev = to_pci_dev(dev);
  301. return sprintf(buf, "%x\n", pdev->sriov->vf_device);
  302. }
  303. static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
  304. struct device_attribute *attr,
  305. char *buf)
  306. {
  307. struct pci_dev *pdev = to_pci_dev(dev);
  308. return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
  309. }
  310. static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
  311. struct device_attribute *attr,
  312. const char *buf, size_t count)
  313. {
  314. struct pci_dev *pdev = to_pci_dev(dev);
  315. bool drivers_autoprobe;
  316. if (kstrtobool(buf, &drivers_autoprobe) < 0)
  317. return -EINVAL;
  318. pdev->sriov->drivers_autoprobe = drivers_autoprobe;
  319. return count;
  320. }
  321. static DEVICE_ATTR_RO(sriov_totalvfs);
  322. static DEVICE_ATTR_RW(sriov_numvfs);
  323. static DEVICE_ATTR_RO(sriov_offset);
  324. static DEVICE_ATTR_RO(sriov_stride);
  325. static DEVICE_ATTR_RO(sriov_vf_device);
  326. static DEVICE_ATTR_RW(sriov_drivers_autoprobe);
  327. static struct attribute *sriov_dev_attrs[] = {
  328. &dev_attr_sriov_totalvfs.attr,
  329. &dev_attr_sriov_numvfs.attr,
  330. &dev_attr_sriov_offset.attr,
  331. &dev_attr_sriov_stride.attr,
  332. &dev_attr_sriov_vf_device.attr,
  333. &dev_attr_sriov_drivers_autoprobe.attr,
  334. NULL,
  335. };
  336. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  337. struct attribute *a, int n)
  338. {
  339. struct device *dev = kobj_to_dev(kobj);
  340. if (!dev_is_pf(dev))
  341. return 0;
  342. return a->mode;
  343. }
  344. const struct attribute_group sriov_dev_attr_group = {
  345. .attrs = sriov_dev_attrs,
  346. .is_visible = sriov_attrs_are_visible,
  347. };
  348. int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
  349. {
  350. return 0;
  351. }
  352. int __weak pcibios_sriov_disable(struct pci_dev *pdev)
  353. {
  354. return 0;
  355. }
  356. static int sriov_add_vfs(struct pci_dev *dev, u16 num_vfs)
  357. {
  358. unsigned int i;
  359. int rc;
  360. if (dev->no_vf_scan)
  361. return 0;
  362. for (i = 0; i < num_vfs; i++) {
  363. rc = pci_iov_add_virtfn(dev, i);
  364. if (rc)
  365. goto failed;
  366. }
  367. return 0;
  368. failed:
  369. while (i--)
  370. pci_iov_remove_virtfn(dev, i);
  371. return rc;
  372. }
  373. static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
  374. {
  375. int rc;
  376. int i;
  377. int nres;
  378. u16 initial;
  379. struct resource *res;
  380. struct pci_dev *pdev;
  381. struct pci_sriov *iov = dev->sriov;
  382. int bars = 0;
  383. int bus;
  384. if (!nr_virtfn)
  385. return 0;
  386. if (iov->num_VFs)
  387. return -EINVAL;
  388. pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
  389. if (initial > iov->total_VFs ||
  390. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
  391. return -EIO;
  392. if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
  393. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
  394. return -EINVAL;
  395. nres = 0;
  396. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  397. bars |= (1 << (i + PCI_IOV_RESOURCES));
  398. res = &dev->resource[i + PCI_IOV_RESOURCES];
  399. if (res->parent)
  400. nres++;
  401. }
  402. if (nres != iov->nres) {
  403. pci_err(dev, "not enough MMIO resources for SR-IOV\n");
  404. return -ENOMEM;
  405. }
  406. bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  407. if (bus > dev->bus->busn_res.end) {
  408. pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
  409. nr_virtfn, bus, &dev->bus->busn_res);
  410. return -ENOMEM;
  411. }
  412. if (pci_enable_resources(dev, bars)) {
  413. pci_err(dev, "SR-IOV: IOV BARS not allocated\n");
  414. return -ENOMEM;
  415. }
  416. if (iov->link != dev->devfn) {
  417. pdev = pci_get_slot(dev->bus, iov->link);
  418. if (!pdev)
  419. return -ENODEV;
  420. if (!pdev->is_physfn) {
  421. pci_dev_put(pdev);
  422. return -ENOSYS;
  423. }
  424. rc = sysfs_create_link(&dev->dev.kobj,
  425. &pdev->dev.kobj, "dep_link");
  426. pci_dev_put(pdev);
  427. if (rc)
  428. return rc;
  429. }
  430. iov->initial_VFs = initial;
  431. if (nr_virtfn < initial)
  432. initial = nr_virtfn;
  433. rc = pcibios_sriov_enable(dev, initial);
  434. if (rc) {
  435. pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc);
  436. goto err_pcibios;
  437. }
  438. pci_iov_set_numvfs(dev, nr_virtfn);
  439. iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
  440. pci_cfg_access_lock(dev);
  441. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  442. msleep(100);
  443. pci_cfg_access_unlock(dev);
  444. rc = sriov_add_vfs(dev, initial);
  445. if (rc)
  446. goto err_pcibios;
  447. kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
  448. iov->num_VFs = nr_virtfn;
  449. return 0;
  450. err_pcibios:
  451. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  452. pci_cfg_access_lock(dev);
  453. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  454. ssleep(1);
  455. pci_cfg_access_unlock(dev);
  456. pcibios_sriov_disable(dev);
  457. if (iov->link != dev->devfn)
  458. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  459. pci_iov_set_numvfs(dev, 0);
  460. return rc;
  461. }
  462. static void sriov_del_vfs(struct pci_dev *dev)
  463. {
  464. struct pci_sriov *iov = dev->sriov;
  465. int i;
  466. for (i = 0; i < iov->num_VFs; i++)
  467. pci_iov_remove_virtfn(dev, i);
  468. }
  469. static void sriov_disable(struct pci_dev *dev)
  470. {
  471. struct pci_sriov *iov = dev->sriov;
  472. if (!iov->num_VFs)
  473. return;
  474. sriov_del_vfs(dev);
  475. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  476. pci_cfg_access_lock(dev);
  477. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  478. ssleep(1);
  479. pci_cfg_access_unlock(dev);
  480. pcibios_sriov_disable(dev);
  481. if (iov->link != dev->devfn)
  482. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  483. iov->num_VFs = 0;
  484. pci_iov_set_numvfs(dev, 0);
  485. }
  486. static int sriov_init(struct pci_dev *dev, int pos)
  487. {
  488. int i, bar64;
  489. int rc;
  490. int nres;
  491. u32 pgsz;
  492. u16 ctrl, total;
  493. struct pci_sriov *iov;
  494. struct resource *res;
  495. struct pci_dev *pdev;
  496. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
  497. if (ctrl & PCI_SRIOV_CTRL_VFE) {
  498. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
  499. ssleep(1);
  500. }
  501. ctrl = 0;
  502. list_for_each_entry(pdev, &dev->bus->devices, bus_list)
  503. if (pdev->is_physfn)
  504. goto found;
  505. pdev = NULL;
  506. if (pci_ari_enabled(dev->bus))
  507. ctrl |= PCI_SRIOV_CTRL_ARI;
  508. found:
  509. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
  510. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
  511. if (!total)
  512. return 0;
  513. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
  514. i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
  515. pgsz &= ~((1 << i) - 1);
  516. if (!pgsz)
  517. return -EIO;
  518. pgsz &= ~(pgsz - 1);
  519. pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
  520. iov = kzalloc(sizeof(*iov), GFP_KERNEL);
  521. if (!iov)
  522. return -ENOMEM;
  523. nres = 0;
  524. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  525. res = &dev->resource[i + PCI_IOV_RESOURCES];
  526. /*
  527. * If it is already FIXED, don't change it, something
  528. * (perhaps EA or header fixups) wants it this way.
  529. */
  530. if (res->flags & IORESOURCE_PCI_FIXED)
  531. bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
  532. else
  533. bar64 = __pci_read_base(dev, pci_bar_unknown, res,
  534. pos + PCI_SRIOV_BAR + i * 4);
  535. if (!res->flags)
  536. continue;
  537. if (resource_size(res) & (PAGE_SIZE - 1)) {
  538. rc = -EIO;
  539. goto failed;
  540. }
  541. iov->barsz[i] = resource_size(res);
  542. res->end = res->start + resource_size(res) * total - 1;
  543. pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
  544. i, res, i, total);
  545. i += bar64;
  546. nres++;
  547. }
  548. iov->pos = pos;
  549. iov->nres = nres;
  550. iov->ctrl = ctrl;
  551. iov->total_VFs = total;
  552. iov->driver_max_VFs = total;
  553. pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device);
  554. iov->pgsz = pgsz;
  555. iov->self = dev;
  556. iov->drivers_autoprobe = true;
  557. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  558. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  559. if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
  560. iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
  561. if (pdev)
  562. iov->dev = pci_dev_get(pdev);
  563. else
  564. iov->dev = dev;
  565. dev->sriov = iov;
  566. dev->is_physfn = 1;
  567. rc = compute_max_vf_buses(dev);
  568. if (rc)
  569. goto fail_max_buses;
  570. return 0;
  571. fail_max_buses:
  572. dev->sriov = NULL;
  573. dev->is_physfn = 0;
  574. failed:
  575. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  576. res = &dev->resource[i + PCI_IOV_RESOURCES];
  577. res->flags = 0;
  578. }
  579. kfree(iov);
  580. return rc;
  581. }
  582. static void sriov_release(struct pci_dev *dev)
  583. {
  584. BUG_ON(dev->sriov->num_VFs);
  585. if (dev != dev->sriov->dev)
  586. pci_dev_put(dev->sriov->dev);
  587. kfree(dev->sriov);
  588. dev->sriov = NULL;
  589. }
  590. static void sriov_restore_state(struct pci_dev *dev)
  591. {
  592. int i;
  593. u16 ctrl;
  594. struct pci_sriov *iov = dev->sriov;
  595. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
  596. if (ctrl & PCI_SRIOV_CTRL_VFE)
  597. return;
  598. /*
  599. * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because
  600. * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI.
  601. */
  602. ctrl &= ~PCI_SRIOV_CTRL_ARI;
  603. ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI;
  604. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl);
  605. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
  606. pci_update_resource(dev, i + PCI_IOV_RESOURCES);
  607. pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
  608. pci_iov_set_numvfs(dev, iov->num_VFs);
  609. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  610. if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
  611. msleep(100);
  612. }
  613. /**
  614. * pci_iov_init - initialize the IOV capability
  615. * @dev: the PCI device
  616. *
  617. * Returns 0 on success, or negative on failure.
  618. */
  619. int pci_iov_init(struct pci_dev *dev)
  620. {
  621. int pos;
  622. if (!pci_is_pcie(dev))
  623. return -ENODEV;
  624. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  625. if (pos)
  626. return sriov_init(dev, pos);
  627. return -ENODEV;
  628. }
  629. /**
  630. * pci_iov_release - release resources used by the IOV capability
  631. * @dev: the PCI device
  632. */
  633. void pci_iov_release(struct pci_dev *dev)
  634. {
  635. if (dev->is_physfn)
  636. sriov_release(dev);
  637. }
  638. /**
  639. * pci_iov_remove - clean up SR-IOV state after PF driver is detached
  640. * @dev: the PCI device
  641. */
  642. void pci_iov_remove(struct pci_dev *dev)
  643. {
  644. struct pci_sriov *iov = dev->sriov;
  645. if (!dev->is_physfn)
  646. return;
  647. iov->driver_max_VFs = iov->total_VFs;
  648. if (iov->num_VFs)
  649. pci_warn(dev, "driver left SR-IOV enabled after remove\n");
  650. }
  651. /**
  652. * pci_iov_update_resource - update a VF BAR
  653. * @dev: the PCI device
  654. * @resno: the resource number
  655. *
  656. * Update a VF BAR in the SR-IOV capability of a PF.
  657. */
  658. void pci_iov_update_resource(struct pci_dev *dev, int resno)
  659. {
  660. struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
  661. struct resource *res = dev->resource + resno;
  662. int vf_bar = resno - PCI_IOV_RESOURCES;
  663. struct pci_bus_region region;
  664. u16 cmd;
  665. u32 new;
  666. int reg;
  667. /*
  668. * The generic pci_restore_bars() path calls this for all devices,
  669. * including VFs and non-SR-IOV devices. If this is not a PF, we
  670. * have nothing to do.
  671. */
  672. if (!iov)
  673. return;
  674. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
  675. if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
  676. dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
  677. vf_bar, res);
  678. return;
  679. }
  680. /*
  681. * Ignore unimplemented BARs, unused resource slots for 64-bit
  682. * BARs, and non-movable resources, e.g., those described via
  683. * Enhanced Allocation.
  684. */
  685. if (!res->flags)
  686. return;
  687. if (res->flags & IORESOURCE_UNSET)
  688. return;
  689. if (res->flags & IORESOURCE_PCI_FIXED)
  690. return;
  691. pcibios_resource_to_bus(dev->bus, &region, res);
  692. new = region.start;
  693. new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
  694. reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
  695. pci_write_config_dword(dev, reg, new);
  696. if (res->flags & IORESOURCE_MEM_64) {
  697. new = region.start >> 16 >> 16;
  698. pci_write_config_dword(dev, reg + 4, new);
  699. }
  700. }
  701. resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
  702. int resno)
  703. {
  704. return pci_iov_resource_size(dev, resno);
  705. }
  706. /**
  707. * pci_sriov_resource_alignment - get resource alignment for VF BAR
  708. * @dev: the PCI device
  709. * @resno: the resource number
  710. *
  711. * Returns the alignment of the VF BAR found in the SR-IOV capability.
  712. * This is not the same as the resource size which is defined as
  713. * the VF BAR size multiplied by the number of VFs. The alignment
  714. * is just the VF BAR size.
  715. */
  716. resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
  717. {
  718. return pcibios_iov_resource_alignment(dev, resno);
  719. }
  720. /**
  721. * pci_restore_iov_state - restore the state of the IOV capability
  722. * @dev: the PCI device
  723. */
  724. void pci_restore_iov_state(struct pci_dev *dev)
  725. {
  726. if (dev->is_physfn)
  727. sriov_restore_state(dev);
  728. }
  729. /**
  730. * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs
  731. * @dev: the PCI device
  732. * @auto_probe: set VF drivers auto probe flag
  733. */
  734. void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe)
  735. {
  736. if (dev->is_physfn)
  737. dev->sriov->drivers_autoprobe = auto_probe;
  738. }
  739. /**
  740. * pci_iov_bus_range - find bus range used by Virtual Function
  741. * @bus: the PCI bus
  742. *
  743. * Returns max number of buses (exclude current one) used by Virtual
  744. * Functions.
  745. */
  746. int pci_iov_bus_range(struct pci_bus *bus)
  747. {
  748. int max = 0;
  749. struct pci_dev *dev;
  750. list_for_each_entry(dev, &bus->devices, bus_list) {
  751. if (!dev->is_physfn)
  752. continue;
  753. if (dev->sriov->max_VF_buses > max)
  754. max = dev->sriov->max_VF_buses;
  755. }
  756. return max ? max - bus->number : 0;
  757. }
  758. /**
  759. * pci_enable_sriov - enable the SR-IOV capability
  760. * @dev: the PCI device
  761. * @nr_virtfn: number of virtual functions to enable
  762. *
  763. * Returns 0 on success, or negative on failure.
  764. */
  765. int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
  766. {
  767. might_sleep();
  768. if (!dev->is_physfn)
  769. return -ENOSYS;
  770. return sriov_enable(dev, nr_virtfn);
  771. }
  772. EXPORT_SYMBOL_GPL(pci_enable_sriov);
  773. /**
  774. * pci_disable_sriov - disable the SR-IOV capability
  775. * @dev: the PCI device
  776. */
  777. void pci_disable_sriov(struct pci_dev *dev)
  778. {
  779. might_sleep();
  780. if (!dev->is_physfn)
  781. return;
  782. sriov_disable(dev);
  783. }
  784. EXPORT_SYMBOL_GPL(pci_disable_sriov);
  785. /**
  786. * pci_num_vf - return number of VFs associated with a PF device_release_driver
  787. * @dev: the PCI device
  788. *
  789. * Returns number of VFs, or 0 if SR-IOV is not enabled.
  790. */
  791. int pci_num_vf(struct pci_dev *dev)
  792. {
  793. if (!dev->is_physfn)
  794. return 0;
  795. return dev->sriov->num_VFs;
  796. }
  797. EXPORT_SYMBOL_GPL(pci_num_vf);
  798. /**
  799. * pci_vfs_assigned - returns number of VFs are assigned to a guest
  800. * @dev: the PCI device
  801. *
  802. * Returns number of VFs belonging to this device that are assigned to a guest.
  803. * If device is not a physical function returns 0.
  804. */
  805. int pci_vfs_assigned(struct pci_dev *dev)
  806. {
  807. struct pci_dev *vfdev;
  808. unsigned int vfs_assigned = 0;
  809. unsigned short dev_id;
  810. /* only search if we are a PF */
  811. if (!dev->is_physfn)
  812. return 0;
  813. /*
  814. * determine the device ID for the VFs, the vendor ID will be the
  815. * same as the PF so there is no need to check for that one
  816. */
  817. dev_id = dev->sriov->vf_device;
  818. /* loop through all the VFs to see if we own any that are assigned */
  819. vfdev = pci_get_device(dev->vendor, dev_id, NULL);
  820. while (vfdev) {
  821. /*
  822. * It is considered assigned if it is a virtual function with
  823. * our dev as the physical function and the assigned bit is set
  824. */
  825. if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
  826. pci_is_dev_assigned(vfdev))
  827. vfs_assigned++;
  828. vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
  829. }
  830. return vfs_assigned;
  831. }
  832. EXPORT_SYMBOL_GPL(pci_vfs_assigned);
  833. /**
  834. * pci_sriov_set_totalvfs -- reduce the TotalVFs available
  835. * @dev: the PCI PF device
  836. * @numvfs: number that should be used for TotalVFs supported
  837. *
  838. * Should be called from PF driver's probe routine with
  839. * device's mutex held.
  840. *
  841. * Returns 0 if PF is an SRIOV-capable device and
  842. * value of numvfs valid. If not a PF return -ENOSYS;
  843. * if numvfs is invalid return -EINVAL;
  844. * if VFs already enabled, return -EBUSY.
  845. */
  846. int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
  847. {
  848. if (!dev->is_physfn)
  849. return -ENOSYS;
  850. if (numvfs > dev->sriov->total_VFs)
  851. return -EINVAL;
  852. /* Shouldn't change if VFs already enabled */
  853. if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
  854. return -EBUSY;
  855. dev->sriov->driver_max_VFs = numvfs;
  856. return 0;
  857. }
  858. EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
  859. /**
  860. * pci_sriov_get_totalvfs -- get total VFs supported on this device
  861. * @dev: the PCI PF device
  862. *
  863. * For a PCIe device with SRIOV support, return the PCIe
  864. * SRIOV capability value of TotalVFs or the value of driver_max_VFs
  865. * if the driver reduced it. Otherwise 0.
  866. */
  867. int pci_sriov_get_totalvfs(struct pci_dev *dev)
  868. {
  869. if (!dev->is_physfn)
  870. return 0;
  871. return dev->sriov->driver_max_VFs;
  872. }
  873. EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
  874. /**
  875. * pci_sriov_configure_simple - helper to configure SR-IOV
  876. * @dev: the PCI device
  877. * @nr_virtfn: number of virtual functions to enable, 0 to disable
  878. *
  879. * Enable or disable SR-IOV for devices that don't require any PF setup
  880. * before enabling SR-IOV. Return value is negative on error, or number of
  881. * VFs allocated on success.
  882. */
  883. int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn)
  884. {
  885. int rc;
  886. might_sleep();
  887. if (!dev->is_physfn)
  888. return -ENODEV;
  889. if (pci_vfs_assigned(dev)) {
  890. pci_warn(dev, "Cannot modify SR-IOV while VFs are assigned\n");
  891. return -EPERM;
  892. }
  893. if (nr_virtfn == 0) {
  894. sriov_disable(dev);
  895. return 0;
  896. }
  897. rc = sriov_enable(dev, nr_virtfn);
  898. if (rc < 0)
  899. return rc;
  900. return nr_virtfn;
  901. }
  902. EXPORT_SYMBOL_GPL(pci_sriov_configure_simple);