pci-versatile.c 4.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2004 Koninklijke Philips Electronics NV
  4. *
  5. * Conversion to platform driver and DT:
  6. * Copyright 2014 Linaro Ltd.
  7. *
  8. * 14/04/2005 Initial version, colin.king@philips.com
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/of_address.h>
  13. #include <linux/of_pci.h>
  14. #include <linux/of_platform.h>
  15. #include <linux/pci.h>
  16. #include <linux/platform_device.h>
  17. #include "../pci.h"
  18. static void __iomem *versatile_pci_base;
  19. static void __iomem *versatile_cfg_base[2];
  20. #define PCI_IMAP(m) (versatile_pci_base + ((m) * 4))
  21. #define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4))
  22. #define PCI_SELFID (versatile_pci_base + 0xc)
  23. #define VP_PCI_DEVICE_ID 0x030010ee
  24. #define VP_PCI_CLASS_ID 0x0b400000
  25. static u32 pci_slot_ignore;
  26. static int __init versatile_pci_slot_ignore(char *str)
  27. {
  28. int retval;
  29. int slot;
  30. while ((retval = get_option(&str, &slot))) {
  31. if ((slot < 0) || (slot > 31))
  32. pr_err("Illegal slot value: %d\n", slot);
  33. else
  34. pci_slot_ignore |= (1 << slot);
  35. }
  36. return 1;
  37. }
  38. __setup("pci_slot_ignore=", versatile_pci_slot_ignore);
  39. static void __iomem *versatile_map_bus(struct pci_bus *bus,
  40. unsigned int devfn, int offset)
  41. {
  42. unsigned int busnr = bus->number;
  43. if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
  44. return NULL;
  45. return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
  46. }
  47. static struct pci_ops pci_versatile_ops = {
  48. .map_bus = versatile_map_bus,
  49. .read = pci_generic_config_read32,
  50. .write = pci_generic_config_write,
  51. };
  52. static int versatile_pci_probe(struct platform_device *pdev)
  53. {
  54. struct device *dev = &pdev->dev;
  55. struct resource *res;
  56. struct resource_entry *entry;
  57. int i, myslot = -1, mem = 1;
  58. u32 val;
  59. void __iomem *local_pci_cfg_base;
  60. struct pci_host_bridge *bridge;
  61. bridge = devm_pci_alloc_host_bridge(dev, 0);
  62. if (!bridge)
  63. return -ENOMEM;
  64. versatile_pci_base = devm_platform_ioremap_resource(pdev, 0);
  65. if (IS_ERR(versatile_pci_base))
  66. return PTR_ERR(versatile_pci_base);
  67. versatile_cfg_base[0] = devm_platform_ioremap_resource(pdev, 1);
  68. if (IS_ERR(versatile_cfg_base[0]))
  69. return PTR_ERR(versatile_cfg_base[0]);
  70. res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
  71. versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res);
  72. if (IS_ERR(versatile_cfg_base[1]))
  73. return PTR_ERR(versatile_cfg_base[1]);
  74. resource_list_for_each_entry(entry, &bridge->windows) {
  75. if (resource_type(entry->res) == IORESOURCE_MEM) {
  76. writel(entry->res->start >> 28, PCI_IMAP(mem));
  77. writel(__pa(PAGE_OFFSET) >> 28, PCI_SMAP(mem));
  78. mem++;
  79. }
  80. }
  81. /*
  82. * We need to discover the PCI core first to configure itself
  83. * before the main PCI probing is performed
  84. */
  85. for (i = 0; i < 32; i++) {
  86. if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
  87. (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
  88. myslot = i;
  89. break;
  90. }
  91. }
  92. if (myslot == -1) {
  93. dev_err(dev, "Cannot find PCI core!\n");
  94. return -EIO;
  95. }
  96. /*
  97. * Do not to map Versatile FPGA PCI device into memory space
  98. */
  99. pci_slot_ignore |= (1 << myslot);
  100. dev_info(dev, "PCI core found (slot %d)\n", myslot);
  101. writel(myslot, PCI_SELFID);
  102. local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
  103. val = readl(local_pci_cfg_base + PCI_COMMAND);
  104. val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
  105. writel(val, local_pci_cfg_base + PCI_COMMAND);
  106. /*
  107. * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
  108. */
  109. writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_0);
  110. writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_1);
  111. writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_2);
  112. /*
  113. * For many years the kernel and QEMU were symbiotically buggy
  114. * in that they both assumed the same broken IRQ mapping.
  115. * QEMU therefore attempts to auto-detect old broken kernels
  116. * so that they still work on newer QEMU as they did on old
  117. * QEMU. Since we now use the correct (ie matching-hardware)
  118. * IRQ mapping we write a definitely different value to a
  119. * PCI_INTERRUPT_LINE register to tell QEMU that we expect
  120. * real hardware behaviour and it need not be backwards
  121. * compatible for us. This write is harmless on real hardware.
  122. */
  123. writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
  124. pci_add_flags(PCI_REASSIGN_ALL_BUS);
  125. bridge->ops = &pci_versatile_ops;
  126. return pci_host_probe(bridge);
  127. }
  128. static const struct of_device_id versatile_pci_of_match[] = {
  129. { .compatible = "arm,versatile-pci", },
  130. { },
  131. };
  132. MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
  133. static struct platform_driver versatile_pci_driver = {
  134. .driver = {
  135. .name = "versatile-pci",
  136. .of_match_table = versatile_pci_of_match,
  137. .suppress_bind_attrs = true,
  138. },
  139. .probe = versatile_pci_probe,
  140. };
  141. module_platform_driver(versatile_pci_driver);
  142. MODULE_DESCRIPTION("Versatile PCI driver");
  143. MODULE_LICENSE("GPL v2");