superio.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /* National Semiconductor NS87560UBD Super I/O controller used in
  3. * HP [BCJ]x000 workstations.
  4. *
  5. * This chip is a horrid piece of engineering, and National
  6. * denies any knowledge of its existence. Thus no datasheet is
  7. * available off www.national.com.
  8. *
  9. * (C) Copyright 2000 Linuxcare, Inc.
  10. * (C) Copyright 2000 Linuxcare Canada, Inc.
  11. * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
  12. * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
  13. * (C) Copyright 2001 John Marvin <jsm fc hp com>
  14. * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
  15. * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
  16. * (C) Copyright 2006 Helge Deller <deller@gmx.de>
  17. *
  18. * The initial version of this is by Martin Peterson. Alex deVries
  19. * has spent a bit of time trying to coax it into working.
  20. *
  21. * Major changes to get basic interrupt infrastructure working to
  22. * hopefully be able to support all SuperIO devices. Currently
  23. * works with serial. -- John Marvin <jsm@fc.hp.com>
  24. *
  25. * Converted superio_init() to be a PCI_FIXUP_FINAL callee.
  26. * -- Kyle McMartin <kyle@parisc-linux.org>
  27. */
  28. /* NOTES:
  29. *
  30. * Function 0 is an IDE controller. It is identical to a PC87415 IDE
  31. * controller (and identifies itself as such).
  32. *
  33. * Function 1 is a "Legacy I/O" controller. Under this function is a
  34. * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
  35. * all the functionality in hardware, but the following is available:
  36. *
  37. * Two 16550A compatible serial controllers
  38. * An IEEE 1284 compatible parallel port
  39. * A floppy disk controller
  40. *
  41. * Function 2 is a USB controller.
  42. *
  43. * We must be incredibly careful during initialization. Since all
  44. * interrupts are routed through function 1 (which is not allowed by
  45. * the PCI spec), we need to program the PICs on the legacy I/O port
  46. * *before* we attempt to set up IDE and USB. @#$!&
  47. *
  48. * According to HP, devices are only enabled by firmware if they have
  49. * a physical device connected.
  50. *
  51. * Configuration register bits:
  52. * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
  53. * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
  54. *
  55. */
  56. #include <linux/errno.h>
  57. #include <linux/init.h>
  58. #include <linux/module.h>
  59. #include <linux/types.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/ioport.h>
  62. #include <linux/serial.h>
  63. #include <linux/pci.h>
  64. #include <linux/parport.h>
  65. #include <linux/parport_pc.h>
  66. #include <linux/termios.h>
  67. #include <linux/tty.h>
  68. #include <linux/serial_core.h>
  69. #include <linux/serial_8250.h>
  70. #include <linux/delay.h>
  71. #include <asm/io.h>
  72. #include <asm/hardware.h>
  73. #include <asm/superio.h>
  74. static struct superio_device sio_dev;
  75. #undef DEBUG_SUPERIO_INIT
  76. #ifdef DEBUG_SUPERIO_INIT
  77. #define DBG_INIT(x...) printk(x)
  78. #else
  79. #define DBG_INIT(x...)
  80. #endif
  81. #define SUPERIO "SuperIO"
  82. #define PFX SUPERIO ": "
  83. static irqreturn_t
  84. superio_interrupt(int parent_irq, void *devp)
  85. {
  86. u8 results;
  87. u8 local_irq;
  88. /* Poll the 8259 to see if there's an interrupt. */
  89. outb (OCW3_POLL,IC_PIC1+0);
  90. results = inb(IC_PIC1+0);
  91. /*
  92. * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
  93. * Bits 6-3: zero
  94. * Bits 2-0: highest priority, active requesting interrupt ID (0-7)
  95. */
  96. if ((results & 0x80) == 0) {
  97. /* I suspect "spurious" interrupts are from unmasking an IRQ.
  98. * We don't know if an interrupt was/is pending and thus
  99. * just call the handler for that IRQ as if it were pending.
  100. */
  101. return IRQ_NONE;
  102. }
  103. /* Check to see which device is interrupting */
  104. local_irq = results & 0x0f;
  105. if (local_irq == 2 || local_irq > 7) {
  106. printk(KERN_ERR PFX "slave interrupted!\n");
  107. return IRQ_HANDLED;
  108. }
  109. if (local_irq == 7) {
  110. /* Could be spurious. Check in service bits */
  111. outb(OCW3_ISR,IC_PIC1+0);
  112. results = inb(IC_PIC1+0);
  113. if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
  114. printk(KERN_WARNING PFX "spurious interrupt!\n");
  115. return IRQ_HANDLED;
  116. }
  117. }
  118. /* Call the appropriate device's interrupt */
  119. generic_handle_irq(local_irq);
  120. /* set EOI - forces a new interrupt if a lower priority device
  121. * still needs service.
  122. */
  123. outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
  124. return IRQ_HANDLED;
  125. }
  126. /* Initialize Super I/O device */
  127. static void
  128. superio_init(struct pci_dev *pcidev)
  129. {
  130. struct superio_device *sio = &sio_dev;
  131. struct pci_dev *pdev = sio->lio_pdev;
  132. u16 word;
  133. int ret;
  134. if (sio->suckyio_irq_enabled)
  135. return;
  136. BUG_ON(!pdev);
  137. BUG_ON(!sio->usb_pdev);
  138. /* use the IRQ iosapic found for USB INT D... */
  139. pdev->irq = sio->usb_pdev->irq;
  140. /* ...then properly fixup the USB to point at suckyio PIC */
  141. sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
  142. printk(KERN_INFO PFX "Found NS87560 Legacy I/O device at %s (IRQ %i)\n",
  143. pci_name(pdev), pdev->irq);
  144. pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
  145. sio->sp1_base &= ~1;
  146. printk(KERN_INFO PFX "Serial port 1 at 0x%x\n", sio->sp1_base);
  147. pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
  148. sio->sp2_base &= ~1;
  149. printk(KERN_INFO PFX "Serial port 2 at 0x%x\n", sio->sp2_base);
  150. pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
  151. sio->pp_base &= ~1;
  152. printk(KERN_INFO PFX "Parallel port at 0x%x\n", sio->pp_base);
  153. pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
  154. sio->fdc_base &= ~1;
  155. printk(KERN_INFO PFX "Floppy controller at 0x%x\n", sio->fdc_base);
  156. pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
  157. sio->acpi_base &= ~1;
  158. printk(KERN_INFO PFX "ACPI at 0x%x\n", sio->acpi_base);
  159. request_region (IC_PIC1, 0x1f, "pic1");
  160. request_region (IC_PIC2, 0x1f, "pic2");
  161. request_region (sio->acpi_base, 0x1f, "acpi");
  162. /* Enable the legacy I/O function */
  163. pci_read_config_word (pdev, PCI_COMMAND, &word);
  164. word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
  165. pci_write_config_word (pdev, PCI_COMMAND, word);
  166. pci_set_master (pdev);
  167. ret = pci_enable_device(pdev);
  168. BUG_ON(ret < 0); /* not too much we can do about this... */
  169. /*
  170. * Next project is programming the onboard interrupt controllers.
  171. * PDC hasn't done this for us, since it's using polled I/O.
  172. *
  173. * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
  174. * space access. PCI is by nature a 32-bit bus and config
  175. * space can be sensitive to that.
  176. */
  177. /* 0x64 - 0x67 :
  178. DMA Rtg 2
  179. DMA Rtg 3
  180. DMA Chan Ctl
  181. TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
  182. */
  183. pci_write_config_dword (pdev, 0x64, 0x82000000U);
  184. /* 0x68 - 0x6b :
  185. TRIGGER_2 == 0x00 all edge triggered (not used)
  186. CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
  187. CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
  188. CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
  189. */
  190. pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
  191. /* 0x6c - 0x6f :
  192. CFG_IR_INTAB == 0x00
  193. CFG_IR_INTCD == 0x10 USB = IRQ1
  194. CFG_IR_PS2 == 0x00
  195. CFG_IR_FXBUS == 0x00
  196. */
  197. pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
  198. /* 0x70 - 0x73 :
  199. CFG_IR_USB == 0x00 not used. USB is connected to INTD.
  200. CFG_IR_ACPI == 0x00 not used.
  201. DMA Priority == 0x4c88 Power on default value. NFC.
  202. */
  203. pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
  204. /* PIC1 Initialization Command Word register programming */
  205. outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */
  206. outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
  207. outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
  208. outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
  209. /* PIC1 Program Operational Control Words */
  210. outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
  211. outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
  212. /* PIC2 Initialization Command Word register programming */
  213. outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */
  214. outb (0x00,IC_PIC2+1); /* ICW2: N/A */
  215. outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
  216. outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
  217. /* Program Operational Control Words */
  218. outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
  219. outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */
  220. /* Write master mask reg */
  221. outb (0xff,IC_PIC1+1);
  222. /* Setup USB power regulation */
  223. outb(1, sio->acpi_base + USB_REG_CR);
  224. if (inb(sio->acpi_base + USB_REG_CR) & 1)
  225. printk(KERN_INFO PFX "USB regulator enabled\n");
  226. else
  227. printk(KERN_ERR PFX "USB regulator not initialized!\n");
  228. if (request_irq(pdev->irq, superio_interrupt, 0,
  229. SUPERIO, (void *)sio)) {
  230. printk(KERN_ERR PFX "could not get irq\n");
  231. BUG();
  232. return;
  233. }
  234. sio->suckyio_irq_enabled = 1;
  235. }
  236. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
  237. static void superio_mask_irq(struct irq_data *d)
  238. {
  239. unsigned int irq = d->irq;
  240. u8 r8;
  241. if ((irq < 1) || (irq == 2) || (irq > 7)) {
  242. printk(KERN_ERR PFX "Illegal irq number.\n");
  243. BUG();
  244. return;
  245. }
  246. /* Mask interrupt */
  247. r8 = inb(IC_PIC1+1);
  248. r8 |= (1 << irq);
  249. outb (r8,IC_PIC1+1);
  250. }
  251. static void superio_unmask_irq(struct irq_data *d)
  252. {
  253. unsigned int irq = d->irq;
  254. u8 r8;
  255. if ((irq < 1) || (irq == 2) || (irq > 7)) {
  256. printk(KERN_ERR PFX "Illegal irq number (%d).\n", irq);
  257. BUG();
  258. return;
  259. }
  260. /* Unmask interrupt */
  261. r8 = inb(IC_PIC1+1);
  262. r8 &= ~(1 << irq);
  263. outb (r8,IC_PIC1+1);
  264. }
  265. static struct irq_chip superio_interrupt_type = {
  266. .name = SUPERIO,
  267. .irq_unmask = superio_unmask_irq,
  268. .irq_mask = superio_mask_irq,
  269. };
  270. #ifdef DEBUG_SUPERIO_INIT
  271. static unsigned short expected_device[3] = {
  272. PCI_DEVICE_ID_NS_87415,
  273. PCI_DEVICE_ID_NS_87560_LIO,
  274. PCI_DEVICE_ID_NS_87560_USB
  275. };
  276. #endif
  277. int superio_fixup_irq(struct pci_dev *pcidev)
  278. {
  279. int local_irq, i;
  280. #ifdef DEBUG_SUPERIO_INIT
  281. int fn;
  282. fn = PCI_FUNC(pcidev->devfn);
  283. /* Verify the function number matches the expected device id. */
  284. if (expected_device[fn] != pcidev->device) {
  285. BUG();
  286. return -1;
  287. }
  288. printk(KERN_DEBUG "superio_fixup_irq(%s) ven 0x%x dev 0x%x from %ps\n",
  289. pci_name(pcidev),
  290. pcidev->vendor, pcidev->device,
  291. __builtin_return_address(0));
  292. #endif
  293. for (i = 0; i < 16; i++) {
  294. irq_set_chip_and_handler(i, &superio_interrupt_type,
  295. handle_simple_irq);
  296. }
  297. /*
  298. * We don't allocate a SuperIO irq for the legacy IO function,
  299. * since it is a "bridge". Instead, we will allocate irq's for
  300. * each legacy device as they are initialized.
  301. */
  302. switch(pcidev->device) {
  303. case PCI_DEVICE_ID_NS_87415: /* Function 0 */
  304. local_irq = IDE_IRQ;
  305. break;
  306. case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
  307. sio_dev.lio_pdev = pcidev; /* save for superio_init() */
  308. return -1;
  309. case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
  310. sio_dev.usb_pdev = pcidev; /* save for superio_init() */
  311. local_irq = USB_IRQ;
  312. break;
  313. default:
  314. local_irq = -1;
  315. BUG();
  316. break;
  317. }
  318. return local_irq;
  319. }
  320. static void __init superio_serial_init(void)
  321. {
  322. #ifdef CONFIG_SERIAL_8250
  323. int retval;
  324. struct uart_port serial_port;
  325. memset(&serial_port, 0, sizeof(serial_port));
  326. serial_port.iotype = UPIO_PORT;
  327. serial_port.type = PORT_16550A;
  328. serial_port.uartclk = 115200*16;
  329. serial_port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE |
  330. UPF_BOOT_AUTOCONF;
  331. /* serial port #1 */
  332. serial_port.iobase = sio_dev.sp1_base;
  333. serial_port.irq = SP1_IRQ;
  334. serial_port.line = 0;
  335. retval = early_serial_setup(&serial_port);
  336. if (retval < 0) {
  337. printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
  338. return;
  339. }
  340. /* serial port #2 */
  341. serial_port.iobase = sio_dev.sp2_base;
  342. serial_port.irq = SP2_IRQ;
  343. serial_port.line = 1;
  344. retval = early_serial_setup(&serial_port);
  345. if (retval < 0)
  346. printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
  347. #endif /* CONFIG_SERIAL_8250 */
  348. }
  349. static void __init superio_parport_init(void)
  350. {
  351. #ifdef CONFIG_PARPORT_PC
  352. if (!parport_pc_probe_port(sio_dev.pp_base,
  353. 0 /*base_hi*/,
  354. PAR_IRQ,
  355. PARPORT_DMA_NONE /* dma */,
  356. NULL /*struct pci_dev* */,
  357. 0 /* shared irq flags */))
  358. printk(KERN_WARNING PFX "Probing parallel port failed.\n");
  359. #endif /* CONFIG_PARPORT_PC */
  360. }
  361. static void superio_fixup_pci(struct pci_dev *pdev)
  362. {
  363. u8 prog;
  364. pdev->class |= 0x5;
  365. pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
  366. pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
  367. printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
  368. }
  369. DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
  370. static int __init
  371. superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
  372. {
  373. struct superio_device *sio = &sio_dev;
  374. /*
  375. ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
  376. ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
  377. ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
  378. */
  379. DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
  380. pci_name(dev),
  381. dev->vendor, dev->device,
  382. dev->subsystem_vendor, dev->subsystem_device,
  383. dev->class);
  384. BUG_ON(!sio->suckyio_irq_enabled); /* Enabled by PCI_FIXUP_FINAL */
  385. if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
  386. superio_parport_init();
  387. superio_serial_init();
  388. /* REVISIT XXX : superio_fdc_init() ? */
  389. return 0;
  390. } else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
  391. DBG_INIT("superio_probe: ignoring IDE 87415\n");
  392. } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
  393. DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
  394. } else {
  395. DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
  396. }
  397. /* Let appropriate other driver claim this device. */
  398. return -ENODEV;
  399. }
  400. static const struct pci_device_id superio_tbl[] __initconst = {
  401. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
  402. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
  403. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
  404. { 0, }
  405. };
  406. static struct pci_driver superio_driver __refdata = {
  407. .name = SUPERIO,
  408. .id_table = superio_tbl,
  409. .probe = superio_probe,
  410. };
  411. module_pci_driver(superio_driver);