address.c 27 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #define pr_fmt(fmt) "OF: " fmt
  3. #include <linux/device.h>
  4. #include <linux/fwnode.h>
  5. #include <linux/io.h>
  6. #include <linux/ioport.h>
  7. #include <linux/logic_pio.h>
  8. #include <linux/module.h>
  9. #include <linux/of_address.h>
  10. #include <linux/pci.h>
  11. #include <linux/pci_regs.h>
  12. #include <linux/sizes.h>
  13. #include <linux/slab.h>
  14. #include <linux/string.h>
  15. #include <linux/dma-direct.h> /* for bus_dma_region */
  16. #include "of_private.h"
  17. /* Max address size we deal with */
  18. #define OF_MAX_ADDR_CELLS 4
  19. #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
  20. #define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
  21. static struct of_bus *of_match_bus(struct device_node *np);
  22. static int __of_address_to_resource(struct device_node *dev,
  23. const __be32 *addrp, u64 size, unsigned int flags,
  24. const char *name, struct resource *r);
  25. /* Debug utility */
  26. #ifdef DEBUG
  27. static void of_dump_addr(const char *s, const __be32 *addr, int na)
  28. {
  29. pr_debug("%s", s);
  30. while (na--)
  31. pr_cont(" %08x", be32_to_cpu(*(addr++)));
  32. pr_cont("\n");
  33. }
  34. #else
  35. static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
  36. #endif
  37. /* Callbacks for bus specific translators */
  38. struct of_bus {
  39. const char *name;
  40. const char *addresses;
  41. int (*match)(struct device_node *parent);
  42. void (*count_cells)(struct device_node *child,
  43. int *addrc, int *sizec);
  44. u64 (*map)(__be32 *addr, const __be32 *range,
  45. int na, int ns, int pna);
  46. int (*translate)(__be32 *addr, u64 offset, int na);
  47. bool has_flags;
  48. unsigned int (*get_flags)(const __be32 *addr);
  49. };
  50. /*
  51. * Default translator (generic bus)
  52. */
  53. static void of_bus_default_count_cells(struct device_node *dev,
  54. int *addrc, int *sizec)
  55. {
  56. if (addrc)
  57. *addrc = of_n_addr_cells(dev);
  58. if (sizec)
  59. *sizec = of_n_size_cells(dev);
  60. }
  61. static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
  62. int na, int ns, int pna)
  63. {
  64. u64 cp, s, da;
  65. cp = of_read_number(range, na);
  66. s = of_read_number(range + na + pna, ns);
  67. da = of_read_number(addr, na);
  68. pr_debug("default map, cp=%llx, s=%llx, da=%llx\n",
  69. (unsigned long long)cp, (unsigned long long)s,
  70. (unsigned long long)da);
  71. if (da < cp || da >= (cp + s))
  72. return OF_BAD_ADDR;
  73. return da - cp;
  74. }
  75. static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
  76. {
  77. u64 a = of_read_number(addr, na);
  78. memset(addr, 0, na * 4);
  79. a += offset;
  80. if (na > 1)
  81. addr[na - 2] = cpu_to_be32(a >> 32);
  82. addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
  83. return 0;
  84. }
  85. static unsigned int of_bus_default_get_flags(const __be32 *addr)
  86. {
  87. return IORESOURCE_MEM;
  88. }
  89. #ifdef CONFIG_PCI
  90. static unsigned int of_bus_pci_get_flags(const __be32 *addr)
  91. {
  92. unsigned int flags = 0;
  93. u32 w = be32_to_cpup(addr);
  94. if (!IS_ENABLED(CONFIG_PCI))
  95. return 0;
  96. switch((w >> 24) & 0x03) {
  97. case 0x01:
  98. flags |= IORESOURCE_IO;
  99. break;
  100. case 0x02: /* 32 bits */
  101. case 0x03: /* 64 bits */
  102. flags |= IORESOURCE_MEM;
  103. break;
  104. }
  105. if (w & 0x40000000)
  106. flags |= IORESOURCE_PREFETCH;
  107. return flags;
  108. }
  109. /*
  110. * PCI bus specific translator
  111. */
  112. static bool of_node_is_pcie(struct device_node *np)
  113. {
  114. bool is_pcie = of_node_name_eq(np, "pcie");
  115. if (is_pcie)
  116. pr_warn_once("%pOF: Missing device_type\n", np);
  117. return is_pcie;
  118. }
  119. static int of_bus_pci_match(struct device_node *np)
  120. {
  121. /*
  122. * "pciex" is PCI Express
  123. * "vci" is for the /chaos bridge on 1st-gen PCI powermacs
  124. * "ht" is hypertransport
  125. *
  126. * If none of the device_type match, and that the node name is
  127. * "pcie", accept the device as PCI (with a warning).
  128. */
  129. return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") ||
  130. of_node_is_type(np, "vci") || of_node_is_type(np, "ht") ||
  131. of_node_is_pcie(np);
  132. }
  133. static void of_bus_pci_count_cells(struct device_node *np,
  134. int *addrc, int *sizec)
  135. {
  136. if (addrc)
  137. *addrc = 3;
  138. if (sizec)
  139. *sizec = 2;
  140. }
  141. static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
  142. int pna)
  143. {
  144. u64 cp, s, da;
  145. unsigned int af, rf;
  146. af = of_bus_pci_get_flags(addr);
  147. rf = of_bus_pci_get_flags(range);
  148. /* Check address type match */
  149. if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
  150. return OF_BAD_ADDR;
  151. /* Read address values, skipping high cell */
  152. cp = of_read_number(range + 1, na - 1);
  153. s = of_read_number(range + na + pna, ns);
  154. da = of_read_number(addr + 1, na - 1);
  155. pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n",
  156. (unsigned long long)cp, (unsigned long long)s,
  157. (unsigned long long)da);
  158. if (da < cp || da >= (cp + s))
  159. return OF_BAD_ADDR;
  160. return da - cp;
  161. }
  162. static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
  163. {
  164. return of_bus_default_translate(addr + 1, offset, na - 1);
  165. }
  166. const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
  167. unsigned int *flags)
  168. {
  169. const __be32 *prop;
  170. unsigned int psize;
  171. struct device_node *parent;
  172. struct of_bus *bus;
  173. int onesize, i, na, ns;
  174. /* Get parent & match bus type */
  175. parent = of_get_parent(dev);
  176. if (parent == NULL)
  177. return NULL;
  178. bus = of_match_bus(parent);
  179. if (strcmp(bus->name, "pci")) {
  180. of_node_put(parent);
  181. return NULL;
  182. }
  183. bus->count_cells(dev, &na, &ns);
  184. of_node_put(parent);
  185. if (!OF_CHECK_ADDR_COUNT(na))
  186. return NULL;
  187. /* Get "reg" or "assigned-addresses" property */
  188. prop = of_get_property(dev, bus->addresses, &psize);
  189. if (prop == NULL)
  190. return NULL;
  191. psize /= 4;
  192. onesize = na + ns;
  193. for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
  194. u32 val = be32_to_cpu(prop[0]);
  195. if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
  196. if (size)
  197. *size = of_read_number(prop + na, ns);
  198. if (flags)
  199. *flags = bus->get_flags(prop);
  200. return prop;
  201. }
  202. }
  203. return NULL;
  204. }
  205. EXPORT_SYMBOL(of_get_pci_address);
  206. int of_pci_address_to_resource(struct device_node *dev, int bar,
  207. struct resource *r)
  208. {
  209. const __be32 *addrp;
  210. u64 size;
  211. unsigned int flags;
  212. addrp = of_get_pci_address(dev, bar, &size, &flags);
  213. if (addrp == NULL)
  214. return -EINVAL;
  215. return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
  216. }
  217. EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
  218. /*
  219. * of_pci_range_to_resource - Create a resource from an of_pci_range
  220. * @range: the PCI range that describes the resource
  221. * @np: device node where the range belongs to
  222. * @res: pointer to a valid resource that will be updated to
  223. * reflect the values contained in the range.
  224. *
  225. * Returns EINVAL if the range cannot be converted to resource.
  226. *
  227. * Note that if the range is an IO range, the resource will be converted
  228. * using pci_address_to_pio() which can fail if it is called too early or
  229. * if the range cannot be matched to any host bridge IO space (our case here).
  230. * To guard against that we try to register the IO range first.
  231. * If that fails we know that pci_address_to_pio() will do too.
  232. */
  233. int of_pci_range_to_resource(struct of_pci_range *range,
  234. struct device_node *np, struct resource *res)
  235. {
  236. int err;
  237. res->flags = range->flags;
  238. res->parent = res->child = res->sibling = NULL;
  239. res->name = np->full_name;
  240. if (res->flags & IORESOURCE_IO) {
  241. unsigned long port;
  242. err = pci_register_io_range(&np->fwnode, range->cpu_addr,
  243. range->size);
  244. if (err)
  245. goto invalid_range;
  246. port = pci_address_to_pio(range->cpu_addr);
  247. if (port == (unsigned long)-1) {
  248. err = -EINVAL;
  249. goto invalid_range;
  250. }
  251. res->start = port;
  252. } else {
  253. if ((sizeof(resource_size_t) < 8) &&
  254. upper_32_bits(range->cpu_addr)) {
  255. err = -EINVAL;
  256. goto invalid_range;
  257. }
  258. res->start = range->cpu_addr;
  259. }
  260. res->end = res->start + range->size - 1;
  261. return 0;
  262. invalid_range:
  263. res->start = (resource_size_t)OF_BAD_ADDR;
  264. res->end = (resource_size_t)OF_BAD_ADDR;
  265. return err;
  266. }
  267. EXPORT_SYMBOL(of_pci_range_to_resource);
  268. #endif /* CONFIG_PCI */
  269. /*
  270. * ISA bus specific translator
  271. */
  272. static int of_bus_isa_match(struct device_node *np)
  273. {
  274. return of_node_name_eq(np, "isa");
  275. }
  276. static void of_bus_isa_count_cells(struct device_node *child,
  277. int *addrc, int *sizec)
  278. {
  279. if (addrc)
  280. *addrc = 2;
  281. if (sizec)
  282. *sizec = 1;
  283. }
  284. static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
  285. int pna)
  286. {
  287. u64 cp, s, da;
  288. /* Check address type match */
  289. if ((addr[0] ^ range[0]) & cpu_to_be32(1))
  290. return OF_BAD_ADDR;
  291. /* Read address values, skipping high cell */
  292. cp = of_read_number(range + 1, na - 1);
  293. s = of_read_number(range + na + pna, ns);
  294. da = of_read_number(addr + 1, na - 1);
  295. pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n",
  296. (unsigned long long)cp, (unsigned long long)s,
  297. (unsigned long long)da);
  298. if (da < cp || da >= (cp + s))
  299. return OF_BAD_ADDR;
  300. return da - cp;
  301. }
  302. static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
  303. {
  304. return of_bus_default_translate(addr + 1, offset, na - 1);
  305. }
  306. static unsigned int of_bus_isa_get_flags(const __be32 *addr)
  307. {
  308. unsigned int flags = 0;
  309. u32 w = be32_to_cpup(addr);
  310. if (w & 1)
  311. flags |= IORESOURCE_IO;
  312. else
  313. flags |= IORESOURCE_MEM;
  314. return flags;
  315. }
  316. /*
  317. * Array of bus specific translators
  318. */
  319. static struct of_bus of_busses[] = {
  320. #ifdef CONFIG_PCI
  321. /* PCI */
  322. {
  323. .name = "pci",
  324. .addresses = "assigned-addresses",
  325. .match = of_bus_pci_match,
  326. .count_cells = of_bus_pci_count_cells,
  327. .map = of_bus_pci_map,
  328. .translate = of_bus_pci_translate,
  329. .has_flags = true,
  330. .get_flags = of_bus_pci_get_flags,
  331. },
  332. #endif /* CONFIG_PCI */
  333. /* ISA */
  334. {
  335. .name = "isa",
  336. .addresses = "reg",
  337. .match = of_bus_isa_match,
  338. .count_cells = of_bus_isa_count_cells,
  339. .map = of_bus_isa_map,
  340. .translate = of_bus_isa_translate,
  341. .has_flags = true,
  342. .get_flags = of_bus_isa_get_flags,
  343. },
  344. /* Default */
  345. {
  346. .name = "default",
  347. .addresses = "reg",
  348. .match = NULL,
  349. .count_cells = of_bus_default_count_cells,
  350. .map = of_bus_default_map,
  351. .translate = of_bus_default_translate,
  352. .get_flags = of_bus_default_get_flags,
  353. },
  354. };
  355. static struct of_bus *of_match_bus(struct device_node *np)
  356. {
  357. int i;
  358. for (i = 0; i < ARRAY_SIZE(of_busses); i++)
  359. if (!of_busses[i].match || of_busses[i].match(np))
  360. return &of_busses[i];
  361. BUG();
  362. return NULL;
  363. }
  364. static int of_empty_ranges_quirk(struct device_node *np)
  365. {
  366. if (IS_ENABLED(CONFIG_PPC)) {
  367. /* To save cycles, we cache the result for global "Mac" setting */
  368. static int quirk_state = -1;
  369. /* PA-SEMI sdc DT bug */
  370. if (of_device_is_compatible(np, "1682m-sdc"))
  371. return true;
  372. /* Make quirk cached */
  373. if (quirk_state < 0)
  374. quirk_state =
  375. of_machine_is_compatible("Power Macintosh") ||
  376. of_machine_is_compatible("MacRISC");
  377. return quirk_state;
  378. }
  379. return false;
  380. }
  381. static int of_translate_one(struct device_node *parent, struct of_bus *bus,
  382. struct of_bus *pbus, __be32 *addr,
  383. int na, int ns, int pna, const char *rprop)
  384. {
  385. const __be32 *ranges;
  386. unsigned int rlen;
  387. int rone;
  388. u64 offset = OF_BAD_ADDR;
  389. /*
  390. * Normally, an absence of a "ranges" property means we are
  391. * crossing a non-translatable boundary, and thus the addresses
  392. * below the current cannot be converted to CPU physical ones.
  393. * Unfortunately, while this is very clear in the spec, it's not
  394. * what Apple understood, and they do have things like /uni-n or
  395. * /ht nodes with no "ranges" property and a lot of perfectly
  396. * useable mapped devices below them. Thus we treat the absence of
  397. * "ranges" as equivalent to an empty "ranges" property which means
  398. * a 1:1 translation at that level. It's up to the caller not to try
  399. * to translate addresses that aren't supposed to be translated in
  400. * the first place. --BenH.
  401. *
  402. * As far as we know, this damage only exists on Apple machines, so
  403. * This code is only enabled on powerpc. --gcl
  404. *
  405. * This quirk also applies for 'dma-ranges' which frequently exist in
  406. * child nodes without 'dma-ranges' in the parent nodes. --RobH
  407. */
  408. ranges = of_get_property(parent, rprop, &rlen);
  409. if (ranges == NULL && !of_empty_ranges_quirk(parent) &&
  410. strcmp(rprop, "dma-ranges")) {
  411. pr_debug("no ranges; cannot translate\n");
  412. return 1;
  413. }
  414. if (ranges == NULL || rlen == 0) {
  415. offset = of_read_number(addr, na);
  416. memset(addr, 0, pna * 4);
  417. pr_debug("empty ranges; 1:1 translation\n");
  418. goto finish;
  419. }
  420. pr_debug("walking ranges...\n");
  421. /* Now walk through the ranges */
  422. rlen /= 4;
  423. rone = na + pna + ns;
  424. for (; rlen >= rone; rlen -= rone, ranges += rone) {
  425. offset = bus->map(addr, ranges, na, ns, pna);
  426. if (offset != OF_BAD_ADDR)
  427. break;
  428. }
  429. if (offset == OF_BAD_ADDR) {
  430. pr_debug("not found !\n");
  431. return 1;
  432. }
  433. memcpy(addr, ranges + na, 4 * pna);
  434. finish:
  435. of_dump_addr("parent translation for:", addr, pna);
  436. pr_debug("with offset: %llx\n", (unsigned long long)offset);
  437. /* Translate it into parent bus space */
  438. return pbus->translate(addr, offset, pna);
  439. }
  440. /*
  441. * Translate an address from the device-tree into a CPU physical address,
  442. * this walks up the tree and applies the various bus mappings on the
  443. * way.
  444. *
  445. * Note: We consider that crossing any level with #size-cells == 0 to mean
  446. * that translation is impossible (that is we are not dealing with a value
  447. * that can be mapped to a cpu physical address). This is not really specified
  448. * that way, but this is traditionally the way IBM at least do things
  449. *
  450. * Whenever the translation fails, the *host pointer will be set to the
  451. * device that had registered logical PIO mapping, and the return code is
  452. * relative to that node.
  453. */
  454. static u64 __of_translate_address(struct device_node *dev,
  455. struct device_node *(*get_parent)(const struct device_node *),
  456. const __be32 *in_addr, const char *rprop,
  457. struct device_node **host)
  458. {
  459. struct device_node *parent = NULL;
  460. struct of_bus *bus, *pbus;
  461. __be32 addr[OF_MAX_ADDR_CELLS];
  462. int na, ns, pna, pns;
  463. u64 result = OF_BAD_ADDR;
  464. pr_debug("** translation for device %pOF **\n", dev);
  465. /* Increase refcount at current level */
  466. of_node_get(dev);
  467. *host = NULL;
  468. /* Get parent & match bus type */
  469. parent = get_parent(dev);
  470. if (parent == NULL)
  471. goto bail;
  472. bus = of_match_bus(parent);
  473. /* Count address cells & copy address locally */
  474. bus->count_cells(dev, &na, &ns);
  475. if (!OF_CHECK_COUNTS(na, ns)) {
  476. pr_debug("Bad cell count for %pOF\n", dev);
  477. goto bail;
  478. }
  479. memcpy(addr, in_addr, na * 4);
  480. pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n",
  481. bus->name, na, ns, parent);
  482. of_dump_addr("translating address:", addr, na);
  483. /* Translate */
  484. for (;;) {
  485. struct logic_pio_hwaddr *iorange;
  486. /* Switch to parent bus */
  487. of_node_put(dev);
  488. dev = parent;
  489. parent = get_parent(dev);
  490. /* If root, we have finished */
  491. if (parent == NULL) {
  492. pr_debug("reached root node\n");
  493. result = of_read_number(addr, na);
  494. break;
  495. }
  496. /*
  497. * For indirectIO device which has no ranges property, get
  498. * the address from reg directly.
  499. */
  500. iorange = find_io_range_by_fwnode(&dev->fwnode);
  501. if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) {
  502. result = of_read_number(addr + 1, na - 1);
  503. pr_debug("indirectIO matched(%pOF) 0x%llx\n",
  504. dev, result);
  505. *host = of_node_get(dev);
  506. break;
  507. }
  508. /* Get new parent bus and counts */
  509. pbus = of_match_bus(parent);
  510. pbus->count_cells(dev, &pna, &pns);
  511. if (!OF_CHECK_COUNTS(pna, pns)) {
  512. pr_err("Bad cell count for %pOF\n", dev);
  513. break;
  514. }
  515. pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n",
  516. pbus->name, pna, pns, parent);
  517. /* Apply bus translation */
  518. if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
  519. break;
  520. /* Complete the move up one level */
  521. na = pna;
  522. ns = pns;
  523. bus = pbus;
  524. of_dump_addr("one level translation:", addr, na);
  525. }
  526. bail:
  527. of_node_put(parent);
  528. of_node_put(dev);
  529. return result;
  530. }
  531. u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
  532. {
  533. struct device_node *host;
  534. u64 ret;
  535. ret = __of_translate_address(dev, of_get_parent,
  536. in_addr, "ranges", &host);
  537. if (host) {
  538. of_node_put(host);
  539. return OF_BAD_ADDR;
  540. }
  541. return ret;
  542. }
  543. EXPORT_SYMBOL(of_translate_address);
  544. static struct device_node *__of_get_dma_parent(const struct device_node *np)
  545. {
  546. struct of_phandle_args args;
  547. int ret, index;
  548. index = of_property_match_string(np, "interconnect-names", "dma-mem");
  549. if (index < 0)
  550. return of_get_parent(np);
  551. ret = of_parse_phandle_with_args(np, "interconnects",
  552. "#interconnect-cells",
  553. index, &args);
  554. if (ret < 0)
  555. return of_get_parent(np);
  556. return of_node_get(args.np);
  557. }
  558. static struct device_node *of_get_next_dma_parent(struct device_node *np)
  559. {
  560. struct device_node *parent;
  561. parent = __of_get_dma_parent(np);
  562. of_node_put(np);
  563. return parent;
  564. }
  565. u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
  566. {
  567. struct device_node *host;
  568. u64 ret;
  569. ret = __of_translate_address(dev, __of_get_dma_parent,
  570. in_addr, "dma-ranges", &host);
  571. if (host) {
  572. of_node_put(host);
  573. return OF_BAD_ADDR;
  574. }
  575. return ret;
  576. }
  577. EXPORT_SYMBOL(of_translate_dma_address);
  578. const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
  579. unsigned int *flags)
  580. {
  581. const __be32 *prop;
  582. unsigned int psize;
  583. struct device_node *parent;
  584. struct of_bus *bus;
  585. int onesize, i, na, ns;
  586. /* Get parent & match bus type */
  587. parent = of_get_parent(dev);
  588. if (parent == NULL)
  589. return NULL;
  590. bus = of_match_bus(parent);
  591. bus->count_cells(dev, &na, &ns);
  592. of_node_put(parent);
  593. if (!OF_CHECK_ADDR_COUNT(na))
  594. return NULL;
  595. /* Get "reg" or "assigned-addresses" property */
  596. prop = of_get_property(dev, bus->addresses, &psize);
  597. if (prop == NULL)
  598. return NULL;
  599. psize /= 4;
  600. onesize = na + ns;
  601. for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
  602. if (i == index) {
  603. if (size)
  604. *size = of_read_number(prop + na, ns);
  605. if (flags)
  606. *flags = bus->get_flags(prop);
  607. return prop;
  608. }
  609. return NULL;
  610. }
  611. EXPORT_SYMBOL(of_get_address);
  612. static int parser_init(struct of_pci_range_parser *parser,
  613. struct device_node *node, const char *name)
  614. {
  615. int rlen;
  616. parser->node = node;
  617. parser->pna = of_n_addr_cells(node);
  618. parser->na = of_bus_n_addr_cells(node);
  619. parser->ns = of_bus_n_size_cells(node);
  620. parser->dma = !strcmp(name, "dma-ranges");
  621. parser->bus = of_match_bus(node);
  622. parser->range = of_get_property(node, name, &rlen);
  623. if (parser->range == NULL)
  624. return -ENOENT;
  625. parser->end = parser->range + rlen / sizeof(__be32);
  626. return 0;
  627. }
  628. int of_pci_range_parser_init(struct of_pci_range_parser *parser,
  629. struct device_node *node)
  630. {
  631. return parser_init(parser, node, "ranges");
  632. }
  633. EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
  634. int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser,
  635. struct device_node *node)
  636. {
  637. return parser_init(parser, node, "dma-ranges");
  638. }
  639. EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init);
  640. #define of_dma_range_parser_init of_pci_dma_range_parser_init
  641. struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
  642. struct of_pci_range *range)
  643. {
  644. int na = parser->na;
  645. int ns = parser->ns;
  646. int np = parser->pna + na + ns;
  647. int busflag_na = 0;
  648. if (!range)
  649. return NULL;
  650. if (!parser->range || parser->range + np > parser->end)
  651. return NULL;
  652. range->flags = parser->bus->get_flags(parser->range);
  653. /* A extra cell for resource flags */
  654. if (parser->bus->has_flags)
  655. busflag_na = 1;
  656. range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
  657. if (parser->dma)
  658. range->cpu_addr = of_translate_dma_address(parser->node,
  659. parser->range + na);
  660. else
  661. range->cpu_addr = of_translate_address(parser->node,
  662. parser->range + na);
  663. range->size = of_read_number(parser->range + parser->pna + na, ns);
  664. parser->range += np;
  665. /* Now consume following elements while they are contiguous */
  666. while (parser->range + np <= parser->end) {
  667. u32 flags = 0;
  668. u64 bus_addr, cpu_addr, size;
  669. flags = parser->bus->get_flags(parser->range);
  670. bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
  671. if (parser->dma)
  672. cpu_addr = of_translate_dma_address(parser->node,
  673. parser->range + na);
  674. else
  675. cpu_addr = of_translate_address(parser->node,
  676. parser->range + na);
  677. size = of_read_number(parser->range + parser->pna + na, ns);
  678. if (flags != range->flags)
  679. break;
  680. if (bus_addr != range->bus_addr + range->size ||
  681. cpu_addr != range->cpu_addr + range->size)
  682. break;
  683. range->size += size;
  684. parser->range += np;
  685. }
  686. return range;
  687. }
  688. EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
  689. static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr,
  690. u64 size)
  691. {
  692. u64 taddr;
  693. unsigned long port;
  694. struct device_node *host;
  695. taddr = __of_translate_address(dev, of_get_parent,
  696. in_addr, "ranges", &host);
  697. if (host) {
  698. /* host-specific port access */
  699. port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size);
  700. of_node_put(host);
  701. } else {
  702. /* memory-mapped I/O range */
  703. port = pci_address_to_pio(taddr);
  704. }
  705. if (port == (unsigned long)-1)
  706. return OF_BAD_ADDR;
  707. return port;
  708. }
  709. static int __of_address_to_resource(struct device_node *dev,
  710. const __be32 *addrp, u64 size, unsigned int flags,
  711. const char *name, struct resource *r)
  712. {
  713. u64 taddr;
  714. if (flags & IORESOURCE_MEM)
  715. taddr = of_translate_address(dev, addrp);
  716. else if (flags & IORESOURCE_IO)
  717. taddr = of_translate_ioport(dev, addrp, size);
  718. else
  719. return -EINVAL;
  720. if (taddr == OF_BAD_ADDR)
  721. return -EINVAL;
  722. memset(r, 0, sizeof(struct resource));
  723. r->start = taddr;
  724. r->end = taddr + size - 1;
  725. r->flags = flags;
  726. r->name = name ? name : dev->full_name;
  727. return 0;
  728. }
  729. /**
  730. * of_address_to_resource - Translate device tree address and return as resource
  731. *
  732. * Note that if your address is a PIO address, the conversion will fail if
  733. * the physical address can't be internally converted to an IO token with
  734. * pci_address_to_pio(), that is because it's either called too early or it
  735. * can't be matched to any host bridge IO space
  736. */
  737. int of_address_to_resource(struct device_node *dev, int index,
  738. struct resource *r)
  739. {
  740. const __be32 *addrp;
  741. u64 size;
  742. unsigned int flags;
  743. const char *name = NULL;
  744. addrp = of_get_address(dev, index, &size, &flags);
  745. if (addrp == NULL)
  746. return -EINVAL;
  747. /* Get optional "reg-names" property to add a name to a resource */
  748. of_property_read_string_index(dev, "reg-names", index, &name);
  749. return __of_address_to_resource(dev, addrp, size, flags, name, r);
  750. }
  751. EXPORT_SYMBOL_GPL(of_address_to_resource);
  752. /**
  753. * of_iomap - Maps the memory mapped IO for a given device_node
  754. * @np: the device whose io range will be mapped
  755. * @index: index of the io range
  756. *
  757. * Returns a pointer to the mapped memory
  758. */
  759. void __iomem *of_iomap(struct device_node *np, int index)
  760. {
  761. struct resource res;
  762. if (of_address_to_resource(np, index, &res))
  763. return NULL;
  764. return ioremap(res.start, resource_size(&res));
  765. }
  766. EXPORT_SYMBOL(of_iomap);
  767. /*
  768. * of_io_request_and_map - Requests a resource and maps the memory mapped IO
  769. * for a given device_node
  770. * @device: the device whose io range will be mapped
  771. * @index: index of the io range
  772. * @name: name "override" for the memory region request or NULL
  773. *
  774. * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
  775. * error code on failure. Usage example:
  776. *
  777. * base = of_io_request_and_map(node, 0, "foo");
  778. * if (IS_ERR(base))
  779. * return PTR_ERR(base);
  780. */
  781. void __iomem *of_io_request_and_map(struct device_node *np, int index,
  782. const char *name)
  783. {
  784. struct resource res;
  785. void __iomem *mem;
  786. if (of_address_to_resource(np, index, &res))
  787. return IOMEM_ERR_PTR(-EINVAL);
  788. if (!name)
  789. name = res.name;
  790. if (!request_mem_region(res.start, resource_size(&res), name))
  791. return IOMEM_ERR_PTR(-EBUSY);
  792. mem = ioremap(res.start, resource_size(&res));
  793. if (!mem) {
  794. release_mem_region(res.start, resource_size(&res));
  795. return IOMEM_ERR_PTR(-ENOMEM);
  796. }
  797. return mem;
  798. }
  799. EXPORT_SYMBOL(of_io_request_and_map);
  800. #ifdef CONFIG_HAS_DMA
  801. /**
  802. * of_dma_get_range - Get DMA range info and put it into a map array
  803. * @np: device node to get DMA range info
  804. * @map: dma range structure to return
  805. *
  806. * Look in bottom up direction for the first "dma-ranges" property
  807. * and parse it. Put the information into a DMA offset map array.
  808. *
  809. * dma-ranges format:
  810. * DMA addr (dma_addr) : naddr cells
  811. * CPU addr (phys_addr_t) : pna cells
  812. * size : nsize cells
  813. *
  814. * It returns -ENODEV if "dma-ranges" property was not found for this
  815. * device in the DT.
  816. */
  817. int of_dma_get_range(struct device_node *np, const struct bus_dma_region **map)
  818. {
  819. struct device_node *node = of_node_get(np);
  820. const __be32 *ranges = NULL;
  821. bool found_dma_ranges = false;
  822. struct of_range_parser parser;
  823. struct of_range range;
  824. struct bus_dma_region *r;
  825. int len, num_ranges = 0;
  826. int ret = 0;
  827. while (node) {
  828. ranges = of_get_property(node, "dma-ranges", &len);
  829. /* Ignore empty ranges, they imply no translation required */
  830. if (ranges && len > 0)
  831. break;
  832. /* Once we find 'dma-ranges', then a missing one is an error */
  833. if (found_dma_ranges && !ranges) {
  834. ret = -ENODEV;
  835. goto out;
  836. }
  837. found_dma_ranges = true;
  838. node = of_get_next_dma_parent(node);
  839. }
  840. if (!node || !ranges) {
  841. pr_debug("no dma-ranges found for node(%pOF)\n", np);
  842. ret = -ENODEV;
  843. goto out;
  844. }
  845. of_dma_range_parser_init(&parser, node);
  846. for_each_of_range(&parser, &range)
  847. num_ranges++;
  848. r = kcalloc(num_ranges + 1, sizeof(*r), GFP_KERNEL);
  849. if (!r) {
  850. ret = -ENOMEM;
  851. goto out;
  852. }
  853. /*
  854. * Record all info in the generic DMA ranges array for struct device.
  855. */
  856. *map = r;
  857. of_dma_range_parser_init(&parser, node);
  858. for_each_of_range(&parser, &range) {
  859. pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
  860. range.bus_addr, range.cpu_addr, range.size);
  861. if (range.cpu_addr == OF_BAD_ADDR) {
  862. pr_err("translation of DMA address(%llx) to CPU address failed node(%pOF)\n",
  863. range.bus_addr, node);
  864. continue;
  865. }
  866. r->cpu_start = range.cpu_addr;
  867. r->dma_start = range.bus_addr;
  868. r->size = range.size;
  869. r->offset = range.cpu_addr - range.bus_addr;
  870. r++;
  871. }
  872. out:
  873. of_node_put(node);
  874. return ret;
  875. }
  876. #endif /* CONFIG_HAS_DMA */
  877. /**
  878. * of_dma_get_max_cpu_address - Gets highest CPU address suitable for DMA
  879. * @np: The node to start searching from or NULL to start from the root
  880. *
  881. * Gets the highest CPU physical address that is addressable by all DMA masters
  882. * in the sub-tree pointed by np, or the whole tree if NULL is passed. If no
  883. * DMA constrained device is found, it returns PHYS_ADDR_MAX.
  884. */
  885. phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np)
  886. {
  887. phys_addr_t max_cpu_addr = PHYS_ADDR_MAX;
  888. struct of_range_parser parser;
  889. phys_addr_t subtree_max_addr;
  890. struct device_node *child;
  891. struct of_range range;
  892. const __be32 *ranges;
  893. u64 cpu_end = 0;
  894. int len;
  895. if (!np)
  896. np = of_root;
  897. ranges = of_get_property(np, "dma-ranges", &len);
  898. if (ranges && len) {
  899. of_dma_range_parser_init(&parser, np);
  900. for_each_of_range(&parser, &range)
  901. if (range.cpu_addr + range.size > cpu_end)
  902. cpu_end = range.cpu_addr + range.size - 1;
  903. if (max_cpu_addr > cpu_end)
  904. max_cpu_addr = cpu_end;
  905. }
  906. for_each_available_child_of_node(np, child) {
  907. subtree_max_addr = of_dma_get_max_cpu_address(child);
  908. if (max_cpu_addr > subtree_max_addr)
  909. max_cpu_addr = subtree_max_addr;
  910. }
  911. return max_cpu_addr;
  912. }
  913. /**
  914. * of_dma_is_coherent - Check if device is coherent
  915. * @np: device node
  916. *
  917. * It returns true if "dma-coherent" property was found
  918. * for this device in the DT, or if DMA is coherent by
  919. * default for OF devices on the current platform.
  920. */
  921. bool of_dma_is_coherent(struct device_node *np)
  922. {
  923. struct device_node *node;
  924. if (IS_ENABLED(CONFIG_OF_DMA_DEFAULT_COHERENT))
  925. return true;
  926. node = of_node_get(np);
  927. while (node) {
  928. if (of_property_read_bool(node, "dma-coherent")) {
  929. of_node_put(node);
  930. return true;
  931. }
  932. node = of_get_next_dma_parent(node);
  933. }
  934. of_node_put(node);
  935. return false;
  936. }
  937. EXPORT_SYMBOL_GPL(of_dma_is_coherent);