tmio_mmc.h 8.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Driver for the MMC / SD / SDIO cell found in:
  4. *
  5. * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
  6. *
  7. * Copyright (C) 2015-19 Renesas Electronics Corporation
  8. * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
  9. * Copyright (C) 2016-17 Horms Solutions, Simon Horman
  10. * Copyright (C) 2007 Ian Molton
  11. * Copyright (C) 2004 Ian Molton
  12. */
  13. #ifndef TMIO_MMC_H
  14. #define TMIO_MMC_H
  15. #include <linux/dmaengine.h>
  16. #include <linux/highmem.h>
  17. #include <linux/mutex.h>
  18. #include <linux/pagemap.h>
  19. #include <linux/scatterlist.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/interrupt.h>
  22. #define CTL_SD_CMD 0x00
  23. #define CTL_ARG_REG 0x04
  24. #define CTL_STOP_INTERNAL_ACTION 0x08
  25. #define CTL_XFER_BLK_COUNT 0xa
  26. #define CTL_RESPONSE 0x0c
  27. /* driver merges STATUS and following STATUS2 */
  28. #define CTL_STATUS 0x1c
  29. /* driver merges IRQ_MASK and following IRQ_MASK2 */
  30. #define CTL_IRQ_MASK 0x20
  31. #define CTL_SD_CARD_CLK_CTL 0x24
  32. #define CTL_SD_XFER_LEN 0x26
  33. #define CTL_SD_MEM_CARD_OPT 0x28
  34. #define CTL_SD_ERROR_DETAIL_STATUS 0x2c
  35. #define CTL_SD_DATA_PORT 0x30
  36. #define CTL_TRANSACTION_CTL 0x34
  37. #define CTL_SDIO_STATUS 0x36
  38. #define CTL_SDIO_IRQ_MASK 0x38
  39. #define CTL_DMA_ENABLE 0xd8
  40. #define CTL_RESET_SD 0xe0
  41. #define CTL_VERSION 0xe2
  42. #define CTL_SDIF_MODE 0xe6
  43. /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
  44. #define TMIO_STOP_STP BIT(0)
  45. #define TMIO_STOP_SEC BIT(8)
  46. /* Definitions for values the CTL_STATUS register can take */
  47. #define TMIO_STAT_CMDRESPEND BIT(0)
  48. #define TMIO_STAT_DATAEND BIT(2)
  49. #define TMIO_STAT_CARD_REMOVE BIT(3)
  50. #define TMIO_STAT_CARD_INSERT BIT(4)
  51. #define TMIO_STAT_SIGSTATE BIT(5)
  52. #define TMIO_STAT_WRPROTECT BIT(7)
  53. #define TMIO_STAT_CARD_REMOVE_A BIT(8)
  54. #define TMIO_STAT_CARD_INSERT_A BIT(9)
  55. #define TMIO_STAT_SIGSTATE_A BIT(10)
  56. /* These belong technically to CTL_STATUS2, but the driver merges them */
  57. #define TMIO_STAT_CMD_IDX_ERR BIT(16)
  58. #define TMIO_STAT_CRCFAIL BIT(17)
  59. #define TMIO_STAT_STOPBIT_ERR BIT(18)
  60. #define TMIO_STAT_DATATIMEOUT BIT(19)
  61. #define TMIO_STAT_RXOVERFLOW BIT(20)
  62. #define TMIO_STAT_TXUNDERRUN BIT(21)
  63. #define TMIO_STAT_CMDTIMEOUT BIT(22)
  64. #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */
  65. #define TMIO_STAT_RXRDY BIT(24)
  66. #define TMIO_STAT_TXRQ BIT(25)
  67. #define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car 2+ so far */
  68. #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
  69. #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
  70. #define TMIO_STAT_CMD_BUSY BIT(30)
  71. #define TMIO_STAT_ILL_ACCESS BIT(31)
  72. /* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */
  73. #define CLK_CTL_DIV_MASK 0xff
  74. #define CLK_CTL_SCLKEN BIT(8)
  75. /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
  76. #define CARD_OPT_WIDTH8 BIT(13)
  77. #define CARD_OPT_WIDTH BIT(15)
  78. /* Definitions for values the CTL_SDIO_STATUS register can take */
  79. #define TMIO_SDIO_STAT_IOIRQ 0x0001
  80. #define TMIO_SDIO_STAT_EXPUB52 0x4000
  81. #define TMIO_SDIO_STAT_EXWT 0x8000
  82. #define TMIO_SDIO_MASK_ALL 0xc007
  83. #define TMIO_SDIO_SETBITS_MASK 0x0006
  84. /* Definitions for values the CTL_DMA_ENABLE register can take */
  85. #define DMA_ENABLE_DMASDRW BIT(1)
  86. /* Define some IRQ masks */
  87. /* This is the mask used at reset by the chip */
  88. #define TMIO_MASK_INIT_RCAR2 0x8b7f031d /* Initial value for R-Car Gen2+ */
  89. #define TMIO_MASK_ALL 0x837f031d
  90. #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
  91. #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
  92. #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
  93. TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
  94. #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
  95. #define TMIO_MAX_BLK_SIZE 512
  96. struct tmio_mmc_data;
  97. struct tmio_mmc_host;
  98. struct tmio_mmc_dma_ops {
  99. void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
  100. void (*enable)(struct tmio_mmc_host *host, bool enable);
  101. void (*request)(struct tmio_mmc_host *host,
  102. struct tmio_mmc_data *pdata);
  103. void (*release)(struct tmio_mmc_host *host);
  104. void (*abort)(struct tmio_mmc_host *host);
  105. void (*dataend)(struct tmio_mmc_host *host);
  106. /* optional */
  107. void (*end)(struct tmio_mmc_host *host); /* held host->lock */
  108. };
  109. struct tmio_mmc_host {
  110. void __iomem *ctl;
  111. struct mmc_command *cmd;
  112. struct mmc_request *mrq;
  113. struct mmc_data *data;
  114. struct mmc_host *mmc;
  115. struct mmc_host_ops ops;
  116. /* Callbacks for clock / power control */
  117. void (*set_pwr)(struct platform_device *host, int state);
  118. /* pio related stuff */
  119. struct scatterlist *sg_ptr;
  120. struct scatterlist *sg_orig;
  121. unsigned int sg_len;
  122. unsigned int sg_off;
  123. unsigned int bus_shift;
  124. struct platform_device *pdev;
  125. struct tmio_mmc_data *pdata;
  126. /* DMA support */
  127. bool dma_on;
  128. struct dma_chan *chan_rx;
  129. struct dma_chan *chan_tx;
  130. struct tasklet_struct dma_issue;
  131. struct scatterlist bounce_sg;
  132. u8 *bounce_buf;
  133. /* Track lost interrupts */
  134. struct delayed_work delayed_reset_work;
  135. struct work_struct done;
  136. /* Cache */
  137. u32 sdcard_irq_mask;
  138. u32 sdio_irq_mask;
  139. unsigned int clk_cache;
  140. u32 sdcard_irq_setbit_mask;
  141. spinlock_t lock; /* protect host private data */
  142. unsigned long last_req_ts;
  143. struct mutex ios_lock; /* protect set_ios() context */
  144. bool native_hotplug;
  145. bool sdio_irq_enabled;
  146. /* Mandatory callback */
  147. int (*clk_enable)(struct tmio_mmc_host *host);
  148. void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock);
  149. /* Optional callbacks */
  150. void (*clk_disable)(struct tmio_mmc_host *host);
  151. int (*multi_io_quirk)(struct mmc_card *card,
  152. unsigned int direction, int blk_size);
  153. int (*write16_hook)(struct tmio_mmc_host *host, int addr);
  154. void (*reset)(struct tmio_mmc_host *host);
  155. bool (*check_retune)(struct tmio_mmc_host *host);
  156. void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq);
  157. void (*prepare_hs400_tuning)(struct tmio_mmc_host *host);
  158. void (*hs400_downgrade)(struct tmio_mmc_host *host);
  159. void (*hs400_complete)(struct tmio_mmc_host *host);
  160. const struct tmio_mmc_dma_ops *dma_ops;
  161. };
  162. struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
  163. struct tmio_mmc_data *pdata);
  164. void tmio_mmc_host_free(struct tmio_mmc_host *host);
  165. int tmio_mmc_host_probe(struct tmio_mmc_host *host);
  166. void tmio_mmc_host_remove(struct tmio_mmc_host *host);
  167. void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
  168. void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
  169. void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
  170. irqreturn_t tmio_mmc_irq(int irq, void *devid);
  171. static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
  172. unsigned long *flags)
  173. {
  174. local_irq_save(*flags);
  175. return kmap_atomic(sg_page(sg)) + sg->offset;
  176. }
  177. static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
  178. unsigned long *flags, void *virt)
  179. {
  180. kunmap_atomic(virt - sg->offset);
  181. local_irq_restore(*flags);
  182. }
  183. #ifdef CONFIG_PM
  184. int tmio_mmc_host_runtime_suspend(struct device *dev);
  185. int tmio_mmc_host_runtime_resume(struct device *dev);
  186. #endif
  187. static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
  188. {
  189. return ioread16(host->ctl + (addr << host->bus_shift));
  190. }
  191. static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
  192. u16 *buf, int count)
  193. {
  194. ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count);
  195. }
  196. static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
  197. int addr)
  198. {
  199. return ioread16(host->ctl + (addr << host->bus_shift)) |
  200. ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
  201. }
  202. static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
  203. u32 *buf, int count)
  204. {
  205. ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count);
  206. }
  207. static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
  208. u16 val)
  209. {
  210. /* If there is a hook and it returns non-zero then there
  211. * is an error and the write should be skipped
  212. */
  213. if (host->write16_hook && host->write16_hook(host, addr))
  214. return;
  215. iowrite16(val, host->ctl + (addr << host->bus_shift));
  216. }
  217. static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
  218. u16 *buf, int count)
  219. {
  220. iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count);
  221. }
  222. static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
  223. int addr, u32 val)
  224. {
  225. if (addr == CTL_IRQ_MASK || addr == CTL_STATUS)
  226. val |= host->sdcard_irq_setbit_mask;
  227. iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
  228. iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
  229. }
  230. static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val)
  231. {
  232. iowrite32(val, host->ctl + (addr << host->bus_shift));
  233. }
  234. static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
  235. const u32 *buf, int count)
  236. {
  237. iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count);
  238. }
  239. #endif