rtsx_pcr.h 4.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /* Driver for Realtek PCI-Express card reader
  3. *
  4. * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  5. *
  6. * Author:
  7. * Wei WANG <wei_wang@realsil.com.cn>
  8. */
  9. #ifndef __RTSX_PCR_H
  10. #define __RTSX_PCR_H
  11. #include <linux/rtsx_pci.h>
  12. #define MIN_DIV_N_PCR 80
  13. #define MAX_DIV_N_PCR 208
  14. #define RTS522A_PM_CTRL3 0xFF7E
  15. #define RTS524A_PME_FORCE_CTL 0xFF78
  16. #define REG_EFUSE_BYPASS 0x08
  17. #define REG_EFUSE_POR 0x04
  18. #define REG_EFUSE_POWER_MASK 0x03
  19. #define REG_EFUSE_POWERON 0x03
  20. #define REG_EFUSE_POWEROFF 0x00
  21. #define RTS5250_CLK_CFG3 0xFF79
  22. #define RTS525A_CFG_MEM_PD 0xF0
  23. #define RTS524A_PM_CTRL3 0xFF7E
  24. #define RTS525A_BIOS_CFG 0xFF2D
  25. #define RTS525A_LOAD_BIOS_FLAG 0x01
  26. #define RTS525A_CLEAR_BIOS_FLAG 0x00
  27. #define RTS525A_EFUSE_CTL 0xFC32
  28. #define REG_EFUSE_ENABLE 0x80
  29. #define REG_EFUSE_MODE 0x40
  30. #define RTS525A_EFUSE_ADD 0xFC33
  31. #define REG_EFUSE_ADD_MASK 0x3F
  32. #define RTS525A_EFUSE_DATA 0xFC35
  33. #define LTR_ACTIVE_LATENCY_DEF 0x883C
  34. #define LTR_IDLE_LATENCY_DEF 0x892C
  35. #define LTR_L1OFF_LATENCY_DEF 0x9003
  36. #define L1_SNOOZE_DELAY_DEF 1
  37. #define LTR_L1OFF_SSPWRGATE_5249_DEF 0xAF
  38. #define LTR_L1OFF_SSPWRGATE_5250_DEF 0xFF
  39. #define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF 0xAC
  40. #define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF 0xF8
  41. #define CMD_TIMEOUT_DEF 100
  42. #define MASK_8_BIT_DEF 0xFF
  43. #define SSC_CLOCK_STABLE_WAIT 130
  44. #define RTS524A_OCP_THD_800 0x04
  45. #define RTS525A_OCP_THD_800 0x05
  46. #define RTS522A_OCP_THD_800 0x06
  47. int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
  48. int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
  49. void rts5209_init_params(struct rtsx_pcr *pcr);
  50. void rts5229_init_params(struct rtsx_pcr *pcr);
  51. void rtl8411_init_params(struct rtsx_pcr *pcr);
  52. void rtl8402_init_params(struct rtsx_pcr *pcr);
  53. void rts5227_init_params(struct rtsx_pcr *pcr);
  54. void rts522a_init_params(struct rtsx_pcr *pcr);
  55. void rts5249_init_params(struct rtsx_pcr *pcr);
  56. void rts524a_init_params(struct rtsx_pcr *pcr);
  57. void rts525a_init_params(struct rtsx_pcr *pcr);
  58. void rtl8411b_init_params(struct rtsx_pcr *pcr);
  59. void rts5260_init_params(struct rtsx_pcr *pcr);
  60. void rts5261_init_params(struct rtsx_pcr *pcr);
  61. void rts5228_init_params(struct rtsx_pcr *pcr);
  62. static inline u8 map_sd_drive(int idx)
  63. {
  64. u8 sd_drive[4] = {
  65. 0x01, /* Type D */
  66. 0x02, /* Type C */
  67. 0x05, /* Type A */
  68. 0x03 /* Type B */
  69. };
  70. return sd_drive[idx];
  71. }
  72. #define rtsx_vendor_setting_valid(reg) (!((reg) & 0x1000000))
  73. #define rts5209_vendor_setting1_valid(reg) (!((reg) & 0x80))
  74. #define rts5209_vendor_setting2_valid(reg) ((reg) & 0x80)
  75. #define rtsx_check_mmc_support(reg) ((reg) & 0x10)
  76. #define rtsx_reg_to_rtd3(reg) ((reg) & 0x02)
  77. #define rtsx_reg_to_aspm(reg) (((reg) >> 28) & 0x03)
  78. #define rtsx_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 26) & 0x03)
  79. #define rtsx_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x03)
  80. #define rtsx_reg_to_card_drive_sel(reg) ((((reg) >> 25) & 0x01) << 6)
  81. #define rtsx_reg_check_reverse_socket(reg) ((reg) & 0x4000)
  82. #define rts5209_reg_to_aspm(reg) (((reg) >> 5) & 0x03)
  83. #define rts5209_reg_check_ms_pmos(reg) (!((reg) & 0x08))
  84. #define rts5209_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 3) & 0x07)
  85. #define rts5209_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x07)
  86. #define rts5209_reg_to_card_drive_sel(reg) ((reg) >> 8)
  87. #define rtl8411_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x07)
  88. #define rtl8411b_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x03)
  89. #define set_pull_ctrl_tables(pcr, __device) \
  90. do { \
  91. pcr->sd_pull_ctl_enable_tbl = __device##_sd_pull_ctl_enable_tbl; \
  92. pcr->sd_pull_ctl_disable_tbl = __device##_sd_pull_ctl_disable_tbl; \
  93. pcr->ms_pull_ctl_enable_tbl = __device##_ms_pull_ctl_enable_tbl; \
  94. pcr->ms_pull_ctl_disable_tbl = __device##_ms_pull_ctl_disable_tbl; \
  95. } while (0)
  96. /* generic operations */
  97. int rtsx_gops_pm_reset(struct rtsx_pcr *pcr);
  98. int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency);
  99. int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val);
  100. void rtsx_pci_init_ocp(struct rtsx_pcr *pcr);
  101. void rtsx_pci_disable_ocp(struct rtsx_pcr *pcr);
  102. void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr);
  103. int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val);
  104. void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr);
  105. void rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr);
  106. void rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr);
  107. int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr);
  108. int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr);
  109. #endif