core.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Silicon Labs C2 port core Linux support
  4. *
  5. * Copyright (c) 2007 Rodolfo Giometti <giometti@linux.it>
  6. * Copyright (c) 2007 Eurotech S.p.A. <info@eurotech.it>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/init.h>
  10. #include <linux/device.h>
  11. #include <linux/errno.h>
  12. #include <linux/err.h>
  13. #include <linux/kernel.h>
  14. #include <linux/ctype.h>
  15. #include <linux/delay.h>
  16. #include <linux/idr.h>
  17. #include <linux/sched.h>
  18. #include <linux/slab.h>
  19. #include <linux/c2port.h>
  20. #define DRIVER_NAME "c2port"
  21. #define DRIVER_VERSION "0.51.0"
  22. static DEFINE_SPINLOCK(c2port_idr_lock);
  23. static DEFINE_IDR(c2port_idr);
  24. /*
  25. * Local variables
  26. */
  27. static struct class *c2port_class;
  28. /*
  29. * C2 registers & commands defines
  30. */
  31. /* C2 registers */
  32. #define C2PORT_DEVICEID 0x00
  33. #define C2PORT_REVID 0x01
  34. #define C2PORT_FPCTL 0x02
  35. #define C2PORT_FPDAT 0xB4
  36. /* C2 interface commands */
  37. #define C2PORT_GET_VERSION 0x01
  38. #define C2PORT_DEVICE_ERASE 0x03
  39. #define C2PORT_BLOCK_READ 0x06
  40. #define C2PORT_BLOCK_WRITE 0x07
  41. #define C2PORT_PAGE_ERASE 0x08
  42. /* C2 status return codes */
  43. #define C2PORT_INVALID_COMMAND 0x00
  44. #define C2PORT_COMMAND_FAILED 0x02
  45. #define C2PORT_COMMAND_OK 0x0d
  46. /*
  47. * C2 port low level signal managements
  48. */
  49. static void c2port_reset(struct c2port_device *dev)
  50. {
  51. struct c2port_ops *ops = dev->ops;
  52. /* To reset the device we have to keep clock line low for at least
  53. * 20us.
  54. */
  55. local_irq_disable();
  56. ops->c2ck_set(dev, 0);
  57. udelay(25);
  58. ops->c2ck_set(dev, 1);
  59. local_irq_enable();
  60. udelay(1);
  61. }
  62. static void c2port_strobe_ck(struct c2port_device *dev)
  63. {
  64. struct c2port_ops *ops = dev->ops;
  65. /* During hi-low-hi transition we disable local IRQs to avoid
  66. * interructions since C2 port specification says that it must be
  67. * shorter than 5us, otherwise the microcontroller may consider
  68. * it as a reset signal!
  69. */
  70. local_irq_disable();
  71. ops->c2ck_set(dev, 0);
  72. udelay(1);
  73. ops->c2ck_set(dev, 1);
  74. local_irq_enable();
  75. udelay(1);
  76. }
  77. /*
  78. * C2 port basic functions
  79. */
  80. static void c2port_write_ar(struct c2port_device *dev, u8 addr)
  81. {
  82. struct c2port_ops *ops = dev->ops;
  83. int i;
  84. /* START field */
  85. c2port_strobe_ck(dev);
  86. /* INS field (11b, LSB first) */
  87. ops->c2d_dir(dev, 0);
  88. ops->c2d_set(dev, 1);
  89. c2port_strobe_ck(dev);
  90. ops->c2d_set(dev, 1);
  91. c2port_strobe_ck(dev);
  92. /* ADDRESS field */
  93. for (i = 0; i < 8; i++) {
  94. ops->c2d_set(dev, addr & 0x01);
  95. c2port_strobe_ck(dev);
  96. addr >>= 1;
  97. }
  98. /* STOP field */
  99. ops->c2d_dir(dev, 1);
  100. c2port_strobe_ck(dev);
  101. }
  102. static int c2port_read_ar(struct c2port_device *dev, u8 *addr)
  103. {
  104. struct c2port_ops *ops = dev->ops;
  105. int i;
  106. /* START field */
  107. c2port_strobe_ck(dev);
  108. /* INS field (10b, LSB first) */
  109. ops->c2d_dir(dev, 0);
  110. ops->c2d_set(dev, 0);
  111. c2port_strobe_ck(dev);
  112. ops->c2d_set(dev, 1);
  113. c2port_strobe_ck(dev);
  114. /* ADDRESS field */
  115. ops->c2d_dir(dev, 1);
  116. *addr = 0;
  117. for (i = 0; i < 8; i++) {
  118. *addr >>= 1; /* shift in 8-bit ADDRESS field LSB first */
  119. c2port_strobe_ck(dev);
  120. if (ops->c2d_get(dev))
  121. *addr |= 0x80;
  122. }
  123. /* STOP field */
  124. c2port_strobe_ck(dev);
  125. return 0;
  126. }
  127. static int c2port_write_dr(struct c2port_device *dev, u8 data)
  128. {
  129. struct c2port_ops *ops = dev->ops;
  130. int timeout, i;
  131. /* START field */
  132. c2port_strobe_ck(dev);
  133. /* INS field (01b, LSB first) */
  134. ops->c2d_dir(dev, 0);
  135. ops->c2d_set(dev, 1);
  136. c2port_strobe_ck(dev);
  137. ops->c2d_set(dev, 0);
  138. c2port_strobe_ck(dev);
  139. /* LENGTH field (00b, LSB first -> 1 byte) */
  140. ops->c2d_set(dev, 0);
  141. c2port_strobe_ck(dev);
  142. ops->c2d_set(dev, 0);
  143. c2port_strobe_ck(dev);
  144. /* DATA field */
  145. for (i = 0; i < 8; i++) {
  146. ops->c2d_set(dev, data & 0x01);
  147. c2port_strobe_ck(dev);
  148. data >>= 1;
  149. }
  150. /* WAIT field */
  151. ops->c2d_dir(dev, 1);
  152. timeout = 20;
  153. do {
  154. c2port_strobe_ck(dev);
  155. if (ops->c2d_get(dev))
  156. break;
  157. udelay(1);
  158. } while (--timeout > 0);
  159. if (timeout == 0)
  160. return -EIO;
  161. /* STOP field */
  162. c2port_strobe_ck(dev);
  163. return 0;
  164. }
  165. static int c2port_read_dr(struct c2port_device *dev, u8 *data)
  166. {
  167. struct c2port_ops *ops = dev->ops;
  168. int timeout, i;
  169. /* START field */
  170. c2port_strobe_ck(dev);
  171. /* INS field (00b, LSB first) */
  172. ops->c2d_dir(dev, 0);
  173. ops->c2d_set(dev, 0);
  174. c2port_strobe_ck(dev);
  175. ops->c2d_set(dev, 0);
  176. c2port_strobe_ck(dev);
  177. /* LENGTH field (00b, LSB first -> 1 byte) */
  178. ops->c2d_set(dev, 0);
  179. c2port_strobe_ck(dev);
  180. ops->c2d_set(dev, 0);
  181. c2port_strobe_ck(dev);
  182. /* WAIT field */
  183. ops->c2d_dir(dev, 1);
  184. timeout = 20;
  185. do {
  186. c2port_strobe_ck(dev);
  187. if (ops->c2d_get(dev))
  188. break;
  189. udelay(1);
  190. } while (--timeout > 0);
  191. if (timeout == 0)
  192. return -EIO;
  193. /* DATA field */
  194. *data = 0;
  195. for (i = 0; i < 8; i++) {
  196. *data >>= 1; /* shift in 8-bit DATA field LSB first */
  197. c2port_strobe_ck(dev);
  198. if (ops->c2d_get(dev))
  199. *data |= 0x80;
  200. }
  201. /* STOP field */
  202. c2port_strobe_ck(dev);
  203. return 0;
  204. }
  205. static int c2port_poll_in_busy(struct c2port_device *dev)
  206. {
  207. u8 addr;
  208. int ret, timeout = 20;
  209. do {
  210. ret = (c2port_read_ar(dev, &addr));
  211. if (ret < 0)
  212. return -EIO;
  213. if (!(addr & 0x02))
  214. break;
  215. udelay(1);
  216. } while (--timeout > 0);
  217. if (timeout == 0)
  218. return -EIO;
  219. return 0;
  220. }
  221. static int c2port_poll_out_ready(struct c2port_device *dev)
  222. {
  223. u8 addr;
  224. int ret, timeout = 10000; /* erase flash needs long time... */
  225. do {
  226. ret = (c2port_read_ar(dev, &addr));
  227. if (ret < 0)
  228. return -EIO;
  229. if (addr & 0x01)
  230. break;
  231. udelay(1);
  232. } while (--timeout > 0);
  233. if (timeout == 0)
  234. return -EIO;
  235. return 0;
  236. }
  237. /*
  238. * sysfs methods
  239. */
  240. static ssize_t c2port_show_name(struct device *dev,
  241. struct device_attribute *attr, char *buf)
  242. {
  243. struct c2port_device *c2dev = dev_get_drvdata(dev);
  244. return sprintf(buf, "%s\n", c2dev->name);
  245. }
  246. static DEVICE_ATTR(name, 0444, c2port_show_name, NULL);
  247. static ssize_t c2port_show_flash_blocks_num(struct device *dev,
  248. struct device_attribute *attr, char *buf)
  249. {
  250. struct c2port_device *c2dev = dev_get_drvdata(dev);
  251. struct c2port_ops *ops = c2dev->ops;
  252. return sprintf(buf, "%d\n", ops->blocks_num);
  253. }
  254. static DEVICE_ATTR(flash_blocks_num, 0444, c2port_show_flash_blocks_num, NULL);
  255. static ssize_t c2port_show_flash_block_size(struct device *dev,
  256. struct device_attribute *attr, char *buf)
  257. {
  258. struct c2port_device *c2dev = dev_get_drvdata(dev);
  259. struct c2port_ops *ops = c2dev->ops;
  260. return sprintf(buf, "%d\n", ops->block_size);
  261. }
  262. static DEVICE_ATTR(flash_block_size, 0444, c2port_show_flash_block_size, NULL);
  263. static ssize_t c2port_show_flash_size(struct device *dev,
  264. struct device_attribute *attr, char *buf)
  265. {
  266. struct c2port_device *c2dev = dev_get_drvdata(dev);
  267. struct c2port_ops *ops = c2dev->ops;
  268. return sprintf(buf, "%d\n", ops->blocks_num * ops->block_size);
  269. }
  270. static DEVICE_ATTR(flash_size, 0444, c2port_show_flash_size, NULL);
  271. static ssize_t access_show(struct device *dev, struct device_attribute *attr,
  272. char *buf)
  273. {
  274. struct c2port_device *c2dev = dev_get_drvdata(dev);
  275. return sprintf(buf, "%d\n", c2dev->access);
  276. }
  277. static ssize_t access_store(struct device *dev, struct device_attribute *attr,
  278. const char *buf, size_t count)
  279. {
  280. struct c2port_device *c2dev = dev_get_drvdata(dev);
  281. struct c2port_ops *ops = c2dev->ops;
  282. int status, ret;
  283. ret = sscanf(buf, "%d", &status);
  284. if (ret != 1)
  285. return -EINVAL;
  286. mutex_lock(&c2dev->mutex);
  287. c2dev->access = !!status;
  288. /* If access is "on" clock should be HIGH _before_ setting the line
  289. * as output and data line should be set as INPUT anyway */
  290. if (c2dev->access)
  291. ops->c2ck_set(c2dev, 1);
  292. ops->access(c2dev, c2dev->access);
  293. if (c2dev->access)
  294. ops->c2d_dir(c2dev, 1);
  295. mutex_unlock(&c2dev->mutex);
  296. return count;
  297. }
  298. static DEVICE_ATTR_RW(access);
  299. static ssize_t c2port_store_reset(struct device *dev,
  300. struct device_attribute *attr,
  301. const char *buf, size_t count)
  302. {
  303. struct c2port_device *c2dev = dev_get_drvdata(dev);
  304. /* Check the device access status */
  305. if (!c2dev->access)
  306. return -EBUSY;
  307. mutex_lock(&c2dev->mutex);
  308. c2port_reset(c2dev);
  309. c2dev->flash_access = 0;
  310. mutex_unlock(&c2dev->mutex);
  311. return count;
  312. }
  313. static DEVICE_ATTR(reset, 0200, NULL, c2port_store_reset);
  314. static ssize_t __c2port_show_dev_id(struct c2port_device *dev, char *buf)
  315. {
  316. u8 data;
  317. int ret;
  318. /* Select DEVICEID register for C2 data register accesses */
  319. c2port_write_ar(dev, C2PORT_DEVICEID);
  320. /* Read and return the device ID register */
  321. ret = c2port_read_dr(dev, &data);
  322. if (ret < 0)
  323. return ret;
  324. return sprintf(buf, "%d\n", data);
  325. }
  326. static ssize_t c2port_show_dev_id(struct device *dev,
  327. struct device_attribute *attr, char *buf)
  328. {
  329. struct c2port_device *c2dev = dev_get_drvdata(dev);
  330. ssize_t ret;
  331. /* Check the device access status */
  332. if (!c2dev->access)
  333. return -EBUSY;
  334. mutex_lock(&c2dev->mutex);
  335. ret = __c2port_show_dev_id(c2dev, buf);
  336. mutex_unlock(&c2dev->mutex);
  337. if (ret < 0)
  338. dev_err(dev, "cannot read from %s\n", c2dev->name);
  339. return ret;
  340. }
  341. static DEVICE_ATTR(dev_id, 0444, c2port_show_dev_id, NULL);
  342. static ssize_t __c2port_show_rev_id(struct c2port_device *dev, char *buf)
  343. {
  344. u8 data;
  345. int ret;
  346. /* Select REVID register for C2 data register accesses */
  347. c2port_write_ar(dev, C2PORT_REVID);
  348. /* Read and return the revision ID register */
  349. ret = c2port_read_dr(dev, &data);
  350. if (ret < 0)
  351. return ret;
  352. return sprintf(buf, "%d\n", data);
  353. }
  354. static ssize_t c2port_show_rev_id(struct device *dev,
  355. struct device_attribute *attr, char *buf)
  356. {
  357. struct c2port_device *c2dev = dev_get_drvdata(dev);
  358. ssize_t ret;
  359. /* Check the device access status */
  360. if (!c2dev->access)
  361. return -EBUSY;
  362. mutex_lock(&c2dev->mutex);
  363. ret = __c2port_show_rev_id(c2dev, buf);
  364. mutex_unlock(&c2dev->mutex);
  365. if (ret < 0)
  366. dev_err(c2dev->dev, "cannot read from %s\n", c2dev->name);
  367. return ret;
  368. }
  369. static DEVICE_ATTR(rev_id, 0444, c2port_show_rev_id, NULL);
  370. static ssize_t c2port_show_flash_access(struct device *dev,
  371. struct device_attribute *attr, char *buf)
  372. {
  373. struct c2port_device *c2dev = dev_get_drvdata(dev);
  374. return sprintf(buf, "%d\n", c2dev->flash_access);
  375. }
  376. static ssize_t __c2port_store_flash_access(struct c2port_device *dev,
  377. int status)
  378. {
  379. int ret;
  380. /* Check the device access status */
  381. if (!dev->access)
  382. return -EBUSY;
  383. dev->flash_access = !!status;
  384. /* If flash_access is off we have nothing to do... */
  385. if (dev->flash_access == 0)
  386. return 0;
  387. /* Target the C2 flash programming control register for C2 data
  388. * register access */
  389. c2port_write_ar(dev, C2PORT_FPCTL);
  390. /* Write the first keycode to enable C2 Flash programming */
  391. ret = c2port_write_dr(dev, 0x02);
  392. if (ret < 0)
  393. return ret;
  394. /* Write the second keycode to enable C2 Flash programming */
  395. ret = c2port_write_dr(dev, 0x01);
  396. if (ret < 0)
  397. return ret;
  398. /* Delay for at least 20ms to ensure the target is ready for
  399. * C2 flash programming */
  400. mdelay(25);
  401. return 0;
  402. }
  403. static ssize_t c2port_store_flash_access(struct device *dev,
  404. struct device_attribute *attr,
  405. const char *buf, size_t count)
  406. {
  407. struct c2port_device *c2dev = dev_get_drvdata(dev);
  408. int status;
  409. ssize_t ret;
  410. ret = sscanf(buf, "%d", &status);
  411. if (ret != 1)
  412. return -EINVAL;
  413. mutex_lock(&c2dev->mutex);
  414. ret = __c2port_store_flash_access(c2dev, status);
  415. mutex_unlock(&c2dev->mutex);
  416. if (ret < 0) {
  417. dev_err(c2dev->dev, "cannot enable %s flash programming\n",
  418. c2dev->name);
  419. return ret;
  420. }
  421. return count;
  422. }
  423. static DEVICE_ATTR(flash_access, 0644, c2port_show_flash_access,
  424. c2port_store_flash_access);
  425. static ssize_t __c2port_write_flash_erase(struct c2port_device *dev)
  426. {
  427. u8 status;
  428. int ret;
  429. /* Target the C2 flash programming data register for C2 data register
  430. * access.
  431. */
  432. c2port_write_ar(dev, C2PORT_FPDAT);
  433. /* Send device erase command */
  434. c2port_write_dr(dev, C2PORT_DEVICE_ERASE);
  435. /* Wait for input acknowledge */
  436. ret = c2port_poll_in_busy(dev);
  437. if (ret < 0)
  438. return ret;
  439. /* Should check status before starting FLASH access sequence */
  440. /* Wait for status information */
  441. ret = c2port_poll_out_ready(dev);
  442. if (ret < 0)
  443. return ret;
  444. /* Read flash programming interface status */
  445. ret = c2port_read_dr(dev, &status);
  446. if (ret < 0)
  447. return ret;
  448. if (status != C2PORT_COMMAND_OK)
  449. return -EBUSY;
  450. /* Send a three-byte arming sequence to enable the device erase.
  451. * If the sequence is not received correctly, the command will be
  452. * ignored.
  453. * Sequence is: 0xde, 0xad, 0xa5.
  454. */
  455. c2port_write_dr(dev, 0xde);
  456. ret = c2port_poll_in_busy(dev);
  457. if (ret < 0)
  458. return ret;
  459. c2port_write_dr(dev, 0xad);
  460. ret = c2port_poll_in_busy(dev);
  461. if (ret < 0)
  462. return ret;
  463. c2port_write_dr(dev, 0xa5);
  464. ret = c2port_poll_in_busy(dev);
  465. if (ret < 0)
  466. return ret;
  467. ret = c2port_poll_out_ready(dev);
  468. if (ret < 0)
  469. return ret;
  470. return 0;
  471. }
  472. static ssize_t c2port_store_flash_erase(struct device *dev,
  473. struct device_attribute *attr,
  474. const char *buf, size_t count)
  475. {
  476. struct c2port_device *c2dev = dev_get_drvdata(dev);
  477. int ret;
  478. /* Check the device and flash access status */
  479. if (!c2dev->access || !c2dev->flash_access)
  480. return -EBUSY;
  481. mutex_lock(&c2dev->mutex);
  482. ret = __c2port_write_flash_erase(c2dev);
  483. mutex_unlock(&c2dev->mutex);
  484. if (ret < 0) {
  485. dev_err(c2dev->dev, "cannot erase %s flash\n", c2dev->name);
  486. return ret;
  487. }
  488. return count;
  489. }
  490. static DEVICE_ATTR(flash_erase, 0200, NULL, c2port_store_flash_erase);
  491. static ssize_t __c2port_read_flash_data(struct c2port_device *dev,
  492. char *buffer, loff_t offset, size_t count)
  493. {
  494. struct c2port_ops *ops = dev->ops;
  495. u8 status, nread = 128;
  496. int i, ret;
  497. /* Check for flash end */
  498. if (offset >= ops->block_size * ops->blocks_num)
  499. return 0;
  500. if (ops->block_size * ops->blocks_num - offset < nread)
  501. nread = ops->block_size * ops->blocks_num - offset;
  502. if (count < nread)
  503. nread = count;
  504. if (nread == 0)
  505. return nread;
  506. /* Target the C2 flash programming data register for C2 data register
  507. * access */
  508. c2port_write_ar(dev, C2PORT_FPDAT);
  509. /* Send flash block read command */
  510. c2port_write_dr(dev, C2PORT_BLOCK_READ);
  511. /* Wait for input acknowledge */
  512. ret = c2port_poll_in_busy(dev);
  513. if (ret < 0)
  514. return ret;
  515. /* Should check status before starting FLASH access sequence */
  516. /* Wait for status information */
  517. ret = c2port_poll_out_ready(dev);
  518. if (ret < 0)
  519. return ret;
  520. /* Read flash programming interface status */
  521. ret = c2port_read_dr(dev, &status);
  522. if (ret < 0)
  523. return ret;
  524. if (status != C2PORT_COMMAND_OK)
  525. return -EBUSY;
  526. /* Send address high byte */
  527. c2port_write_dr(dev, offset >> 8);
  528. ret = c2port_poll_in_busy(dev);
  529. if (ret < 0)
  530. return ret;
  531. /* Send address low byte */
  532. c2port_write_dr(dev, offset & 0x00ff);
  533. ret = c2port_poll_in_busy(dev);
  534. if (ret < 0)
  535. return ret;
  536. /* Send address block size */
  537. c2port_write_dr(dev, nread);
  538. ret = c2port_poll_in_busy(dev);
  539. if (ret < 0)
  540. return ret;
  541. /* Should check status before reading FLASH block */
  542. /* Wait for status information */
  543. ret = c2port_poll_out_ready(dev);
  544. if (ret < 0)
  545. return ret;
  546. /* Read flash programming interface status */
  547. ret = c2port_read_dr(dev, &status);
  548. if (ret < 0)
  549. return ret;
  550. if (status != C2PORT_COMMAND_OK)
  551. return -EBUSY;
  552. /* Read flash block */
  553. for (i = 0; i < nread; i++) {
  554. ret = c2port_poll_out_ready(dev);
  555. if (ret < 0)
  556. return ret;
  557. ret = c2port_read_dr(dev, buffer+i);
  558. if (ret < 0)
  559. return ret;
  560. }
  561. return nread;
  562. }
  563. static ssize_t c2port_read_flash_data(struct file *filp, struct kobject *kobj,
  564. struct bin_attribute *attr,
  565. char *buffer, loff_t offset, size_t count)
  566. {
  567. struct c2port_device *c2dev = dev_get_drvdata(kobj_to_dev(kobj));
  568. ssize_t ret;
  569. /* Check the device and flash access status */
  570. if (!c2dev->access || !c2dev->flash_access)
  571. return -EBUSY;
  572. mutex_lock(&c2dev->mutex);
  573. ret = __c2port_read_flash_data(c2dev, buffer, offset, count);
  574. mutex_unlock(&c2dev->mutex);
  575. if (ret < 0)
  576. dev_err(c2dev->dev, "cannot read %s flash\n", c2dev->name);
  577. return ret;
  578. }
  579. static ssize_t __c2port_write_flash_data(struct c2port_device *dev,
  580. char *buffer, loff_t offset, size_t count)
  581. {
  582. struct c2port_ops *ops = dev->ops;
  583. u8 status, nwrite = 128;
  584. int i, ret;
  585. if (nwrite > count)
  586. nwrite = count;
  587. if (ops->block_size * ops->blocks_num - offset < nwrite)
  588. nwrite = ops->block_size * ops->blocks_num - offset;
  589. /* Check for flash end */
  590. if (offset >= ops->block_size * ops->blocks_num)
  591. return -EINVAL;
  592. /* Target the C2 flash programming data register for C2 data register
  593. * access */
  594. c2port_write_ar(dev, C2PORT_FPDAT);
  595. /* Send flash block write command */
  596. c2port_write_dr(dev, C2PORT_BLOCK_WRITE);
  597. /* Wait for input acknowledge */
  598. ret = c2port_poll_in_busy(dev);
  599. if (ret < 0)
  600. return ret;
  601. /* Should check status before starting FLASH access sequence */
  602. /* Wait for status information */
  603. ret = c2port_poll_out_ready(dev);
  604. if (ret < 0)
  605. return ret;
  606. /* Read flash programming interface status */
  607. ret = c2port_read_dr(dev, &status);
  608. if (ret < 0)
  609. return ret;
  610. if (status != C2PORT_COMMAND_OK)
  611. return -EBUSY;
  612. /* Send address high byte */
  613. c2port_write_dr(dev, offset >> 8);
  614. ret = c2port_poll_in_busy(dev);
  615. if (ret < 0)
  616. return ret;
  617. /* Send address low byte */
  618. c2port_write_dr(dev, offset & 0x00ff);
  619. ret = c2port_poll_in_busy(dev);
  620. if (ret < 0)
  621. return ret;
  622. /* Send address block size */
  623. c2port_write_dr(dev, nwrite);
  624. ret = c2port_poll_in_busy(dev);
  625. if (ret < 0)
  626. return ret;
  627. /* Should check status before writing FLASH block */
  628. /* Wait for status information */
  629. ret = c2port_poll_out_ready(dev);
  630. if (ret < 0)
  631. return ret;
  632. /* Read flash programming interface status */
  633. ret = c2port_read_dr(dev, &status);
  634. if (ret < 0)
  635. return ret;
  636. if (status != C2PORT_COMMAND_OK)
  637. return -EBUSY;
  638. /* Write flash block */
  639. for (i = 0; i < nwrite; i++) {
  640. ret = c2port_write_dr(dev, *(buffer+i));
  641. if (ret < 0)
  642. return ret;
  643. ret = c2port_poll_in_busy(dev);
  644. if (ret < 0)
  645. return ret;
  646. }
  647. /* Wait for last flash write to complete */
  648. ret = c2port_poll_out_ready(dev);
  649. if (ret < 0)
  650. return ret;
  651. return nwrite;
  652. }
  653. static ssize_t c2port_write_flash_data(struct file *filp, struct kobject *kobj,
  654. struct bin_attribute *attr,
  655. char *buffer, loff_t offset, size_t count)
  656. {
  657. struct c2port_device *c2dev = dev_get_drvdata(kobj_to_dev(kobj));
  658. int ret;
  659. /* Check the device access status */
  660. if (!c2dev->access || !c2dev->flash_access)
  661. return -EBUSY;
  662. mutex_lock(&c2dev->mutex);
  663. ret = __c2port_write_flash_data(c2dev, buffer, offset, count);
  664. mutex_unlock(&c2dev->mutex);
  665. if (ret < 0)
  666. dev_err(c2dev->dev, "cannot write %s flash\n", c2dev->name);
  667. return ret;
  668. }
  669. /* size is computed at run-time */
  670. static BIN_ATTR(flash_data, 0644, c2port_read_flash_data,
  671. c2port_write_flash_data, 0);
  672. /*
  673. * Class attributes
  674. */
  675. static struct attribute *c2port_attrs[] = {
  676. &dev_attr_name.attr,
  677. &dev_attr_flash_blocks_num.attr,
  678. &dev_attr_flash_block_size.attr,
  679. &dev_attr_flash_size.attr,
  680. &dev_attr_access.attr,
  681. &dev_attr_reset.attr,
  682. &dev_attr_dev_id.attr,
  683. &dev_attr_rev_id.attr,
  684. &dev_attr_flash_access.attr,
  685. &dev_attr_flash_erase.attr,
  686. NULL,
  687. };
  688. static struct bin_attribute *c2port_bin_attrs[] = {
  689. &bin_attr_flash_data,
  690. NULL,
  691. };
  692. static const struct attribute_group c2port_group = {
  693. .attrs = c2port_attrs,
  694. .bin_attrs = c2port_bin_attrs,
  695. };
  696. static const struct attribute_group *c2port_groups[] = {
  697. &c2port_group,
  698. NULL,
  699. };
  700. /*
  701. * Exported functions
  702. */
  703. struct c2port_device *c2port_device_register(char *name,
  704. struct c2port_ops *ops, void *devdata)
  705. {
  706. struct c2port_device *c2dev;
  707. int ret;
  708. if (unlikely(!ops) || unlikely(!ops->access) || \
  709. unlikely(!ops->c2d_dir) || unlikely(!ops->c2ck_set) || \
  710. unlikely(!ops->c2d_get) || unlikely(!ops->c2d_set))
  711. return ERR_PTR(-EINVAL);
  712. c2dev = kmalloc(sizeof(struct c2port_device), GFP_KERNEL);
  713. if (unlikely(!c2dev))
  714. return ERR_PTR(-ENOMEM);
  715. idr_preload(GFP_KERNEL);
  716. spin_lock_irq(&c2port_idr_lock);
  717. ret = idr_alloc(&c2port_idr, c2dev, 0, 0, GFP_NOWAIT);
  718. spin_unlock_irq(&c2port_idr_lock);
  719. idr_preload_end();
  720. if (ret < 0)
  721. goto error_idr_alloc;
  722. c2dev->id = ret;
  723. bin_attr_flash_data.size = ops->blocks_num * ops->block_size;
  724. c2dev->dev = device_create(c2port_class, NULL, 0, c2dev,
  725. "c2port%d", c2dev->id);
  726. if (IS_ERR(c2dev->dev)) {
  727. ret = PTR_ERR(c2dev->dev);
  728. goto error_device_create;
  729. }
  730. dev_set_drvdata(c2dev->dev, c2dev);
  731. strncpy(c2dev->name, name, C2PORT_NAME_LEN - 1);
  732. c2dev->ops = ops;
  733. mutex_init(&c2dev->mutex);
  734. /* By default C2 port access is off */
  735. c2dev->access = c2dev->flash_access = 0;
  736. ops->access(c2dev, 0);
  737. dev_info(c2dev->dev, "C2 port %s added\n", name);
  738. dev_info(c2dev->dev, "%s flash has %d blocks x %d bytes "
  739. "(%d bytes total)\n",
  740. name, ops->blocks_num, ops->block_size,
  741. ops->blocks_num * ops->block_size);
  742. return c2dev;
  743. error_device_create:
  744. spin_lock_irq(&c2port_idr_lock);
  745. idr_remove(&c2port_idr, c2dev->id);
  746. spin_unlock_irq(&c2port_idr_lock);
  747. error_idr_alloc:
  748. kfree(c2dev);
  749. return ERR_PTR(ret);
  750. }
  751. EXPORT_SYMBOL(c2port_device_register);
  752. void c2port_device_unregister(struct c2port_device *c2dev)
  753. {
  754. if (!c2dev)
  755. return;
  756. dev_info(c2dev->dev, "C2 port %s removed\n", c2dev->name);
  757. spin_lock_irq(&c2port_idr_lock);
  758. idr_remove(&c2port_idr, c2dev->id);
  759. spin_unlock_irq(&c2port_idr_lock);
  760. device_destroy(c2port_class, c2dev->id);
  761. kfree(c2dev);
  762. }
  763. EXPORT_SYMBOL(c2port_device_unregister);
  764. /*
  765. * Module stuff
  766. */
  767. static int __init c2port_init(void)
  768. {
  769. printk(KERN_INFO "Silicon Labs C2 port support v. " DRIVER_VERSION
  770. " - (C) 2007 Rodolfo Giometti\n");
  771. c2port_class = class_create(THIS_MODULE, "c2port");
  772. if (IS_ERR(c2port_class)) {
  773. printk(KERN_ERR "c2port: failed to allocate class\n");
  774. return PTR_ERR(c2port_class);
  775. }
  776. c2port_class->dev_groups = c2port_groups;
  777. return 0;
  778. }
  779. static void __exit c2port_exit(void)
  780. {
  781. class_destroy(c2port_class);
  782. }
  783. module_init(c2port_init);
  784. module_exit(c2port_exit);
  785. MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
  786. MODULE_DESCRIPTION("Silicon Labs C2 port support v. " DRIVER_VERSION);
  787. MODULE_LICENSE("GPL");