twl6040.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * MFD driver for TWL6040 audio device
  4. *
  5. * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
  6. * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
  7. * Peter Ujfalusi <peter.ujfalusi@ti.com>
  8. *
  9. * Copyright: (C) 2011 Texas Instruments, Inc.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/types.h>
  13. #include <linux/slab.h>
  14. #include <linux/kernel.h>
  15. #include <linux/err.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/of.h>
  18. #include <linux/of_irq.h>
  19. #include <linux/of_gpio.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/gpio.h>
  22. #include <linux/delay.h>
  23. #include <linux/i2c.h>
  24. #include <linux/regmap.h>
  25. #include <linux/mfd/core.h>
  26. #include <linux/mfd/twl6040.h>
  27. #include <linux/regulator/consumer.h>
  28. #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
  29. #define TWL6040_NUM_SUPPLIES (2)
  30. static const struct reg_default twl6040_defaults[] = {
  31. { 0x01, 0x4B }, /* REG_ASICID (ro) */
  32. { 0x02, 0x00 }, /* REG_ASICREV (ro) */
  33. { 0x03, 0x00 }, /* REG_INTID */
  34. { 0x04, 0x00 }, /* REG_INTMR */
  35. { 0x05, 0x00 }, /* REG_NCPCTRL */
  36. { 0x06, 0x00 }, /* REG_LDOCTL */
  37. { 0x07, 0x60 }, /* REG_HPPLLCTL */
  38. { 0x08, 0x00 }, /* REG_LPPLLCTL */
  39. { 0x09, 0x4A }, /* REG_LPPLLDIV */
  40. { 0x0A, 0x00 }, /* REG_AMICBCTL */
  41. { 0x0B, 0x00 }, /* REG_DMICBCTL */
  42. { 0x0C, 0x00 }, /* REG_MICLCTL */
  43. { 0x0D, 0x00 }, /* REG_MICRCTL */
  44. { 0x0E, 0x00 }, /* REG_MICGAIN */
  45. { 0x0F, 0x1B }, /* REG_LINEGAIN */
  46. { 0x10, 0x00 }, /* REG_HSLCTL */
  47. { 0x11, 0x00 }, /* REG_HSRCTL */
  48. { 0x12, 0x00 }, /* REG_HSGAIN */
  49. { 0x13, 0x00 }, /* REG_EARCTL */
  50. { 0x14, 0x00 }, /* REG_HFLCTL */
  51. { 0x15, 0x00 }, /* REG_HFLGAIN */
  52. { 0x16, 0x00 }, /* REG_HFRCTL */
  53. { 0x17, 0x00 }, /* REG_HFRGAIN */
  54. { 0x18, 0x00 }, /* REG_VIBCTLL */
  55. { 0x19, 0x00 }, /* REG_VIBDATL */
  56. { 0x1A, 0x00 }, /* REG_VIBCTLR */
  57. { 0x1B, 0x00 }, /* REG_VIBDATR */
  58. { 0x1C, 0x00 }, /* REG_HKCTL1 */
  59. { 0x1D, 0x00 }, /* REG_HKCTL2 */
  60. { 0x1E, 0x00 }, /* REG_GPOCTL */
  61. { 0x1F, 0x00 }, /* REG_ALB */
  62. { 0x20, 0x00 }, /* REG_DLB */
  63. /* 0x28, REG_TRIM1 */
  64. /* 0x29, REG_TRIM2 */
  65. /* 0x2A, REG_TRIM3 */
  66. /* 0x2B, REG_HSOTRIM */
  67. /* 0x2C, REG_HFOTRIM */
  68. { 0x2D, 0x08 }, /* REG_ACCCTL */
  69. { 0x2E, 0x00 }, /* REG_STATUS (ro) */
  70. };
  71. static struct reg_sequence twl6040_patch[] = {
  72. /*
  73. * Select I2C bus access to dual access registers
  74. * Interrupt register is cleared on read
  75. * Select fast mode for i2c (400KHz)
  76. */
  77. { TWL6040_REG_ACCCTL,
  78. TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
  79. };
  80. static bool twl6040_has_vibra(struct device_node *parent)
  81. {
  82. struct device_node *node;
  83. node = of_get_child_by_name(parent, "vibra");
  84. if (node) {
  85. of_node_put(node);
  86. return true;
  87. }
  88. return false;
  89. }
  90. int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
  91. {
  92. int ret;
  93. unsigned int val;
  94. ret = regmap_read(twl6040->regmap, reg, &val);
  95. if (ret < 0)
  96. return ret;
  97. return val;
  98. }
  99. EXPORT_SYMBOL(twl6040_reg_read);
  100. int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
  101. {
  102. int ret;
  103. ret = regmap_write(twl6040->regmap, reg, val);
  104. return ret;
  105. }
  106. EXPORT_SYMBOL(twl6040_reg_write);
  107. int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  108. {
  109. return regmap_update_bits(twl6040->regmap, reg, mask, mask);
  110. }
  111. EXPORT_SYMBOL(twl6040_set_bits);
  112. int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  113. {
  114. return regmap_update_bits(twl6040->regmap, reg, mask, 0);
  115. }
  116. EXPORT_SYMBOL(twl6040_clear_bits);
  117. /* twl6040 codec manual power-up sequence */
  118. static int twl6040_power_up_manual(struct twl6040 *twl6040)
  119. {
  120. u8 ldoctl, ncpctl, lppllctl;
  121. int ret;
  122. /* enable high-side LDO, reference system and internal oscillator */
  123. ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
  124. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  125. if (ret)
  126. return ret;
  127. usleep_range(10000, 10500);
  128. /* enable negative charge pump */
  129. ncpctl = TWL6040_NCPENA;
  130. ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  131. if (ret)
  132. goto ncp_err;
  133. usleep_range(1000, 1500);
  134. /* enable low-side LDO */
  135. ldoctl |= TWL6040_LSLDOENA;
  136. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  137. if (ret)
  138. goto lsldo_err;
  139. usleep_range(1000, 1500);
  140. /* enable low-power PLL */
  141. lppllctl = TWL6040_LPLLENA;
  142. ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  143. if (ret)
  144. goto lppll_err;
  145. usleep_range(5000, 5500);
  146. /* disable internal oscillator */
  147. ldoctl &= ~TWL6040_OSCENA;
  148. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  149. if (ret)
  150. goto osc_err;
  151. return 0;
  152. osc_err:
  153. lppllctl &= ~TWL6040_LPLLENA;
  154. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  155. lppll_err:
  156. ldoctl &= ~TWL6040_LSLDOENA;
  157. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  158. lsldo_err:
  159. ncpctl &= ~TWL6040_NCPENA;
  160. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  161. ncp_err:
  162. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  163. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  164. dev_err(twl6040->dev, "manual power-up failed\n");
  165. return ret;
  166. }
  167. /* twl6040 manual power-down sequence */
  168. static void twl6040_power_down_manual(struct twl6040 *twl6040)
  169. {
  170. u8 ncpctl, ldoctl, lppllctl;
  171. ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
  172. ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
  173. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  174. /* enable internal oscillator */
  175. ldoctl |= TWL6040_OSCENA;
  176. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  177. usleep_range(1000, 1500);
  178. /* disable low-power PLL */
  179. lppllctl &= ~TWL6040_LPLLENA;
  180. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  181. /* disable low-side LDO */
  182. ldoctl &= ~TWL6040_LSLDOENA;
  183. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  184. /* disable negative charge pump */
  185. ncpctl &= ~TWL6040_NCPENA;
  186. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  187. /* disable high-side LDO, reference system and internal oscillator */
  188. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  189. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  190. }
  191. static irqreturn_t twl6040_readyint_handler(int irq, void *data)
  192. {
  193. struct twl6040 *twl6040 = data;
  194. complete(&twl6040->ready);
  195. return IRQ_HANDLED;
  196. }
  197. static irqreturn_t twl6040_thint_handler(int irq, void *data)
  198. {
  199. struct twl6040 *twl6040 = data;
  200. u8 status;
  201. status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
  202. if (status & TWL6040_TSHUTDET) {
  203. dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
  204. twl6040_power(twl6040, 0);
  205. } else {
  206. dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
  207. twl6040_power(twl6040, 1);
  208. }
  209. return IRQ_HANDLED;
  210. }
  211. static int twl6040_power_up_automatic(struct twl6040 *twl6040)
  212. {
  213. int time_left;
  214. gpio_set_value(twl6040->audpwron, 1);
  215. time_left = wait_for_completion_timeout(&twl6040->ready,
  216. msecs_to_jiffies(144));
  217. if (!time_left) {
  218. u8 intid;
  219. dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
  220. intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  221. if (!(intid & TWL6040_READYINT)) {
  222. dev_err(twl6040->dev, "automatic power-up failed\n");
  223. gpio_set_value(twl6040->audpwron, 0);
  224. return -ETIMEDOUT;
  225. }
  226. }
  227. return 0;
  228. }
  229. int twl6040_power(struct twl6040 *twl6040, int on)
  230. {
  231. int ret = 0;
  232. mutex_lock(&twl6040->mutex);
  233. if (on) {
  234. /* already powered-up */
  235. if (twl6040->power_count++)
  236. goto out;
  237. ret = clk_prepare_enable(twl6040->clk32k);
  238. if (ret) {
  239. twl6040->power_count = 0;
  240. goto out;
  241. }
  242. /* Allow writes to the chip */
  243. regcache_cache_only(twl6040->regmap, false);
  244. if (gpio_is_valid(twl6040->audpwron)) {
  245. /* use automatic power-up sequence */
  246. ret = twl6040_power_up_automatic(twl6040);
  247. if (ret) {
  248. clk_disable_unprepare(twl6040->clk32k);
  249. twl6040->power_count = 0;
  250. goto out;
  251. }
  252. } else {
  253. /* use manual power-up sequence */
  254. ret = twl6040_power_up_manual(twl6040);
  255. if (ret) {
  256. clk_disable_unprepare(twl6040->clk32k);
  257. twl6040->power_count = 0;
  258. goto out;
  259. }
  260. }
  261. /*
  262. * Register access can produce errors after power-up unless we
  263. * wait at least 8ms based on measurements on duovero.
  264. */
  265. usleep_range(10000, 12000);
  266. /* Sync with the HW */
  267. ret = regcache_sync(twl6040->regmap);
  268. if (ret) {
  269. dev_err(twl6040->dev, "Failed to sync with the HW: %i\n",
  270. ret);
  271. goto out;
  272. }
  273. /* Default PLL configuration after power up */
  274. twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
  275. twl6040->sysclk_rate = 19200000;
  276. } else {
  277. /* already powered-down */
  278. if (!twl6040->power_count) {
  279. dev_err(twl6040->dev,
  280. "device is already powered-off\n");
  281. ret = -EPERM;
  282. goto out;
  283. }
  284. if (--twl6040->power_count)
  285. goto out;
  286. if (gpio_is_valid(twl6040->audpwron)) {
  287. /* use AUDPWRON line */
  288. gpio_set_value(twl6040->audpwron, 0);
  289. /* power-down sequence latency */
  290. usleep_range(500, 700);
  291. } else {
  292. /* use manual power-down sequence */
  293. twl6040_power_down_manual(twl6040);
  294. }
  295. /* Set regmap to cache only and mark it as dirty */
  296. regcache_cache_only(twl6040->regmap, true);
  297. regcache_mark_dirty(twl6040->regmap);
  298. twl6040->sysclk_rate = 0;
  299. if (twl6040->pll == TWL6040_SYSCLK_SEL_HPPLL) {
  300. clk_disable_unprepare(twl6040->mclk);
  301. twl6040->mclk_rate = 0;
  302. }
  303. clk_disable_unprepare(twl6040->clk32k);
  304. }
  305. out:
  306. mutex_unlock(&twl6040->mutex);
  307. return ret;
  308. }
  309. EXPORT_SYMBOL(twl6040_power);
  310. int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
  311. unsigned int freq_in, unsigned int freq_out)
  312. {
  313. u8 hppllctl, lppllctl;
  314. int ret = 0;
  315. mutex_lock(&twl6040->mutex);
  316. hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
  317. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  318. /* Force full reconfiguration when switching between PLL */
  319. if (pll_id != twl6040->pll) {
  320. twl6040->sysclk_rate = 0;
  321. twl6040->mclk_rate = 0;
  322. }
  323. switch (pll_id) {
  324. case TWL6040_SYSCLK_SEL_LPPLL:
  325. /* low-power PLL divider */
  326. /* Change the sysclk configuration only if it has been canged */
  327. if (twl6040->sysclk_rate != freq_out) {
  328. switch (freq_out) {
  329. case 17640000:
  330. lppllctl |= TWL6040_LPLLFIN;
  331. break;
  332. case 19200000:
  333. lppllctl &= ~TWL6040_LPLLFIN;
  334. break;
  335. default:
  336. dev_err(twl6040->dev,
  337. "freq_out %d not supported\n",
  338. freq_out);
  339. ret = -EINVAL;
  340. goto pll_out;
  341. }
  342. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  343. lppllctl);
  344. }
  345. /* The PLL in use has not been change, we can exit */
  346. if (twl6040->pll == pll_id)
  347. break;
  348. switch (freq_in) {
  349. case 32768:
  350. lppllctl |= TWL6040_LPLLENA;
  351. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  352. lppllctl);
  353. mdelay(5);
  354. lppllctl &= ~TWL6040_HPLLSEL;
  355. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  356. lppllctl);
  357. hppllctl &= ~TWL6040_HPLLENA;
  358. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
  359. hppllctl);
  360. break;
  361. default:
  362. dev_err(twl6040->dev,
  363. "freq_in %d not supported\n", freq_in);
  364. ret = -EINVAL;
  365. goto pll_out;
  366. }
  367. clk_disable_unprepare(twl6040->mclk);
  368. break;
  369. case TWL6040_SYSCLK_SEL_HPPLL:
  370. /* high-performance PLL can provide only 19.2 MHz */
  371. if (freq_out != 19200000) {
  372. dev_err(twl6040->dev,
  373. "freq_out %d not supported\n", freq_out);
  374. ret = -EINVAL;
  375. goto pll_out;
  376. }
  377. if (twl6040->mclk_rate != freq_in) {
  378. hppllctl &= ~TWL6040_MCLK_MSK;
  379. switch (freq_in) {
  380. case 12000000:
  381. /* PLL enabled, active mode */
  382. hppllctl |= TWL6040_MCLK_12000KHZ |
  383. TWL6040_HPLLENA;
  384. break;
  385. case 19200000:
  386. /* PLL enabled, bypass mode */
  387. hppllctl |= TWL6040_MCLK_19200KHZ |
  388. TWL6040_HPLLBP | TWL6040_HPLLENA;
  389. break;
  390. case 26000000:
  391. /* PLL enabled, active mode */
  392. hppllctl |= TWL6040_MCLK_26000KHZ |
  393. TWL6040_HPLLENA;
  394. break;
  395. case 38400000:
  396. /* PLL enabled, bypass mode */
  397. hppllctl |= TWL6040_MCLK_38400KHZ |
  398. TWL6040_HPLLBP | TWL6040_HPLLENA;
  399. break;
  400. default:
  401. dev_err(twl6040->dev,
  402. "freq_in %d not supported\n", freq_in);
  403. ret = -EINVAL;
  404. goto pll_out;
  405. }
  406. /* When switching to HPPLL, enable the mclk first */
  407. if (pll_id != twl6040->pll)
  408. clk_prepare_enable(twl6040->mclk);
  409. /*
  410. * enable clock slicer to ensure input waveform is
  411. * square
  412. */
  413. hppllctl |= TWL6040_HPLLSQRENA;
  414. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
  415. hppllctl);
  416. usleep_range(500, 700);
  417. lppllctl |= TWL6040_HPLLSEL;
  418. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  419. lppllctl);
  420. lppllctl &= ~TWL6040_LPLLENA;
  421. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  422. lppllctl);
  423. twl6040->mclk_rate = freq_in;
  424. }
  425. break;
  426. default:
  427. dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
  428. ret = -EINVAL;
  429. goto pll_out;
  430. }
  431. twl6040->sysclk_rate = freq_out;
  432. twl6040->pll = pll_id;
  433. pll_out:
  434. mutex_unlock(&twl6040->mutex);
  435. return ret;
  436. }
  437. EXPORT_SYMBOL(twl6040_set_pll);
  438. int twl6040_get_pll(struct twl6040 *twl6040)
  439. {
  440. if (twl6040->power_count)
  441. return twl6040->pll;
  442. else
  443. return -ENODEV;
  444. }
  445. EXPORT_SYMBOL(twl6040_get_pll);
  446. unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
  447. {
  448. return twl6040->sysclk_rate;
  449. }
  450. EXPORT_SYMBOL(twl6040_get_sysclk);
  451. /* Get the combined status of the vibra control register */
  452. int twl6040_get_vibralr_status(struct twl6040 *twl6040)
  453. {
  454. unsigned int reg;
  455. int ret;
  456. u8 status;
  457. ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
  458. if (ret != 0)
  459. return ret;
  460. status = reg;
  461. ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
  462. if (ret != 0)
  463. return ret;
  464. status |= reg;
  465. status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
  466. return status;
  467. }
  468. EXPORT_SYMBOL(twl6040_get_vibralr_status);
  469. static struct resource twl6040_vibra_rsrc[] = {
  470. {
  471. .flags = IORESOURCE_IRQ,
  472. },
  473. };
  474. static struct resource twl6040_codec_rsrc[] = {
  475. {
  476. .flags = IORESOURCE_IRQ,
  477. },
  478. };
  479. static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
  480. {
  481. /* Register 0 is not readable */
  482. if (!reg)
  483. return false;
  484. return true;
  485. }
  486. static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
  487. {
  488. switch (reg) {
  489. case TWL6040_REG_ASICID:
  490. case TWL6040_REG_ASICREV:
  491. case TWL6040_REG_INTID:
  492. case TWL6040_REG_LPPLLCTL:
  493. case TWL6040_REG_HPPLLCTL:
  494. case TWL6040_REG_STATUS:
  495. return true;
  496. default:
  497. return false;
  498. }
  499. }
  500. static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
  501. {
  502. switch (reg) {
  503. case TWL6040_REG_ASICID:
  504. case TWL6040_REG_ASICREV:
  505. case TWL6040_REG_STATUS:
  506. return false;
  507. default:
  508. return true;
  509. }
  510. }
  511. static const struct regmap_config twl6040_regmap_config = {
  512. .reg_bits = 8,
  513. .val_bits = 8,
  514. .reg_defaults = twl6040_defaults,
  515. .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
  516. .max_register = TWL6040_REG_STATUS, /* 0x2e */
  517. .readable_reg = twl6040_readable_reg,
  518. .volatile_reg = twl6040_volatile_reg,
  519. .writeable_reg = twl6040_writeable_reg,
  520. .cache_type = REGCACHE_RBTREE,
  521. .use_single_read = true,
  522. .use_single_write = true,
  523. };
  524. static const struct regmap_irq twl6040_irqs[] = {
  525. { .reg_offset = 0, .mask = TWL6040_THINT, },
  526. { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
  527. { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
  528. { .reg_offset = 0, .mask = TWL6040_HFINT, },
  529. { .reg_offset = 0, .mask = TWL6040_VIBINT, },
  530. { .reg_offset = 0, .mask = TWL6040_READYINT, },
  531. };
  532. static struct regmap_irq_chip twl6040_irq_chip = {
  533. .name = "twl6040",
  534. .irqs = twl6040_irqs,
  535. .num_irqs = ARRAY_SIZE(twl6040_irqs),
  536. .num_regs = 1,
  537. .status_base = TWL6040_REG_INTID,
  538. .mask_base = TWL6040_REG_INTMR,
  539. };
  540. static int twl6040_probe(struct i2c_client *client,
  541. const struct i2c_device_id *id)
  542. {
  543. struct device_node *node = client->dev.of_node;
  544. struct twl6040 *twl6040;
  545. struct mfd_cell *cell = NULL;
  546. int irq, ret, children = 0;
  547. if (!node) {
  548. dev_err(&client->dev, "of node is missing\n");
  549. return -EINVAL;
  550. }
  551. /* In order to operate correctly we need valid interrupt config */
  552. if (!client->irq) {
  553. dev_err(&client->dev, "Invalid IRQ configuration\n");
  554. return -EINVAL;
  555. }
  556. twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
  557. GFP_KERNEL);
  558. if (!twl6040)
  559. return -ENOMEM;
  560. twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
  561. if (IS_ERR(twl6040->regmap))
  562. return PTR_ERR(twl6040->regmap);
  563. i2c_set_clientdata(client, twl6040);
  564. twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
  565. if (IS_ERR(twl6040->clk32k)) {
  566. if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER)
  567. return -EPROBE_DEFER;
  568. dev_dbg(&client->dev, "clk32k is not handled\n");
  569. twl6040->clk32k = NULL;
  570. }
  571. twl6040->mclk = devm_clk_get(&client->dev, "mclk");
  572. if (IS_ERR(twl6040->mclk)) {
  573. if (PTR_ERR(twl6040->mclk) == -EPROBE_DEFER)
  574. return -EPROBE_DEFER;
  575. dev_dbg(&client->dev, "mclk is not handled\n");
  576. twl6040->mclk = NULL;
  577. }
  578. twl6040->supplies[0].supply = "vio";
  579. twl6040->supplies[1].supply = "v2v1";
  580. ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
  581. twl6040->supplies);
  582. if (ret != 0) {
  583. dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
  584. return ret;
  585. }
  586. ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  587. if (ret != 0) {
  588. dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
  589. return ret;
  590. }
  591. twl6040->dev = &client->dev;
  592. twl6040->irq = client->irq;
  593. mutex_init(&twl6040->mutex);
  594. init_completion(&twl6040->ready);
  595. regmap_register_patch(twl6040->regmap, twl6040_patch,
  596. ARRAY_SIZE(twl6040_patch));
  597. twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
  598. if (twl6040->rev < 0) {
  599. dev_err(&client->dev, "Failed to read revision register: %d\n",
  600. twl6040->rev);
  601. ret = twl6040->rev;
  602. goto gpio_err;
  603. }
  604. /* ERRATA: Automatic power-up is not possible in ES1.0 */
  605. if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
  606. twl6040->audpwron = of_get_named_gpio(node,
  607. "ti,audpwron-gpio", 0);
  608. else
  609. twl6040->audpwron = -EINVAL;
  610. if (gpio_is_valid(twl6040->audpwron)) {
  611. ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
  612. GPIOF_OUT_INIT_LOW, "audpwron");
  613. if (ret)
  614. goto gpio_err;
  615. /* Clear any pending interrupt */
  616. twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  617. }
  618. ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
  619. 0, &twl6040_irq_chip, &twl6040->irq_data);
  620. if (ret < 0)
  621. goto gpio_err;
  622. twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
  623. TWL6040_IRQ_READY);
  624. twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
  625. TWL6040_IRQ_TH);
  626. ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
  627. twl6040_readyint_handler, IRQF_ONESHOT,
  628. "twl6040_irq_ready", twl6040);
  629. if (ret) {
  630. dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
  631. goto readyirq_err;
  632. }
  633. ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
  634. twl6040_thint_handler, IRQF_ONESHOT,
  635. "twl6040_irq_th", twl6040);
  636. if (ret) {
  637. dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
  638. goto readyirq_err;
  639. }
  640. /*
  641. * The main functionality of twl6040 to provide audio on OMAP4+ systems.
  642. * We can add the ASoC codec child whenever this driver has been loaded.
  643. */
  644. irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
  645. cell = &twl6040->cells[children];
  646. cell->name = "twl6040-codec";
  647. twl6040_codec_rsrc[0].start = irq;
  648. twl6040_codec_rsrc[0].end = irq;
  649. cell->resources = twl6040_codec_rsrc;
  650. cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
  651. children++;
  652. /* Vibra input driver support */
  653. if (twl6040_has_vibra(node)) {
  654. irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
  655. cell = &twl6040->cells[children];
  656. cell->name = "twl6040-vibra";
  657. twl6040_vibra_rsrc[0].start = irq;
  658. twl6040_vibra_rsrc[0].end = irq;
  659. cell->resources = twl6040_vibra_rsrc;
  660. cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
  661. children++;
  662. }
  663. /* GPO support */
  664. cell = &twl6040->cells[children];
  665. cell->name = "twl6040-gpo";
  666. children++;
  667. /* PDM clock support */
  668. cell = &twl6040->cells[children];
  669. cell->name = "twl6040-pdmclk";
  670. children++;
  671. /* The chip is powered down so mark regmap to cache only and dirty */
  672. regcache_cache_only(twl6040->regmap, true);
  673. regcache_mark_dirty(twl6040->regmap);
  674. ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
  675. NULL, 0, NULL);
  676. if (ret)
  677. goto readyirq_err;
  678. return 0;
  679. readyirq_err:
  680. regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
  681. gpio_err:
  682. regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  683. return ret;
  684. }
  685. static int twl6040_remove(struct i2c_client *client)
  686. {
  687. struct twl6040 *twl6040 = i2c_get_clientdata(client);
  688. if (twl6040->power_count)
  689. twl6040_power(twl6040, 0);
  690. regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
  691. mfd_remove_devices(&client->dev);
  692. regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  693. return 0;
  694. }
  695. static const struct i2c_device_id twl6040_i2c_id[] = {
  696. { "twl6040", 0, },
  697. { "twl6041", 0, },
  698. { },
  699. };
  700. MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
  701. static struct i2c_driver twl6040_driver = {
  702. .driver = {
  703. .name = "twl6040",
  704. },
  705. .probe = twl6040_probe,
  706. .remove = twl6040_remove,
  707. .id_table = twl6040_i2c_id,
  708. };
  709. module_i2c_driver(twl6040_driver);
  710. MODULE_DESCRIPTION("TWL6040 MFD");
  711. MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
  712. MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
  713. MODULE_LICENSE("GPL");