t7l66xb.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. *
  4. * Toshiba T7L66XB core mfd support
  5. *
  6. * Copyright (c) 2005, 2007, 2008 Ian Molton
  7. * Copyright (c) 2008 Dmitry Baryshkov
  8. *
  9. * T7L66 features:
  10. *
  11. * Supported in this driver:
  12. * SD/MMC
  13. * SM/NAND flash controller
  14. *
  15. * As yet not supported
  16. * GPIO interface (on NAND pins)
  17. * Serial interface
  18. * TFT 'interface converter'
  19. * PCMCIA interface logic
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/err.h>
  24. #include <linux/io.h>
  25. #include <linux/slab.h>
  26. #include <linux/irq.h>
  27. #include <linux/clk.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/mfd/core.h>
  30. #include <linux/mfd/tmio.h>
  31. #include <linux/mfd/t7l66xb.h>
  32. enum {
  33. T7L66XB_CELL_NAND,
  34. T7L66XB_CELL_MMC,
  35. };
  36. static const struct resource t7l66xb_mmc_resources[] = {
  37. {
  38. .start = 0x800,
  39. .end = 0x9ff,
  40. .flags = IORESOURCE_MEM,
  41. },
  42. {
  43. .start = IRQ_T7L66XB_MMC,
  44. .end = IRQ_T7L66XB_MMC,
  45. .flags = IORESOURCE_IRQ,
  46. },
  47. };
  48. #define SCR_REVID 0x08 /* b Revision ID */
  49. #define SCR_IMR 0x42 /* b Interrupt Mask */
  50. #define SCR_DEV_CTL 0xe0 /* b Device control */
  51. #define SCR_ISR 0xe1 /* b Interrupt Status */
  52. #define SCR_GPO_OC 0xf0 /* b GPO output control */
  53. #define SCR_GPO_OS 0xf1 /* b GPO output enable */
  54. #define SCR_GPI_S 0xf2 /* w GPI status */
  55. #define SCR_APDC 0xf8 /* b Active pullup down ctrl */
  56. #define SCR_DEV_CTL_USB BIT(0) /* USB enable */
  57. #define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */
  58. /*--------------------------------------------------------------------------*/
  59. struct t7l66xb {
  60. void __iomem *scr;
  61. /* Lock to protect registers requiring read/modify/write ops. */
  62. raw_spinlock_t lock;
  63. struct resource rscr;
  64. struct clk *clk48m;
  65. struct clk *clk32k;
  66. int irq;
  67. int irq_base;
  68. };
  69. /*--------------------------------------------------------------------------*/
  70. static int t7l66xb_mmc_enable(struct platform_device *mmc)
  71. {
  72. struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
  73. unsigned long flags;
  74. u8 dev_ctl;
  75. int ret;
  76. ret = clk_prepare_enable(t7l66xb->clk32k);
  77. if (ret)
  78. return ret;
  79. raw_spin_lock_irqsave(&t7l66xb->lock, flags);
  80. dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
  81. dev_ctl |= SCR_DEV_CTL_MMC;
  82. tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
  83. raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
  84. tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
  85. t7l66xb_mmc_resources[0].start & 0xfffe);
  86. return 0;
  87. }
  88. static int t7l66xb_mmc_disable(struct platform_device *mmc)
  89. {
  90. struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
  91. unsigned long flags;
  92. u8 dev_ctl;
  93. raw_spin_lock_irqsave(&t7l66xb->lock, flags);
  94. dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
  95. dev_ctl &= ~SCR_DEV_CTL_MMC;
  96. tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
  97. raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
  98. clk_disable_unprepare(t7l66xb->clk32k);
  99. return 0;
  100. }
  101. static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state)
  102. {
  103. struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
  104. tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state);
  105. }
  106. static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state)
  107. {
  108. struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
  109. tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state);
  110. }
  111. /*--------------------------------------------------------------------------*/
  112. static struct tmio_mmc_data t7166xb_mmc_data = {
  113. .hclk = 24000000,
  114. .set_pwr = t7l66xb_mmc_pwr,
  115. .set_clk_div = t7l66xb_mmc_clk_div,
  116. };
  117. static const struct resource t7l66xb_nand_resources[] = {
  118. {
  119. .start = 0xc00,
  120. .end = 0xc07,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. {
  124. .start = 0x0100,
  125. .end = 0x01ff,
  126. .flags = IORESOURCE_MEM,
  127. },
  128. {
  129. .start = IRQ_T7L66XB_NAND,
  130. .end = IRQ_T7L66XB_NAND,
  131. .flags = IORESOURCE_IRQ,
  132. },
  133. };
  134. static struct mfd_cell t7l66xb_cells[] = {
  135. [T7L66XB_CELL_MMC] = {
  136. .name = "tmio-mmc",
  137. .enable = t7l66xb_mmc_enable,
  138. .disable = t7l66xb_mmc_disable,
  139. .platform_data = &t7166xb_mmc_data,
  140. .pdata_size = sizeof(t7166xb_mmc_data),
  141. .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources),
  142. .resources = t7l66xb_mmc_resources,
  143. },
  144. [T7L66XB_CELL_NAND] = {
  145. .name = "tmio-nand",
  146. .num_resources = ARRAY_SIZE(t7l66xb_nand_resources),
  147. .resources = t7l66xb_nand_resources,
  148. },
  149. };
  150. /*--------------------------------------------------------------------------*/
  151. /* Handle the T7L66XB interrupt mux */
  152. static void t7l66xb_irq(struct irq_desc *desc)
  153. {
  154. struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc);
  155. unsigned int isr;
  156. unsigned int i, irq_base;
  157. irq_base = t7l66xb->irq_base;
  158. while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) &
  159. ~tmio_ioread8(t7l66xb->scr + SCR_IMR)))
  160. for (i = 0; i < T7L66XB_NR_IRQS; i++)
  161. if (isr & (1 << i))
  162. generic_handle_irq(irq_base + i);
  163. }
  164. static void t7l66xb_irq_mask(struct irq_data *data)
  165. {
  166. struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
  167. unsigned long flags;
  168. u8 imr;
  169. raw_spin_lock_irqsave(&t7l66xb->lock, flags);
  170. imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
  171. imr |= 1 << (data->irq - t7l66xb->irq_base);
  172. tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
  173. raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
  174. }
  175. static void t7l66xb_irq_unmask(struct irq_data *data)
  176. {
  177. struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
  178. unsigned long flags;
  179. u8 imr;
  180. raw_spin_lock_irqsave(&t7l66xb->lock, flags);
  181. imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
  182. imr &= ~(1 << (data->irq - t7l66xb->irq_base));
  183. tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
  184. raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
  185. }
  186. static struct irq_chip t7l66xb_chip = {
  187. .name = "t7l66xb",
  188. .irq_ack = t7l66xb_irq_mask,
  189. .irq_mask = t7l66xb_irq_mask,
  190. .irq_unmask = t7l66xb_irq_unmask,
  191. };
  192. /*--------------------------------------------------------------------------*/
  193. /* Install the IRQ handler */
  194. static void t7l66xb_attach_irq(struct platform_device *dev)
  195. {
  196. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  197. unsigned int irq, irq_base;
  198. irq_base = t7l66xb->irq_base;
  199. for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
  200. irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq);
  201. irq_set_chip_data(irq, t7l66xb);
  202. }
  203. irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING);
  204. irq_set_chained_handler_and_data(t7l66xb->irq, t7l66xb_irq, t7l66xb);
  205. }
  206. static void t7l66xb_detach_irq(struct platform_device *dev)
  207. {
  208. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  209. unsigned int irq, irq_base;
  210. irq_base = t7l66xb->irq_base;
  211. irq_set_chained_handler_and_data(t7l66xb->irq, NULL, NULL);
  212. for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
  213. irq_set_chip(irq, NULL);
  214. irq_set_chip_data(irq, NULL);
  215. }
  216. }
  217. /*--------------------------------------------------------------------------*/
  218. #ifdef CONFIG_PM
  219. static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state)
  220. {
  221. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  222. struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
  223. if (pdata && pdata->suspend)
  224. pdata->suspend(dev);
  225. clk_disable_unprepare(t7l66xb->clk48m);
  226. return 0;
  227. }
  228. static int t7l66xb_resume(struct platform_device *dev)
  229. {
  230. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  231. struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
  232. int ret;
  233. ret = clk_prepare_enable(t7l66xb->clk48m);
  234. if (ret)
  235. return ret;
  236. if (pdata && pdata->resume)
  237. pdata->resume(dev);
  238. tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
  239. t7l66xb_mmc_resources[0].start & 0xfffe);
  240. return 0;
  241. }
  242. #else
  243. #define t7l66xb_suspend NULL
  244. #define t7l66xb_resume NULL
  245. #endif
  246. /*--------------------------------------------------------------------------*/
  247. static int t7l66xb_probe(struct platform_device *dev)
  248. {
  249. struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
  250. struct t7l66xb *t7l66xb;
  251. struct resource *iomem, *rscr;
  252. int ret;
  253. if (!pdata)
  254. return -EINVAL;
  255. iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
  256. if (!iomem)
  257. return -EINVAL;
  258. t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL);
  259. if (!t7l66xb)
  260. return -ENOMEM;
  261. raw_spin_lock_init(&t7l66xb->lock);
  262. platform_set_drvdata(dev, t7l66xb);
  263. ret = platform_get_irq(dev, 0);
  264. if (ret >= 0)
  265. t7l66xb->irq = ret;
  266. else
  267. goto err_noirq;
  268. t7l66xb->irq_base = pdata->irq_base;
  269. t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K");
  270. if (IS_ERR(t7l66xb->clk32k)) {
  271. ret = PTR_ERR(t7l66xb->clk32k);
  272. goto err_clk32k_get;
  273. }
  274. t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M");
  275. if (IS_ERR(t7l66xb->clk48m)) {
  276. ret = PTR_ERR(t7l66xb->clk48m);
  277. goto err_clk48m_get;
  278. }
  279. rscr = &t7l66xb->rscr;
  280. rscr->name = "t7l66xb-core";
  281. rscr->start = iomem->start;
  282. rscr->end = iomem->start + 0xff;
  283. rscr->flags = IORESOURCE_MEM;
  284. ret = request_resource(iomem, rscr);
  285. if (ret)
  286. goto err_request_scr;
  287. t7l66xb->scr = ioremap(rscr->start, resource_size(rscr));
  288. if (!t7l66xb->scr) {
  289. ret = -ENOMEM;
  290. goto err_ioremap;
  291. }
  292. ret = clk_prepare_enable(t7l66xb->clk48m);
  293. if (ret)
  294. goto err_clk_enable;
  295. if (pdata->enable)
  296. pdata->enable(dev);
  297. /* Mask all interrupts */
  298. tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR);
  299. printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n",
  300. dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID),
  301. (unsigned long)iomem->start, t7l66xb->irq);
  302. t7l66xb_attach_irq(dev);
  303. t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = pdata->nand_data;
  304. t7l66xb_cells[T7L66XB_CELL_NAND].pdata_size = sizeof(*pdata->nand_data);
  305. ret = mfd_add_devices(&dev->dev, dev->id,
  306. t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells),
  307. iomem, t7l66xb->irq_base, NULL);
  308. if (!ret)
  309. return 0;
  310. t7l66xb_detach_irq(dev);
  311. clk_disable_unprepare(t7l66xb->clk48m);
  312. err_clk_enable:
  313. iounmap(t7l66xb->scr);
  314. err_ioremap:
  315. release_resource(&t7l66xb->rscr);
  316. err_request_scr:
  317. clk_put(t7l66xb->clk48m);
  318. err_clk48m_get:
  319. clk_put(t7l66xb->clk32k);
  320. err_clk32k_get:
  321. err_noirq:
  322. kfree(t7l66xb);
  323. return ret;
  324. }
  325. static int t7l66xb_remove(struct platform_device *dev)
  326. {
  327. struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
  328. struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
  329. int ret;
  330. ret = pdata->disable(dev);
  331. clk_disable_unprepare(t7l66xb->clk48m);
  332. clk_put(t7l66xb->clk48m);
  333. clk_disable_unprepare(t7l66xb->clk32k);
  334. clk_put(t7l66xb->clk32k);
  335. t7l66xb_detach_irq(dev);
  336. iounmap(t7l66xb->scr);
  337. release_resource(&t7l66xb->rscr);
  338. mfd_remove_devices(&dev->dev);
  339. kfree(t7l66xb);
  340. return ret;
  341. }
  342. static struct platform_driver t7l66xb_platform_driver = {
  343. .driver = {
  344. .name = "t7l66xb",
  345. },
  346. .suspend = t7l66xb_suspend,
  347. .resume = t7l66xb_resume,
  348. .probe = t7l66xb_probe,
  349. .remove = t7l66xb_remove,
  350. };
  351. /*--------------------------------------------------------------------------*/
  352. module_platform_driver(t7l66xb_platform_driver);
  353. MODULE_DESCRIPTION("Toshiba T7L66XB core driver");
  354. MODULE_LICENSE("GPL v2");
  355. MODULE_AUTHOR("Ian Molton");
  356. MODULE_ALIAS("platform:t7l66xb");