motorola-cpcap.c 8.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Motorola CPCAP PMIC core driver
  4. *
  5. * Copyright (C) 2016 Tony Lindgren <tony@atomide.com>
  6. */
  7. #include <linux/device.h>
  8. #include <linux/err.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/irq.h>
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/of_device.h>
  14. #include <linux/regmap.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/mfd/core.h>
  17. #include <linux/mfd/motorola-cpcap.h>
  18. #include <linux/spi/spi.h>
  19. #define CPCAP_NR_IRQ_REG_BANKS 6
  20. #define CPCAP_NR_IRQ_CHIPS 3
  21. #define CPCAP_REGISTER_SIZE 4
  22. #define CPCAP_REGISTER_BITS 16
  23. struct cpcap_ddata {
  24. struct spi_device *spi;
  25. struct regmap_irq *irqs;
  26. struct regmap_irq_chip_data *irqdata[CPCAP_NR_IRQ_CHIPS];
  27. const struct regmap_config *regmap_conf;
  28. struct regmap *regmap;
  29. };
  30. static int cpcap_sense_irq(struct regmap *regmap, int irq)
  31. {
  32. int regnum = irq / CPCAP_REGISTER_BITS;
  33. int mask = BIT(irq % CPCAP_REGISTER_BITS);
  34. int reg = CPCAP_REG_INTS1 + (regnum * CPCAP_REGISTER_SIZE);
  35. int err, val;
  36. if (reg < CPCAP_REG_INTS1 || reg > CPCAP_REG_INTS4)
  37. return -EINVAL;
  38. err = regmap_read(regmap, reg, &val);
  39. if (err)
  40. return err;
  41. return !!(val & mask);
  42. }
  43. int cpcap_sense_virq(struct regmap *regmap, int virq)
  44. {
  45. struct regmap_irq_chip_data *d = irq_get_chip_data(virq);
  46. int irq_base = regmap_irq_chip_get_base(d);
  47. return cpcap_sense_irq(regmap, virq - irq_base);
  48. }
  49. EXPORT_SYMBOL_GPL(cpcap_sense_virq);
  50. static int cpcap_check_revision(struct cpcap_ddata *cpcap)
  51. {
  52. u16 vendor, rev;
  53. int ret;
  54. ret = cpcap_get_vendor(&cpcap->spi->dev, cpcap->regmap, &vendor);
  55. if (ret)
  56. return ret;
  57. ret = cpcap_get_revision(&cpcap->spi->dev, cpcap->regmap, &rev);
  58. if (ret)
  59. return ret;
  60. dev_info(&cpcap->spi->dev, "CPCAP vendor: %s rev: %i.%i (%x)\n",
  61. vendor == CPCAP_VENDOR_ST ? "ST" : "TI",
  62. CPCAP_REVISION_MAJOR(rev), CPCAP_REVISION_MINOR(rev),
  63. rev);
  64. if (rev < CPCAP_REVISION_2_1) {
  65. dev_info(&cpcap->spi->dev,
  66. "Please add old CPCAP revision support as needed\n");
  67. return -ENODEV;
  68. }
  69. return 0;
  70. }
  71. /*
  72. * First two irq chips are the two private macro interrupt chips, the third
  73. * irq chip is for register banks 1 - 4 and is available for drivers to use.
  74. */
  75. static struct regmap_irq_chip cpcap_irq_chip[CPCAP_NR_IRQ_CHIPS] = {
  76. {
  77. .name = "cpcap-m2",
  78. .num_regs = 1,
  79. .status_base = CPCAP_REG_MI1,
  80. .ack_base = CPCAP_REG_MI1,
  81. .mask_base = CPCAP_REG_MIM1,
  82. .use_ack = true,
  83. .clear_ack = true,
  84. },
  85. {
  86. .name = "cpcap-m2",
  87. .num_regs = 1,
  88. .status_base = CPCAP_REG_MI2,
  89. .ack_base = CPCAP_REG_MI2,
  90. .mask_base = CPCAP_REG_MIM2,
  91. .use_ack = true,
  92. .clear_ack = true,
  93. },
  94. {
  95. .name = "cpcap1-4",
  96. .num_regs = 4,
  97. .status_base = CPCAP_REG_INT1,
  98. .ack_base = CPCAP_REG_INT1,
  99. .mask_base = CPCAP_REG_INTM1,
  100. .use_ack = true,
  101. .clear_ack = true,
  102. },
  103. };
  104. static void cpcap_init_one_regmap_irq(struct cpcap_ddata *cpcap,
  105. struct regmap_irq *rirq,
  106. int irq_base, int irq)
  107. {
  108. unsigned int reg_offset;
  109. unsigned int bit, mask;
  110. reg_offset = irq - irq_base;
  111. reg_offset /= cpcap->regmap_conf->val_bits;
  112. reg_offset *= cpcap->regmap_conf->reg_stride;
  113. bit = irq % cpcap->regmap_conf->val_bits;
  114. mask = (1 << bit);
  115. rirq->reg_offset = reg_offset;
  116. rirq->mask = mask;
  117. }
  118. static int cpcap_init_irq_chip(struct cpcap_ddata *cpcap, int irq_chip,
  119. int irq_start, int nr_irqs)
  120. {
  121. struct regmap_irq_chip *chip = &cpcap_irq_chip[irq_chip];
  122. int i, ret;
  123. for (i = irq_start; i < irq_start + nr_irqs; i++) {
  124. struct regmap_irq *rirq = &cpcap->irqs[i];
  125. cpcap_init_one_regmap_irq(cpcap, rirq, irq_start, i);
  126. }
  127. chip->irqs = &cpcap->irqs[irq_start];
  128. chip->num_irqs = nr_irqs;
  129. chip->irq_drv_data = cpcap;
  130. ret = devm_regmap_add_irq_chip(&cpcap->spi->dev, cpcap->regmap,
  131. cpcap->spi->irq,
  132. irq_get_trigger_type(cpcap->spi->irq) |
  133. IRQF_SHARED, -1,
  134. chip, &cpcap->irqdata[irq_chip]);
  135. if (ret) {
  136. dev_err(&cpcap->spi->dev, "could not add irq chip %i: %i\n",
  137. irq_chip, ret);
  138. return ret;
  139. }
  140. return 0;
  141. }
  142. static int cpcap_init_irq(struct cpcap_ddata *cpcap)
  143. {
  144. int ret;
  145. cpcap->irqs = devm_kzalloc(&cpcap->spi->dev,
  146. array3_size(sizeof(*cpcap->irqs),
  147. CPCAP_NR_IRQ_REG_BANKS,
  148. cpcap->regmap_conf->val_bits),
  149. GFP_KERNEL);
  150. if (!cpcap->irqs)
  151. return -ENOMEM;
  152. ret = cpcap_init_irq_chip(cpcap, 0, 0, 16);
  153. if (ret)
  154. return ret;
  155. ret = cpcap_init_irq_chip(cpcap, 1, 16, 16);
  156. if (ret)
  157. return ret;
  158. ret = cpcap_init_irq_chip(cpcap, 2, 32, 64);
  159. if (ret)
  160. return ret;
  161. enable_irq_wake(cpcap->spi->irq);
  162. return 0;
  163. }
  164. static const struct of_device_id cpcap_of_match[] = {
  165. { .compatible = "motorola,cpcap", },
  166. { .compatible = "st,6556002", },
  167. {},
  168. };
  169. MODULE_DEVICE_TABLE(of, cpcap_of_match);
  170. static const struct regmap_config cpcap_regmap_config = {
  171. .reg_bits = 16,
  172. .reg_stride = 4,
  173. .pad_bits = 0,
  174. .val_bits = 16,
  175. .write_flag_mask = 0x8000,
  176. .max_register = CPCAP_REG_ST_TEST2,
  177. .cache_type = REGCACHE_NONE,
  178. .reg_format_endian = REGMAP_ENDIAN_LITTLE,
  179. .val_format_endian = REGMAP_ENDIAN_LITTLE,
  180. };
  181. #ifdef CONFIG_PM_SLEEP
  182. static int cpcap_suspend(struct device *dev)
  183. {
  184. struct spi_device *spi = to_spi_device(dev);
  185. disable_irq(spi->irq);
  186. return 0;
  187. }
  188. static int cpcap_resume(struct device *dev)
  189. {
  190. struct spi_device *spi = to_spi_device(dev);
  191. enable_irq(spi->irq);
  192. return 0;
  193. }
  194. #endif
  195. static SIMPLE_DEV_PM_OPS(cpcap_pm, cpcap_suspend, cpcap_resume);
  196. static const struct mfd_cell cpcap_mfd_devices[] = {
  197. {
  198. .name = "cpcap_adc",
  199. .of_compatible = "motorola,mapphone-cpcap-adc",
  200. }, {
  201. .name = "cpcap_battery",
  202. .of_compatible = "motorola,cpcap-battery",
  203. }, {
  204. .name = "cpcap-charger",
  205. .of_compatible = "motorola,mapphone-cpcap-charger",
  206. }, {
  207. .name = "cpcap-regulator",
  208. .of_compatible = "motorola,mapphone-cpcap-regulator",
  209. }, {
  210. .name = "cpcap-rtc",
  211. .of_compatible = "motorola,cpcap-rtc",
  212. }, {
  213. .name = "cpcap-pwrbutton",
  214. .of_compatible = "motorola,cpcap-pwrbutton",
  215. }, {
  216. .name = "cpcap-usb-phy",
  217. .of_compatible = "motorola,mapphone-cpcap-usb-phy",
  218. }, {
  219. .name = "cpcap-led",
  220. .id = 0,
  221. .of_compatible = "motorola,cpcap-led-red",
  222. }, {
  223. .name = "cpcap-led",
  224. .id = 1,
  225. .of_compatible = "motorola,cpcap-led-green",
  226. }, {
  227. .name = "cpcap-led",
  228. .id = 2,
  229. .of_compatible = "motorola,cpcap-led-blue",
  230. }, {
  231. .name = "cpcap-led",
  232. .id = 3,
  233. .of_compatible = "motorola,cpcap-led-adl",
  234. }, {
  235. .name = "cpcap-led",
  236. .id = 4,
  237. .of_compatible = "motorola,cpcap-led-cp",
  238. }, {
  239. .name = "cpcap-codec",
  240. }
  241. };
  242. static int cpcap_probe(struct spi_device *spi)
  243. {
  244. const struct of_device_id *match;
  245. struct cpcap_ddata *cpcap;
  246. int ret;
  247. match = of_match_device(of_match_ptr(cpcap_of_match), &spi->dev);
  248. if (!match)
  249. return -ENODEV;
  250. cpcap = devm_kzalloc(&spi->dev, sizeof(*cpcap), GFP_KERNEL);
  251. if (!cpcap)
  252. return -ENOMEM;
  253. cpcap->spi = spi;
  254. spi_set_drvdata(spi, cpcap);
  255. spi->bits_per_word = 16;
  256. spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
  257. ret = spi_setup(spi);
  258. if (ret)
  259. return ret;
  260. cpcap->regmap_conf = &cpcap_regmap_config;
  261. cpcap->regmap = devm_regmap_init_spi(spi, &cpcap_regmap_config);
  262. if (IS_ERR(cpcap->regmap)) {
  263. ret = PTR_ERR(cpcap->regmap);
  264. dev_err(&cpcap->spi->dev, "Failed to initialize regmap: %d\n",
  265. ret);
  266. return ret;
  267. }
  268. ret = cpcap_check_revision(cpcap);
  269. if (ret) {
  270. dev_err(&cpcap->spi->dev, "Failed to detect CPCAP: %i\n", ret);
  271. return ret;
  272. }
  273. ret = cpcap_init_irq(cpcap);
  274. if (ret)
  275. return ret;
  276. /* Parent SPI controller uses DMA, CPCAP and child devices do not */
  277. spi->dev.coherent_dma_mask = 0;
  278. spi->dev.dma_mask = &spi->dev.coherent_dma_mask;
  279. return devm_mfd_add_devices(&spi->dev, 0, cpcap_mfd_devices,
  280. ARRAY_SIZE(cpcap_mfd_devices), NULL, 0, NULL);
  281. }
  282. static struct spi_driver cpcap_driver = {
  283. .driver = {
  284. .name = "cpcap-core",
  285. .of_match_table = cpcap_of_match,
  286. .pm = &cpcap_pm,
  287. },
  288. .probe = cpcap_probe,
  289. };
  290. module_spi_driver(cpcap_driver);
  291. MODULE_ALIAS("platform:cpcap");
  292. MODULE_DESCRIPTION("CPCAP driver");
  293. MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
  294. MODULE_LICENSE("GPL v2");