mc13xxx-core.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright 2009-2010 Pengutronix
  4. * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
  5. *
  6. * loosely based on an earlier driver that has
  7. * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/of.h>
  11. #include <linux/of_device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mfd/core.h>
  14. #include "mc13xxx.h"
  15. #define MC13XXX_IRQSTAT0 0
  16. #define MC13XXX_IRQMASK0 1
  17. #define MC13XXX_IRQSTAT1 3
  18. #define MC13XXX_IRQMASK1 4
  19. #define MC13XXX_REVISION 7
  20. #define MC13XXX_REVISION_REVMETAL (0x07 << 0)
  21. #define MC13XXX_REVISION_REVFULL (0x03 << 3)
  22. #define MC13XXX_REVISION_ICID (0x07 << 6)
  23. #define MC13XXX_REVISION_FIN (0x03 << 9)
  24. #define MC13XXX_REVISION_FAB (0x03 << 11)
  25. #define MC13XXX_REVISION_ICIDCODE (0x3f << 13)
  26. #define MC34708_REVISION_REVMETAL (0x07 << 0)
  27. #define MC34708_REVISION_REVFULL (0x07 << 3)
  28. #define MC34708_REVISION_FIN (0x07 << 6)
  29. #define MC34708_REVISION_FAB (0x07 << 9)
  30. #define MC13XXX_PWRCTRL 15
  31. #define MC13XXX_PWRCTRL_WDIRESET (1 << 12)
  32. #define MC13XXX_ADC1 44
  33. #define MC13XXX_ADC1_ADEN (1 << 0)
  34. #define MC13XXX_ADC1_RAND (1 << 1)
  35. #define MC13XXX_ADC1_ADSEL (1 << 3)
  36. #define MC13XXX_ADC1_ASC (1 << 20)
  37. #define MC13XXX_ADC1_ADTRIGIGN (1 << 21)
  38. #define MC13XXX_ADC2 45
  39. void mc13xxx_lock(struct mc13xxx *mc13xxx)
  40. {
  41. if (!mutex_trylock(&mc13xxx->lock)) {
  42. dev_dbg(mc13xxx->dev, "wait for %s from %ps\n",
  43. __func__, __builtin_return_address(0));
  44. mutex_lock(&mc13xxx->lock);
  45. }
  46. dev_dbg(mc13xxx->dev, "%s from %ps\n",
  47. __func__, __builtin_return_address(0));
  48. }
  49. EXPORT_SYMBOL(mc13xxx_lock);
  50. void mc13xxx_unlock(struct mc13xxx *mc13xxx)
  51. {
  52. dev_dbg(mc13xxx->dev, "%s from %ps\n",
  53. __func__, __builtin_return_address(0));
  54. mutex_unlock(&mc13xxx->lock);
  55. }
  56. EXPORT_SYMBOL(mc13xxx_unlock);
  57. int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val)
  58. {
  59. int ret;
  60. ret = regmap_read(mc13xxx->regmap, offset, val);
  61. dev_vdbg(mc13xxx->dev, "[0x%02x] -> 0x%06x\n", offset, *val);
  62. return ret;
  63. }
  64. EXPORT_SYMBOL(mc13xxx_reg_read);
  65. int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val)
  66. {
  67. dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val);
  68. if (val >= BIT(24))
  69. return -EINVAL;
  70. return regmap_write(mc13xxx->regmap, offset, val);
  71. }
  72. EXPORT_SYMBOL(mc13xxx_reg_write);
  73. int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
  74. u32 mask, u32 val)
  75. {
  76. BUG_ON(val & ~mask);
  77. dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n",
  78. offset, val, mask);
  79. return regmap_update_bits(mc13xxx->regmap, offset, mask, val);
  80. }
  81. EXPORT_SYMBOL(mc13xxx_reg_rmw);
  82. int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq)
  83. {
  84. int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
  85. disable_irq_nosync(virq);
  86. return 0;
  87. }
  88. EXPORT_SYMBOL(mc13xxx_irq_mask);
  89. int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq)
  90. {
  91. int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
  92. enable_irq(virq);
  93. return 0;
  94. }
  95. EXPORT_SYMBOL(mc13xxx_irq_unmask);
  96. int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
  97. int *enabled, int *pending)
  98. {
  99. int ret;
  100. unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1;
  101. unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1;
  102. u32 irqbit = 1 << (irq < 24 ? irq : irq - 24);
  103. if (irq < 0 || irq >= ARRAY_SIZE(mc13xxx->irqs))
  104. return -EINVAL;
  105. if (enabled) {
  106. u32 mask;
  107. ret = mc13xxx_reg_read(mc13xxx, offmask, &mask);
  108. if (ret)
  109. return ret;
  110. *enabled = mask & irqbit;
  111. }
  112. if (pending) {
  113. u32 stat;
  114. ret = mc13xxx_reg_read(mc13xxx, offstat, &stat);
  115. if (ret)
  116. return ret;
  117. *pending = stat & irqbit;
  118. }
  119. return 0;
  120. }
  121. EXPORT_SYMBOL(mc13xxx_irq_status);
  122. int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
  123. irq_handler_t handler, const char *name, void *dev)
  124. {
  125. int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
  126. return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler,
  127. IRQF_ONESHOT, name, dev);
  128. }
  129. EXPORT_SYMBOL(mc13xxx_irq_request);
  130. int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev)
  131. {
  132. int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
  133. devm_free_irq(mc13xxx->dev, virq, dev);
  134. return 0;
  135. }
  136. EXPORT_SYMBOL(mc13xxx_irq_free);
  137. #define maskval(reg, mask) (((reg) & (mask)) >> __ffs(mask))
  138. static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision)
  139. {
  140. dev_info(mc13xxx->dev, "%s: rev: %d.%d, "
  141. "fin: %d, fab: %d, icid: %d/%d\n",
  142. mc13xxx->variant->name,
  143. maskval(revision, MC13XXX_REVISION_REVFULL),
  144. maskval(revision, MC13XXX_REVISION_REVMETAL),
  145. maskval(revision, MC13XXX_REVISION_FIN),
  146. maskval(revision, MC13XXX_REVISION_FAB),
  147. maskval(revision, MC13XXX_REVISION_ICID),
  148. maskval(revision, MC13XXX_REVISION_ICIDCODE));
  149. }
  150. static void mc34708_print_revision(struct mc13xxx *mc13xxx, u32 revision)
  151. {
  152. dev_info(mc13xxx->dev, "%s: rev %d.%d, fin: %d, fab: %d\n",
  153. mc13xxx->variant->name,
  154. maskval(revision, MC34708_REVISION_REVFULL),
  155. maskval(revision, MC34708_REVISION_REVMETAL),
  156. maskval(revision, MC34708_REVISION_FIN),
  157. maskval(revision, MC34708_REVISION_FAB));
  158. }
  159. /* These are only exported for mc13xxx-i2c and mc13xxx-spi */
  160. struct mc13xxx_variant mc13xxx_variant_mc13783 = {
  161. .name = "mc13783",
  162. .print_revision = mc13xxx_print_revision,
  163. };
  164. EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13783);
  165. struct mc13xxx_variant mc13xxx_variant_mc13892 = {
  166. .name = "mc13892",
  167. .print_revision = mc13xxx_print_revision,
  168. };
  169. EXPORT_SYMBOL_GPL(mc13xxx_variant_mc13892);
  170. struct mc13xxx_variant mc13xxx_variant_mc34708 = {
  171. .name = "mc34708",
  172. .print_revision = mc34708_print_revision,
  173. };
  174. EXPORT_SYMBOL_GPL(mc13xxx_variant_mc34708);
  175. static const char *mc13xxx_get_chipname(struct mc13xxx *mc13xxx)
  176. {
  177. return mc13xxx->variant->name;
  178. }
  179. int mc13xxx_get_flags(struct mc13xxx *mc13xxx)
  180. {
  181. return mc13xxx->flags;
  182. }
  183. EXPORT_SYMBOL(mc13xxx_get_flags);
  184. #define MC13XXX_ADC1_CHAN0_SHIFT 5
  185. #define MC13XXX_ADC1_CHAN1_SHIFT 8
  186. #define MC13783_ADC1_ATO_SHIFT 11
  187. #define MC13783_ADC1_ATOX (1 << 19)
  188. struct mc13xxx_adcdone_data {
  189. struct mc13xxx *mc13xxx;
  190. struct completion done;
  191. };
  192. static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data)
  193. {
  194. struct mc13xxx_adcdone_data *adcdone_data = data;
  195. complete_all(&adcdone_data->done);
  196. return IRQ_HANDLED;
  197. }
  198. #define MC13XXX_ADC_WORKING (1 << 0)
  199. int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,
  200. unsigned int channel, u8 ato, bool atox,
  201. unsigned int *sample)
  202. {
  203. u32 adc0, adc1, old_adc0;
  204. int i, ret;
  205. struct mc13xxx_adcdone_data adcdone_data = {
  206. .mc13xxx = mc13xxx,
  207. };
  208. init_completion(&adcdone_data.done);
  209. dev_dbg(mc13xxx->dev, "%s\n", __func__);
  210. mc13xxx_lock(mc13xxx);
  211. if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) {
  212. ret = -EBUSY;
  213. goto out;
  214. }
  215. mc13xxx->adcflags |= MC13XXX_ADC_WORKING;
  216. ret = mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0);
  217. if (ret)
  218. goto out;
  219. adc0 = MC13XXX_ADC0_ADINC1 | MC13XXX_ADC0_ADINC2 |
  220. MC13XXX_ADC0_CHRGRAWDIV;
  221. adc1 = MC13XXX_ADC1_ADEN | MC13XXX_ADC1_ADTRIGIGN | MC13XXX_ADC1_ASC;
  222. /*
  223. * Channels mapped through ADIN7:
  224. * 7 - General purpose ADIN7
  225. * 16 - UID
  226. * 17 - Die temperature
  227. */
  228. if (channel > 7 && channel < 16) {
  229. adc1 |= MC13XXX_ADC1_ADSEL;
  230. } else if (channel == 16) {
  231. adc0 |= MC13XXX_ADC0_ADIN7SEL_UID;
  232. channel = 7;
  233. } else if (channel == 17) {
  234. adc0 |= MC13XXX_ADC0_ADIN7SEL_DIE;
  235. channel = 7;
  236. }
  237. switch (mode) {
  238. case MC13XXX_ADC_MODE_TS:
  239. adc0 |= MC13XXX_ADC0_ADREFEN | MC13XXX_ADC0_TSMOD0 |
  240. MC13XXX_ADC0_TSMOD1;
  241. adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
  242. break;
  243. case MC13XXX_ADC_MODE_SINGLE_CHAN:
  244. adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
  245. adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT;
  246. adc1 |= MC13XXX_ADC1_RAND;
  247. break;
  248. case MC13XXX_ADC_MODE_MULT_CHAN:
  249. adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
  250. adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
  251. break;
  252. default:
  253. mc13xxx_unlock(mc13xxx);
  254. return -EINVAL;
  255. }
  256. adc1 |= ato << MC13783_ADC1_ATO_SHIFT;
  257. if (atox)
  258. adc1 |= MC13783_ADC1_ATOX;
  259. dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__);
  260. ret = mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE,
  261. mc13xxx_handler_adcdone, __func__, &adcdone_data);
  262. if (ret)
  263. goto out;
  264. mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0);
  265. mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1);
  266. mc13xxx_unlock(mc13xxx);
  267. ret = wait_for_completion_interruptible_timeout(&adcdone_data.done, HZ);
  268. if (!ret)
  269. ret = -ETIMEDOUT;
  270. mc13xxx_lock(mc13xxx);
  271. mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data);
  272. if (ret > 0)
  273. for (i = 0; i < 4; ++i) {
  274. ret = mc13xxx_reg_read(mc13xxx,
  275. MC13XXX_ADC2, &sample[i]);
  276. if (ret)
  277. break;
  278. }
  279. if (mode == MC13XXX_ADC_MODE_TS)
  280. /* restore TSMOD */
  281. mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0);
  282. mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING;
  283. out:
  284. mc13xxx_unlock(mc13xxx);
  285. return ret;
  286. }
  287. EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion);
  288. static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx,
  289. const char *format, void *pdata, size_t pdata_size)
  290. {
  291. char buf[30];
  292. const char *name = mc13xxx_get_chipname(mc13xxx);
  293. struct mfd_cell cell = {
  294. .platform_data = pdata,
  295. .pdata_size = pdata_size,
  296. };
  297. /* there is no asnprintf in the kernel :-( */
  298. if (snprintf(buf, sizeof(buf), format, name) > sizeof(buf))
  299. return -E2BIG;
  300. cell.name = kmemdup(buf, strlen(buf) + 1, GFP_KERNEL);
  301. if (!cell.name)
  302. return -ENOMEM;
  303. return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0,
  304. regmap_irq_get_domain(mc13xxx->irq_data));
  305. }
  306. static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format)
  307. {
  308. return mc13xxx_add_subdevice_pdata(mc13xxx, format, NULL, 0);
  309. }
  310. #ifdef CONFIG_OF
  311. static int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
  312. {
  313. struct device_node *np = mc13xxx->dev->of_node;
  314. if (!np)
  315. return -ENODEV;
  316. if (of_property_read_bool(np, "fsl,mc13xxx-uses-adc"))
  317. mc13xxx->flags |= MC13XXX_USE_ADC;
  318. if (of_property_read_bool(np, "fsl,mc13xxx-uses-codec"))
  319. mc13xxx->flags |= MC13XXX_USE_CODEC;
  320. if (of_property_read_bool(np, "fsl,mc13xxx-uses-rtc"))
  321. mc13xxx->flags |= MC13XXX_USE_RTC;
  322. if (of_property_read_bool(np, "fsl,mc13xxx-uses-touch"))
  323. mc13xxx->flags |= MC13XXX_USE_TOUCHSCREEN;
  324. return 0;
  325. }
  326. #else
  327. static inline int mc13xxx_probe_flags_dt(struct mc13xxx *mc13xxx)
  328. {
  329. return -ENODEV;
  330. }
  331. #endif
  332. int mc13xxx_common_init(struct device *dev)
  333. {
  334. struct mc13xxx_platform_data *pdata = dev_get_platdata(dev);
  335. struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
  336. u32 revision;
  337. int i, ret;
  338. mc13xxx->dev = dev;
  339. ret = mc13xxx_reg_read(mc13xxx, MC13XXX_REVISION, &revision);
  340. if (ret)
  341. return ret;
  342. mc13xxx->variant->print_revision(mc13xxx, revision);
  343. ret = mc13xxx_reg_rmw(mc13xxx, MC13XXX_PWRCTRL,
  344. MC13XXX_PWRCTRL_WDIRESET, MC13XXX_PWRCTRL_WDIRESET);
  345. if (ret)
  346. return ret;
  347. for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) {
  348. mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG;
  349. mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG);
  350. }
  351. mc13xxx->irq_chip.name = dev_name(dev);
  352. mc13xxx->irq_chip.status_base = MC13XXX_IRQSTAT0;
  353. mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0;
  354. mc13xxx->irq_chip.ack_base = MC13XXX_IRQSTAT0;
  355. mc13xxx->irq_chip.irq_reg_stride = MC13XXX_IRQSTAT1 - MC13XXX_IRQSTAT0;
  356. mc13xxx->irq_chip.init_ack_masked = true;
  357. mc13xxx->irq_chip.use_ack = true;
  358. mc13xxx->irq_chip.num_regs = MC13XXX_IRQ_REG_CNT;
  359. mc13xxx->irq_chip.irqs = mc13xxx->irqs;
  360. mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs);
  361. ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT,
  362. 0, &mc13xxx->irq_chip, &mc13xxx->irq_data);
  363. if (ret)
  364. return ret;
  365. mutex_init(&mc13xxx->lock);
  366. if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata)
  367. mc13xxx->flags = pdata->flags;
  368. if (pdata) {
  369. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator",
  370. &pdata->regulators, sizeof(pdata->regulators));
  371. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-led",
  372. pdata->leds, sizeof(*pdata->leds));
  373. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-pwrbutton",
  374. pdata->buttons, sizeof(*pdata->buttons));
  375. if (mc13xxx->flags & MC13XXX_USE_CODEC)
  376. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-codec",
  377. pdata->codec, sizeof(*pdata->codec));
  378. if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
  379. mc13xxx_add_subdevice_pdata(mc13xxx, "%s-ts",
  380. &pdata->touch, sizeof(pdata->touch));
  381. } else {
  382. mc13xxx_add_subdevice(mc13xxx, "%s-regulator");
  383. mc13xxx_add_subdevice(mc13xxx, "%s-led");
  384. mc13xxx_add_subdevice(mc13xxx, "%s-pwrbutton");
  385. if (mc13xxx->flags & MC13XXX_USE_CODEC)
  386. mc13xxx_add_subdevice(mc13xxx, "%s-codec");
  387. if (mc13xxx->flags & MC13XXX_USE_TOUCHSCREEN)
  388. mc13xxx_add_subdevice(mc13xxx, "%s-ts");
  389. }
  390. if (mc13xxx->flags & MC13XXX_USE_ADC)
  391. mc13xxx_add_subdevice(mc13xxx, "%s-adc");
  392. if (mc13xxx->flags & MC13XXX_USE_RTC)
  393. mc13xxx_add_subdevice(mc13xxx, "%s-rtc");
  394. return 0;
  395. }
  396. EXPORT_SYMBOL_GPL(mc13xxx_common_init);
  397. int mc13xxx_common_exit(struct device *dev)
  398. {
  399. struct mc13xxx *mc13xxx = dev_get_drvdata(dev);
  400. mfd_remove_devices(dev);
  401. regmap_del_irq_chip(mc13xxx->irq, mc13xxx->irq_data);
  402. mutex_destroy(&mc13xxx->lock);
  403. return 0;
  404. }
  405. EXPORT_SYMBOL_GPL(mc13xxx_common_exit);
  406. MODULE_DESCRIPTION("Core driver for Freescale MC13XXX PMIC");
  407. MODULE_AUTHOR("Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>");
  408. MODULE_LICENSE("GPL v2");