intel-lpss-pci.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Intel LPSS PCI support.
  4. *
  5. * Copyright (C) 2015, Intel Corporation
  6. *
  7. * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  8. * Mika Westerberg <mika.westerberg@linux.intel.com>
  9. */
  10. #include <linux/ioport.h>
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include <linux/pm_runtime.h>
  15. #include <linux/property.h>
  16. #include "intel-lpss.h"
  17. static int intel_lpss_pci_probe(struct pci_dev *pdev,
  18. const struct pci_device_id *id)
  19. {
  20. struct intel_lpss_platform_info *info;
  21. int ret;
  22. ret = pcim_enable_device(pdev);
  23. if (ret)
  24. return ret;
  25. info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
  26. GFP_KERNEL);
  27. if (!info)
  28. return -ENOMEM;
  29. info->mem = &pdev->resource[0];
  30. info->irq = pdev->irq;
  31. pdev->d3cold_delay = 0;
  32. /* Probably it is enough to set this for iDMA capable devices only */
  33. pci_set_master(pdev);
  34. pci_try_set_mwi(pdev);
  35. ret = intel_lpss_probe(&pdev->dev, info);
  36. if (ret)
  37. return ret;
  38. pm_runtime_put(&pdev->dev);
  39. pm_runtime_allow(&pdev->dev);
  40. return 0;
  41. }
  42. static void intel_lpss_pci_remove(struct pci_dev *pdev)
  43. {
  44. pm_runtime_forbid(&pdev->dev);
  45. pm_runtime_get_sync(&pdev->dev);
  46. intel_lpss_remove(&pdev->dev);
  47. }
  48. static INTEL_LPSS_PM_OPS(intel_lpss_pci_pm_ops);
  49. static const struct intel_lpss_platform_info spt_info = {
  50. .clk_rate = 120000000,
  51. };
  52. static struct property_entry spt_i2c_properties[] = {
  53. PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
  54. { },
  55. };
  56. static const struct intel_lpss_platform_info spt_i2c_info = {
  57. .clk_rate = 120000000,
  58. .properties = spt_i2c_properties,
  59. };
  60. static struct property_entry uart_properties[] = {
  61. PROPERTY_ENTRY_U32("reg-io-width", 4),
  62. PROPERTY_ENTRY_U32("reg-shift", 2),
  63. PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
  64. { },
  65. };
  66. static const struct intel_lpss_platform_info spt_uart_info = {
  67. .clk_rate = 120000000,
  68. .clk_con_id = "baudclk",
  69. .properties = uart_properties,
  70. };
  71. static const struct intel_lpss_platform_info bxt_info = {
  72. .clk_rate = 100000000,
  73. };
  74. static const struct intel_lpss_platform_info bxt_uart_info = {
  75. .clk_rate = 100000000,
  76. .clk_con_id = "baudclk",
  77. .properties = uart_properties,
  78. };
  79. static struct property_entry bxt_i2c_properties[] = {
  80. PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
  81. PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
  82. PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
  83. { },
  84. };
  85. static const struct intel_lpss_platform_info bxt_i2c_info = {
  86. .clk_rate = 133000000,
  87. .properties = bxt_i2c_properties,
  88. };
  89. static struct property_entry apl_i2c_properties[] = {
  90. PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 207),
  91. PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
  92. PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
  93. { },
  94. };
  95. static const struct intel_lpss_platform_info apl_i2c_info = {
  96. .clk_rate = 133000000,
  97. .properties = apl_i2c_properties,
  98. };
  99. static struct property_entry glk_i2c_properties[] = {
  100. PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 313),
  101. PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
  102. PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 290),
  103. { },
  104. };
  105. static const struct intel_lpss_platform_info glk_i2c_info = {
  106. .clk_rate = 133000000,
  107. .properties = glk_i2c_properties,
  108. };
  109. static const struct intel_lpss_platform_info cnl_i2c_info = {
  110. .clk_rate = 216000000,
  111. .properties = spt_i2c_properties,
  112. };
  113. static const struct intel_lpss_platform_info ehl_i2c_info = {
  114. .clk_rate = 100000000,
  115. .properties = bxt_i2c_properties,
  116. };
  117. static const struct pci_device_id intel_lpss_pci_ids[] = {
  118. /* CML-LP */
  119. { PCI_VDEVICE(INTEL, 0x02a8), (kernel_ulong_t)&spt_uart_info },
  120. { PCI_VDEVICE(INTEL, 0x02a9), (kernel_ulong_t)&spt_uart_info },
  121. { PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)&spt_info },
  122. { PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)&spt_info },
  123. { PCI_VDEVICE(INTEL, 0x02c5), (kernel_ulong_t)&cnl_i2c_info },
  124. { PCI_VDEVICE(INTEL, 0x02c6), (kernel_ulong_t)&cnl_i2c_info },
  125. { PCI_VDEVICE(INTEL, 0x02c7), (kernel_ulong_t)&spt_uart_info },
  126. { PCI_VDEVICE(INTEL, 0x02e8), (kernel_ulong_t)&cnl_i2c_info },
  127. { PCI_VDEVICE(INTEL, 0x02e9), (kernel_ulong_t)&cnl_i2c_info },
  128. { PCI_VDEVICE(INTEL, 0x02ea), (kernel_ulong_t)&cnl_i2c_info },
  129. { PCI_VDEVICE(INTEL, 0x02eb), (kernel_ulong_t)&cnl_i2c_info },
  130. { PCI_VDEVICE(INTEL, 0x02fb), (kernel_ulong_t)&spt_info },
  131. /* CML-H */
  132. { PCI_VDEVICE(INTEL, 0x06a8), (kernel_ulong_t)&spt_uart_info },
  133. { PCI_VDEVICE(INTEL, 0x06a9), (kernel_ulong_t)&spt_uart_info },
  134. { PCI_VDEVICE(INTEL, 0x06aa), (kernel_ulong_t)&spt_info },
  135. { PCI_VDEVICE(INTEL, 0x06ab), (kernel_ulong_t)&spt_info },
  136. { PCI_VDEVICE(INTEL, 0x06c7), (kernel_ulong_t)&spt_uart_info },
  137. { PCI_VDEVICE(INTEL, 0x06e8), (kernel_ulong_t)&cnl_i2c_info },
  138. { PCI_VDEVICE(INTEL, 0x06e9), (kernel_ulong_t)&cnl_i2c_info },
  139. { PCI_VDEVICE(INTEL, 0x06ea), (kernel_ulong_t)&cnl_i2c_info },
  140. { PCI_VDEVICE(INTEL, 0x06eb), (kernel_ulong_t)&cnl_i2c_info },
  141. { PCI_VDEVICE(INTEL, 0x06fb), (kernel_ulong_t)&spt_info },
  142. /* BXT A-Step */
  143. { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
  144. { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info },
  145. { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info },
  146. { PCI_VDEVICE(INTEL, 0x0ab2), (kernel_ulong_t)&bxt_i2c_info },
  147. { PCI_VDEVICE(INTEL, 0x0ab4), (kernel_ulong_t)&bxt_i2c_info },
  148. { PCI_VDEVICE(INTEL, 0x0ab6), (kernel_ulong_t)&bxt_i2c_info },
  149. { PCI_VDEVICE(INTEL, 0x0ab8), (kernel_ulong_t)&bxt_i2c_info },
  150. { PCI_VDEVICE(INTEL, 0x0aba), (kernel_ulong_t)&bxt_i2c_info },
  151. { PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info },
  152. { PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info },
  153. { PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info },
  154. { PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info },
  155. { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info },
  156. { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info },
  157. { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info },
  158. /* BXT B-Step */
  159. { PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info },
  160. { PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info },
  161. { PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info },
  162. { PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info },
  163. { PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info },
  164. { PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info },
  165. { PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info },
  166. { PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info },
  167. { PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info },
  168. { PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info },
  169. { PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info },
  170. { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info },
  171. { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info },
  172. { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info },
  173. { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info },
  174. /* EBG */
  175. { PCI_VDEVICE(INTEL, 0x1bad), (kernel_ulong_t)&bxt_uart_info },
  176. { PCI_VDEVICE(INTEL, 0x1bae), (kernel_ulong_t)&bxt_uart_info },
  177. /* GLK */
  178. { PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&glk_i2c_info },
  179. { PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&glk_i2c_info },
  180. { PCI_VDEVICE(INTEL, 0x31b0), (kernel_ulong_t)&glk_i2c_info },
  181. { PCI_VDEVICE(INTEL, 0x31b2), (kernel_ulong_t)&glk_i2c_info },
  182. { PCI_VDEVICE(INTEL, 0x31b4), (kernel_ulong_t)&glk_i2c_info },
  183. { PCI_VDEVICE(INTEL, 0x31b6), (kernel_ulong_t)&glk_i2c_info },
  184. { PCI_VDEVICE(INTEL, 0x31b8), (kernel_ulong_t)&glk_i2c_info },
  185. { PCI_VDEVICE(INTEL, 0x31ba), (kernel_ulong_t)&glk_i2c_info },
  186. { PCI_VDEVICE(INTEL, 0x31bc), (kernel_ulong_t)&bxt_uart_info },
  187. { PCI_VDEVICE(INTEL, 0x31be), (kernel_ulong_t)&bxt_uart_info },
  188. { PCI_VDEVICE(INTEL, 0x31c0), (kernel_ulong_t)&bxt_uart_info },
  189. { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info },
  190. { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info },
  191. { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info },
  192. { PCI_VDEVICE(INTEL, 0x31ee), (kernel_ulong_t)&bxt_uart_info },
  193. /* ICL-LP */
  194. { PCI_VDEVICE(INTEL, 0x34a8), (kernel_ulong_t)&spt_uart_info },
  195. { PCI_VDEVICE(INTEL, 0x34a9), (kernel_ulong_t)&spt_uart_info },
  196. { PCI_VDEVICE(INTEL, 0x34aa), (kernel_ulong_t)&spt_info },
  197. { PCI_VDEVICE(INTEL, 0x34ab), (kernel_ulong_t)&spt_info },
  198. { PCI_VDEVICE(INTEL, 0x34c5), (kernel_ulong_t)&bxt_i2c_info },
  199. { PCI_VDEVICE(INTEL, 0x34c6), (kernel_ulong_t)&bxt_i2c_info },
  200. { PCI_VDEVICE(INTEL, 0x34c7), (kernel_ulong_t)&spt_uart_info },
  201. { PCI_VDEVICE(INTEL, 0x34e8), (kernel_ulong_t)&bxt_i2c_info },
  202. { PCI_VDEVICE(INTEL, 0x34e9), (kernel_ulong_t)&bxt_i2c_info },
  203. { PCI_VDEVICE(INTEL, 0x34ea), (kernel_ulong_t)&bxt_i2c_info },
  204. { PCI_VDEVICE(INTEL, 0x34eb), (kernel_ulong_t)&bxt_i2c_info },
  205. { PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&spt_info },
  206. /* TGL-H */
  207. { PCI_VDEVICE(INTEL, 0x43a7), (kernel_ulong_t)&bxt_uart_info },
  208. { PCI_VDEVICE(INTEL, 0x43a8), (kernel_ulong_t)&bxt_uart_info },
  209. { PCI_VDEVICE(INTEL, 0x43a9), (kernel_ulong_t)&bxt_uart_info },
  210. { PCI_VDEVICE(INTEL, 0x43aa), (kernel_ulong_t)&bxt_info },
  211. { PCI_VDEVICE(INTEL, 0x43ab), (kernel_ulong_t)&bxt_info },
  212. { PCI_VDEVICE(INTEL, 0x43ad), (kernel_ulong_t)&bxt_i2c_info },
  213. { PCI_VDEVICE(INTEL, 0x43ae), (kernel_ulong_t)&bxt_i2c_info },
  214. { PCI_VDEVICE(INTEL, 0x43d8), (kernel_ulong_t)&bxt_i2c_info },
  215. { PCI_VDEVICE(INTEL, 0x43da), (kernel_ulong_t)&bxt_uart_info },
  216. { PCI_VDEVICE(INTEL, 0x43e8), (kernel_ulong_t)&bxt_i2c_info },
  217. { PCI_VDEVICE(INTEL, 0x43e9), (kernel_ulong_t)&bxt_i2c_info },
  218. { PCI_VDEVICE(INTEL, 0x43ea), (kernel_ulong_t)&bxt_i2c_info },
  219. { PCI_VDEVICE(INTEL, 0x43eb), (kernel_ulong_t)&bxt_i2c_info },
  220. { PCI_VDEVICE(INTEL, 0x43fb), (kernel_ulong_t)&bxt_info },
  221. { PCI_VDEVICE(INTEL, 0x43fd), (kernel_ulong_t)&bxt_info },
  222. /* EHL */
  223. { PCI_VDEVICE(INTEL, 0x4b28), (kernel_ulong_t)&bxt_uart_info },
  224. { PCI_VDEVICE(INTEL, 0x4b29), (kernel_ulong_t)&bxt_uart_info },
  225. { PCI_VDEVICE(INTEL, 0x4b2a), (kernel_ulong_t)&bxt_info },
  226. { PCI_VDEVICE(INTEL, 0x4b2b), (kernel_ulong_t)&bxt_info },
  227. { PCI_VDEVICE(INTEL, 0x4b37), (kernel_ulong_t)&bxt_info },
  228. { PCI_VDEVICE(INTEL, 0x4b44), (kernel_ulong_t)&ehl_i2c_info },
  229. { PCI_VDEVICE(INTEL, 0x4b45), (kernel_ulong_t)&ehl_i2c_info },
  230. { PCI_VDEVICE(INTEL, 0x4b4b), (kernel_ulong_t)&ehl_i2c_info },
  231. { PCI_VDEVICE(INTEL, 0x4b4c), (kernel_ulong_t)&ehl_i2c_info },
  232. { PCI_VDEVICE(INTEL, 0x4b4d), (kernel_ulong_t)&bxt_uart_info },
  233. { PCI_VDEVICE(INTEL, 0x4b78), (kernel_ulong_t)&ehl_i2c_info },
  234. { PCI_VDEVICE(INTEL, 0x4b79), (kernel_ulong_t)&ehl_i2c_info },
  235. { PCI_VDEVICE(INTEL, 0x4b7a), (kernel_ulong_t)&ehl_i2c_info },
  236. { PCI_VDEVICE(INTEL, 0x4b7b), (kernel_ulong_t)&ehl_i2c_info },
  237. /* JSL */
  238. { PCI_VDEVICE(INTEL, 0x4da8), (kernel_ulong_t)&spt_uart_info },
  239. { PCI_VDEVICE(INTEL, 0x4da9), (kernel_ulong_t)&spt_uart_info },
  240. { PCI_VDEVICE(INTEL, 0x4daa), (kernel_ulong_t)&spt_info },
  241. { PCI_VDEVICE(INTEL, 0x4dab), (kernel_ulong_t)&spt_info },
  242. { PCI_VDEVICE(INTEL, 0x4dc5), (kernel_ulong_t)&bxt_i2c_info },
  243. { PCI_VDEVICE(INTEL, 0x4dc6), (kernel_ulong_t)&bxt_i2c_info },
  244. { PCI_VDEVICE(INTEL, 0x4dc7), (kernel_ulong_t)&spt_uart_info },
  245. { PCI_VDEVICE(INTEL, 0x4de8), (kernel_ulong_t)&bxt_i2c_info },
  246. { PCI_VDEVICE(INTEL, 0x4de9), (kernel_ulong_t)&bxt_i2c_info },
  247. { PCI_VDEVICE(INTEL, 0x4dea), (kernel_ulong_t)&bxt_i2c_info },
  248. { PCI_VDEVICE(INTEL, 0x4deb), (kernel_ulong_t)&bxt_i2c_info },
  249. { PCI_VDEVICE(INTEL, 0x4dfb), (kernel_ulong_t)&spt_info },
  250. /* APL */
  251. { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info },
  252. { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info },
  253. { PCI_VDEVICE(INTEL, 0x5ab0), (kernel_ulong_t)&apl_i2c_info },
  254. { PCI_VDEVICE(INTEL, 0x5ab2), (kernel_ulong_t)&apl_i2c_info },
  255. { PCI_VDEVICE(INTEL, 0x5ab4), (kernel_ulong_t)&apl_i2c_info },
  256. { PCI_VDEVICE(INTEL, 0x5ab6), (kernel_ulong_t)&apl_i2c_info },
  257. { PCI_VDEVICE(INTEL, 0x5ab8), (kernel_ulong_t)&apl_i2c_info },
  258. { PCI_VDEVICE(INTEL, 0x5aba), (kernel_ulong_t)&apl_i2c_info },
  259. { PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info },
  260. { PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info },
  261. { PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info },
  262. { PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info },
  263. { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info },
  264. { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info },
  265. { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
  266. /* LKF */
  267. { PCI_VDEVICE(INTEL, 0x98a8), (kernel_ulong_t)&bxt_uart_info },
  268. { PCI_VDEVICE(INTEL, 0x98a9), (kernel_ulong_t)&bxt_uart_info },
  269. { PCI_VDEVICE(INTEL, 0x98c7), (kernel_ulong_t)&bxt_uart_info },
  270. /* SPT-LP */
  271. { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info },
  272. { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info },
  273. { PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info },
  274. { PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info },
  275. { PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info },
  276. { PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info },
  277. { PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info },
  278. { PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_i2c_info },
  279. { PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info },
  280. { PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info },
  281. { PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info },
  282. /* CNL-LP */
  283. { PCI_VDEVICE(INTEL, 0x9da8), (kernel_ulong_t)&spt_uart_info },
  284. { PCI_VDEVICE(INTEL, 0x9da9), (kernel_ulong_t)&spt_uart_info },
  285. { PCI_VDEVICE(INTEL, 0x9daa), (kernel_ulong_t)&spt_info },
  286. { PCI_VDEVICE(INTEL, 0x9dab), (kernel_ulong_t)&spt_info },
  287. { PCI_VDEVICE(INTEL, 0x9dc5), (kernel_ulong_t)&cnl_i2c_info },
  288. { PCI_VDEVICE(INTEL, 0x9dc6), (kernel_ulong_t)&cnl_i2c_info },
  289. { PCI_VDEVICE(INTEL, 0x9dc7), (kernel_ulong_t)&spt_uart_info },
  290. { PCI_VDEVICE(INTEL, 0x9de8), (kernel_ulong_t)&cnl_i2c_info },
  291. { PCI_VDEVICE(INTEL, 0x9de9), (kernel_ulong_t)&cnl_i2c_info },
  292. { PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&cnl_i2c_info },
  293. { PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&cnl_i2c_info },
  294. { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info },
  295. /* TGL-LP */
  296. { PCI_VDEVICE(INTEL, 0xa0a8), (kernel_ulong_t)&bxt_uart_info },
  297. { PCI_VDEVICE(INTEL, 0xa0a9), (kernel_ulong_t)&bxt_uart_info },
  298. { PCI_VDEVICE(INTEL, 0xa0aa), (kernel_ulong_t)&spt_info },
  299. { PCI_VDEVICE(INTEL, 0xa0ab), (kernel_ulong_t)&spt_info },
  300. { PCI_VDEVICE(INTEL, 0xa0c5), (kernel_ulong_t)&spt_i2c_info },
  301. { PCI_VDEVICE(INTEL, 0xa0c6), (kernel_ulong_t)&spt_i2c_info },
  302. { PCI_VDEVICE(INTEL, 0xa0c7), (kernel_ulong_t)&bxt_uart_info },
  303. { PCI_VDEVICE(INTEL, 0xa0d8), (kernel_ulong_t)&spt_i2c_info },
  304. { PCI_VDEVICE(INTEL, 0xa0d9), (kernel_ulong_t)&spt_i2c_info },
  305. { PCI_VDEVICE(INTEL, 0xa0da), (kernel_ulong_t)&bxt_uart_info },
  306. { PCI_VDEVICE(INTEL, 0xa0db), (kernel_ulong_t)&bxt_uart_info },
  307. { PCI_VDEVICE(INTEL, 0xa0dc), (kernel_ulong_t)&bxt_uart_info },
  308. { PCI_VDEVICE(INTEL, 0xa0dd), (kernel_ulong_t)&bxt_uart_info },
  309. { PCI_VDEVICE(INTEL, 0xa0de), (kernel_ulong_t)&spt_info },
  310. { PCI_VDEVICE(INTEL, 0xa0df), (kernel_ulong_t)&spt_info },
  311. { PCI_VDEVICE(INTEL, 0xa0e8), (kernel_ulong_t)&spt_i2c_info },
  312. { PCI_VDEVICE(INTEL, 0xa0e9), (kernel_ulong_t)&spt_i2c_info },
  313. { PCI_VDEVICE(INTEL, 0xa0ea), (kernel_ulong_t)&spt_i2c_info },
  314. { PCI_VDEVICE(INTEL, 0xa0eb), (kernel_ulong_t)&spt_i2c_info },
  315. { PCI_VDEVICE(INTEL, 0xa0fb), (kernel_ulong_t)&spt_info },
  316. { PCI_VDEVICE(INTEL, 0xa0fd), (kernel_ulong_t)&spt_info },
  317. { PCI_VDEVICE(INTEL, 0xa0fe), (kernel_ulong_t)&spt_info },
  318. /* SPT-H */
  319. { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info },
  320. { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info },
  321. { PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info },
  322. { PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info },
  323. { PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info },
  324. { PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info },
  325. { PCI_VDEVICE(INTEL, 0xa162), (kernel_ulong_t)&spt_i2c_info },
  326. { PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info },
  327. /* KBL-H */
  328. { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&spt_uart_info },
  329. { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&spt_uart_info },
  330. { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&spt_info },
  331. { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&spt_info },
  332. { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&spt_i2c_info },
  333. { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&spt_i2c_info },
  334. { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&spt_i2c_info },
  335. { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&spt_i2c_info },
  336. { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&spt_uart_info },
  337. /* CNL-H */
  338. { PCI_VDEVICE(INTEL, 0xa328), (kernel_ulong_t)&spt_uart_info },
  339. { PCI_VDEVICE(INTEL, 0xa329), (kernel_ulong_t)&spt_uart_info },
  340. { PCI_VDEVICE(INTEL, 0xa32a), (kernel_ulong_t)&spt_info },
  341. { PCI_VDEVICE(INTEL, 0xa32b), (kernel_ulong_t)&spt_info },
  342. { PCI_VDEVICE(INTEL, 0xa347), (kernel_ulong_t)&spt_uart_info },
  343. { PCI_VDEVICE(INTEL, 0xa368), (kernel_ulong_t)&cnl_i2c_info },
  344. { PCI_VDEVICE(INTEL, 0xa369), (kernel_ulong_t)&cnl_i2c_info },
  345. { PCI_VDEVICE(INTEL, 0xa36a), (kernel_ulong_t)&cnl_i2c_info },
  346. { PCI_VDEVICE(INTEL, 0xa36b), (kernel_ulong_t)&cnl_i2c_info },
  347. { PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&spt_info },
  348. /* CML-V */
  349. { PCI_VDEVICE(INTEL, 0xa3a7), (kernel_ulong_t)&spt_uart_info },
  350. { PCI_VDEVICE(INTEL, 0xa3a8), (kernel_ulong_t)&spt_uart_info },
  351. { PCI_VDEVICE(INTEL, 0xa3a9), (kernel_ulong_t)&spt_info },
  352. { PCI_VDEVICE(INTEL, 0xa3aa), (kernel_ulong_t)&spt_info },
  353. { PCI_VDEVICE(INTEL, 0xa3e0), (kernel_ulong_t)&spt_i2c_info },
  354. { PCI_VDEVICE(INTEL, 0xa3e1), (kernel_ulong_t)&spt_i2c_info },
  355. { PCI_VDEVICE(INTEL, 0xa3e2), (kernel_ulong_t)&spt_i2c_info },
  356. { PCI_VDEVICE(INTEL, 0xa3e3), (kernel_ulong_t)&spt_i2c_info },
  357. { PCI_VDEVICE(INTEL, 0xa3e6), (kernel_ulong_t)&spt_uart_info },
  358. { }
  359. };
  360. MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);
  361. static struct pci_driver intel_lpss_pci_driver = {
  362. .name = "intel-lpss",
  363. .id_table = intel_lpss_pci_ids,
  364. .probe = intel_lpss_pci_probe,
  365. .remove = intel_lpss_pci_remove,
  366. .driver = {
  367. .pm = &intel_lpss_pci_pm_ops,
  368. },
  369. };
  370. module_pci_driver(intel_lpss_pci_driver);
  371. MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
  372. MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
  373. MODULE_DESCRIPTION("Intel LPSS PCI driver");
  374. MODULE_LICENSE("GPL v2");