arizona-core.c 35 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Arizona core driver
  4. *
  5. * Copyright 2012 Wolfson Microelectronics plc
  6. *
  7. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/delay.h>
  11. #include <linux/err.h>
  12. #include <linux/gpio/consumer.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/mfd/core.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/of_device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/regmap.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/ktime.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/mfd/arizona/core.h>
  26. #include <linux/mfd/arizona/registers.h>
  27. #include "arizona.h"
  28. static const char * const wm5102_core_supplies[] = {
  29. "AVDD",
  30. "DBVDD1",
  31. };
  32. int arizona_clk32k_enable(struct arizona *arizona)
  33. {
  34. int ret = 0;
  35. mutex_lock(&arizona->clk_lock);
  36. arizona->clk32k_ref++;
  37. if (arizona->clk32k_ref == 1) {
  38. switch (arizona->pdata.clk32k_src) {
  39. case ARIZONA_32KZ_MCLK1:
  40. ret = pm_runtime_get_sync(arizona->dev);
  41. if (ret != 0)
  42. goto err_ref;
  43. ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]);
  44. if (ret != 0) {
  45. pm_runtime_put_sync(arizona->dev);
  46. goto err_ref;
  47. }
  48. break;
  49. case ARIZONA_32KZ_MCLK2:
  50. ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]);
  51. if (ret != 0)
  52. goto err_ref;
  53. break;
  54. }
  55. ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  56. ARIZONA_CLK_32K_ENA,
  57. ARIZONA_CLK_32K_ENA);
  58. }
  59. err_ref:
  60. if (ret != 0)
  61. arizona->clk32k_ref--;
  62. mutex_unlock(&arizona->clk_lock);
  63. return ret;
  64. }
  65. EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
  66. int arizona_clk32k_disable(struct arizona *arizona)
  67. {
  68. mutex_lock(&arizona->clk_lock);
  69. WARN_ON(arizona->clk32k_ref <= 0);
  70. arizona->clk32k_ref--;
  71. if (arizona->clk32k_ref == 0) {
  72. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  73. ARIZONA_CLK_32K_ENA, 0);
  74. switch (arizona->pdata.clk32k_src) {
  75. case ARIZONA_32KZ_MCLK1:
  76. pm_runtime_put_sync(arizona->dev);
  77. clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]);
  78. break;
  79. case ARIZONA_32KZ_MCLK2:
  80. clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]);
  81. break;
  82. }
  83. }
  84. mutex_unlock(&arizona->clk_lock);
  85. return 0;
  86. }
  87. EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
  88. static irqreturn_t arizona_clkgen_err(int irq, void *data)
  89. {
  90. struct arizona *arizona = data;
  91. dev_err(arizona->dev, "CLKGEN error\n");
  92. return IRQ_HANDLED;
  93. }
  94. static irqreturn_t arizona_underclocked(int irq, void *data)
  95. {
  96. struct arizona *arizona = data;
  97. unsigned int val;
  98. int ret;
  99. ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
  100. &val);
  101. if (ret != 0) {
  102. dev_err(arizona->dev, "Failed to read underclock status: %d\n",
  103. ret);
  104. return IRQ_NONE;
  105. }
  106. if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
  107. dev_err(arizona->dev, "AIF3 underclocked\n");
  108. if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
  109. dev_err(arizona->dev, "AIF2 underclocked\n");
  110. if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
  111. dev_err(arizona->dev, "AIF1 underclocked\n");
  112. if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
  113. dev_err(arizona->dev, "ISRC3 underclocked\n");
  114. if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
  115. dev_err(arizona->dev, "ISRC2 underclocked\n");
  116. if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
  117. dev_err(arizona->dev, "ISRC1 underclocked\n");
  118. if (val & ARIZONA_FX_UNDERCLOCKED_STS)
  119. dev_err(arizona->dev, "FX underclocked\n");
  120. if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
  121. dev_err(arizona->dev, "ASRC underclocked\n");
  122. if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
  123. dev_err(arizona->dev, "DAC underclocked\n");
  124. if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
  125. dev_err(arizona->dev, "ADC underclocked\n");
  126. if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
  127. dev_err(arizona->dev, "Mixer dropped sample\n");
  128. return IRQ_HANDLED;
  129. }
  130. static irqreturn_t arizona_overclocked(int irq, void *data)
  131. {
  132. struct arizona *arizona = data;
  133. unsigned int val[3];
  134. int ret;
  135. ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
  136. &val[0], 3);
  137. if (ret != 0) {
  138. dev_err(arizona->dev, "Failed to read overclock status: %d\n",
  139. ret);
  140. return IRQ_NONE;
  141. }
  142. switch (arizona->type) {
  143. case WM8998:
  144. case WM1814:
  145. /* Some bits are shifted on WM8998,
  146. * rearrange to match the standard bit layout
  147. */
  148. val[0] = ((val[0] & 0x60e0) >> 1) |
  149. ((val[0] & 0x1e00) >> 2) |
  150. (val[0] & 0x000f);
  151. break;
  152. default:
  153. break;
  154. }
  155. if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
  156. dev_err(arizona->dev, "PWM overclocked\n");
  157. if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
  158. dev_err(arizona->dev, "FX core overclocked\n");
  159. if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
  160. dev_err(arizona->dev, "DAC SYS overclocked\n");
  161. if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
  162. dev_err(arizona->dev, "DAC WARP overclocked\n");
  163. if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
  164. dev_err(arizona->dev, "ADC overclocked\n");
  165. if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
  166. dev_err(arizona->dev, "Mixer overclocked\n");
  167. if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
  168. dev_err(arizona->dev, "AIF3 overclocked\n");
  169. if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
  170. dev_err(arizona->dev, "AIF2 overclocked\n");
  171. if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
  172. dev_err(arizona->dev, "AIF1 overclocked\n");
  173. if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
  174. dev_err(arizona->dev, "Pad control overclocked\n");
  175. if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
  176. dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
  177. if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
  178. dev_err(arizona->dev, "Slimbus async overclocked\n");
  179. if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
  180. dev_err(arizona->dev, "Slimbus sync overclocked\n");
  181. if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
  182. dev_err(arizona->dev, "ASRC async system overclocked\n");
  183. if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
  184. dev_err(arizona->dev, "ASRC async WARP overclocked\n");
  185. if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
  186. dev_err(arizona->dev, "ASRC sync system overclocked\n");
  187. if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
  188. dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
  189. if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
  190. dev_err(arizona->dev, "DSP1 overclocked\n");
  191. if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
  192. dev_err(arizona->dev, "ISRC3 overclocked\n");
  193. if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
  194. dev_err(arizona->dev, "ISRC2 overclocked\n");
  195. if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
  196. dev_err(arizona->dev, "ISRC1 overclocked\n");
  197. if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
  198. dev_err(arizona->dev, "SPDIF overclocked\n");
  199. return IRQ_HANDLED;
  200. }
  201. #define ARIZONA_REG_POLL_DELAY_US 7500
  202. static inline bool arizona_poll_reg_delay(ktime_t timeout)
  203. {
  204. if (ktime_compare(ktime_get(), timeout) > 0)
  205. return false;
  206. usleep_range(ARIZONA_REG_POLL_DELAY_US / 2, ARIZONA_REG_POLL_DELAY_US);
  207. return true;
  208. }
  209. static int arizona_poll_reg(struct arizona *arizona,
  210. int timeout_ms, unsigned int reg,
  211. unsigned int mask, unsigned int target)
  212. {
  213. ktime_t timeout = ktime_add_us(ktime_get(), timeout_ms * USEC_PER_MSEC);
  214. unsigned int val = 0;
  215. int ret;
  216. do {
  217. ret = regmap_read(arizona->regmap, reg, &val);
  218. if ((val & mask) == target)
  219. return 0;
  220. } while (arizona_poll_reg_delay(timeout));
  221. if (ret) {
  222. dev_err(arizona->dev, "Failed polling reg 0x%x: %d\n",
  223. reg, ret);
  224. return ret;
  225. }
  226. dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", reg, val);
  227. return -ETIMEDOUT;
  228. }
  229. static int arizona_wait_for_boot(struct arizona *arizona)
  230. {
  231. int ret;
  232. /*
  233. * We can't use an interrupt as we need to runtime resume to do so,
  234. * we won't race with the interrupt handler as it'll be blocked on
  235. * runtime resume.
  236. */
  237. ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5,
  238. ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
  239. if (!ret)
  240. regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
  241. ARIZONA_BOOT_DONE_STS);
  242. pm_runtime_mark_last_busy(arizona->dev);
  243. return ret;
  244. }
  245. static inline void arizona_enable_reset(struct arizona *arizona)
  246. {
  247. if (arizona->pdata.reset)
  248. gpiod_set_raw_value_cansleep(arizona->pdata.reset, 0);
  249. }
  250. static void arizona_disable_reset(struct arizona *arizona)
  251. {
  252. if (arizona->pdata.reset) {
  253. switch (arizona->type) {
  254. case WM5110:
  255. case WM8280:
  256. /* Meet requirements for minimum reset duration */
  257. usleep_range(5000, 10000);
  258. break;
  259. default:
  260. break;
  261. }
  262. gpiod_set_raw_value_cansleep(arizona->pdata.reset, 1);
  263. usleep_range(1000, 5000);
  264. }
  265. }
  266. struct arizona_sysclk_state {
  267. unsigned int fll;
  268. unsigned int sysclk;
  269. };
  270. static int arizona_enable_freerun_sysclk(struct arizona *arizona,
  271. struct arizona_sysclk_state *state)
  272. {
  273. int ret, err;
  274. /* Cache existing FLL and SYSCLK settings */
  275. ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
  276. if (ret) {
  277. dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
  278. ret);
  279. return ret;
  280. }
  281. ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
  282. &state->sysclk);
  283. if (ret) {
  284. dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
  285. ret);
  286. return ret;
  287. }
  288. /* Start up SYSCLK using the FLL in free running mode */
  289. ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
  290. ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
  291. if (ret) {
  292. dev_err(arizona->dev,
  293. "Failed to start FLL in freerunning mode: %d\n",
  294. ret);
  295. return ret;
  296. }
  297. ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5,
  298. ARIZONA_FLL1_CLOCK_OK_STS,
  299. ARIZONA_FLL1_CLOCK_OK_STS);
  300. if (ret)
  301. goto err_fll;
  302. ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
  303. if (ret) {
  304. dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
  305. goto err_fll;
  306. }
  307. return 0;
  308. err_fll:
  309. err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
  310. if (err)
  311. dev_err(arizona->dev,
  312. "Failed to re-apply old FLL settings: %d\n", err);
  313. return ret;
  314. }
  315. static int arizona_disable_freerun_sysclk(struct arizona *arizona,
  316. struct arizona_sysclk_state *state)
  317. {
  318. int ret;
  319. ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
  320. state->sysclk);
  321. if (ret) {
  322. dev_err(arizona->dev,
  323. "Failed to re-apply old SYSCLK settings: %d\n", ret);
  324. return ret;
  325. }
  326. ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
  327. if (ret) {
  328. dev_err(arizona->dev,
  329. "Failed to re-apply old FLL settings: %d\n", ret);
  330. return ret;
  331. }
  332. return 0;
  333. }
  334. static int wm5102_apply_hardware_patch(struct arizona *arizona)
  335. {
  336. struct arizona_sysclk_state state;
  337. int err, ret;
  338. ret = arizona_enable_freerun_sysclk(arizona, &state);
  339. if (ret)
  340. return ret;
  341. /* Start the write sequencer and wait for it to finish */
  342. ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
  343. ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
  344. if (ret) {
  345. dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
  346. ret);
  347. goto err;
  348. }
  349. ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1,
  350. ARIZONA_WSEQ_BUSY, 0);
  351. if (ret)
  352. regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
  353. ARIZONA_WSEQ_ABORT);
  354. err:
  355. err = arizona_disable_freerun_sysclk(arizona, &state);
  356. return ret ?: err;
  357. }
  358. /*
  359. * Register patch to some of the CODECs internal write sequences
  360. * to ensure a clean exit from the low power sleep state.
  361. */
  362. static const struct reg_sequence wm5110_sleep_patch[] = {
  363. { 0x337A, 0xC100 },
  364. { 0x337B, 0x0041 },
  365. { 0x3300, 0xA210 },
  366. { 0x3301, 0x050C },
  367. };
  368. static int wm5110_apply_sleep_patch(struct arizona *arizona)
  369. {
  370. struct arizona_sysclk_state state;
  371. int err, ret;
  372. ret = arizona_enable_freerun_sysclk(arizona, &state);
  373. if (ret)
  374. return ret;
  375. ret = regmap_multi_reg_write_bypassed(arizona->regmap,
  376. wm5110_sleep_patch,
  377. ARRAY_SIZE(wm5110_sleep_patch));
  378. err = arizona_disable_freerun_sysclk(arizona, &state);
  379. return ret ?: err;
  380. }
  381. static int wm5102_clear_write_sequencer(struct arizona *arizona)
  382. {
  383. int ret;
  384. ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
  385. 0x0);
  386. if (ret) {
  387. dev_err(arizona->dev,
  388. "Failed to clear write sequencer state: %d\n", ret);
  389. return ret;
  390. }
  391. arizona_enable_reset(arizona);
  392. regulator_disable(arizona->dcvdd);
  393. msleep(20);
  394. ret = regulator_enable(arizona->dcvdd);
  395. if (ret) {
  396. dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
  397. return ret;
  398. }
  399. arizona_disable_reset(arizona);
  400. return 0;
  401. }
  402. #ifdef CONFIG_PM
  403. static int arizona_isolate_dcvdd(struct arizona *arizona)
  404. {
  405. int ret;
  406. ret = regmap_update_bits(arizona->regmap,
  407. ARIZONA_ISOLATION_CONTROL,
  408. ARIZONA_ISOLATE_DCVDD1,
  409. ARIZONA_ISOLATE_DCVDD1);
  410. if (ret != 0)
  411. dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret);
  412. return ret;
  413. }
  414. static int arizona_connect_dcvdd(struct arizona *arizona)
  415. {
  416. int ret;
  417. ret = regmap_update_bits(arizona->regmap,
  418. ARIZONA_ISOLATION_CONTROL,
  419. ARIZONA_ISOLATE_DCVDD1, 0);
  420. if (ret != 0)
  421. dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret);
  422. return ret;
  423. }
  424. static int arizona_is_jack_det_active(struct arizona *arizona)
  425. {
  426. unsigned int val;
  427. int ret;
  428. ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
  429. if (ret) {
  430. dev_err(arizona->dev,
  431. "Failed to check jack det status: %d\n", ret);
  432. return ret;
  433. } else if (val & ARIZONA_JD1_ENA) {
  434. return 1;
  435. } else {
  436. return 0;
  437. }
  438. }
  439. static int arizona_runtime_resume(struct device *dev)
  440. {
  441. struct arizona *arizona = dev_get_drvdata(dev);
  442. int ret;
  443. dev_dbg(arizona->dev, "Leaving AoD mode\n");
  444. if (arizona->has_fully_powered_off) {
  445. dev_dbg(arizona->dev, "Re-enabling core supplies\n");
  446. ret = regulator_bulk_enable(arizona->num_core_supplies,
  447. arizona->core_supplies);
  448. if (ret) {
  449. dev_err(dev, "Failed to enable core supplies: %d\n",
  450. ret);
  451. return ret;
  452. }
  453. }
  454. ret = regulator_enable(arizona->dcvdd);
  455. if (ret != 0) {
  456. dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
  457. if (arizona->has_fully_powered_off)
  458. regulator_bulk_disable(arizona->num_core_supplies,
  459. arizona->core_supplies);
  460. return ret;
  461. }
  462. if (arizona->has_fully_powered_off) {
  463. arizona_disable_reset(arizona);
  464. enable_irq(arizona->irq);
  465. arizona->has_fully_powered_off = false;
  466. }
  467. regcache_cache_only(arizona->regmap, false);
  468. switch (arizona->type) {
  469. case WM5102:
  470. if (arizona->external_dcvdd) {
  471. ret = arizona_connect_dcvdd(arizona);
  472. if (ret != 0)
  473. goto err;
  474. }
  475. ret = wm5102_patch(arizona);
  476. if (ret != 0) {
  477. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  478. ret);
  479. goto err;
  480. }
  481. ret = wm5102_apply_hardware_patch(arizona);
  482. if (ret) {
  483. dev_err(arizona->dev,
  484. "Failed to apply hardware patch: %d\n",
  485. ret);
  486. goto err;
  487. }
  488. break;
  489. case WM5110:
  490. case WM8280:
  491. ret = arizona_wait_for_boot(arizona);
  492. if (ret)
  493. goto err;
  494. if (arizona->external_dcvdd) {
  495. ret = arizona_connect_dcvdd(arizona);
  496. if (ret != 0)
  497. goto err;
  498. } else {
  499. /*
  500. * As this is only called for the internal regulator
  501. * (where we know voltage ranges available) it is ok
  502. * to request an exact range.
  503. */
  504. ret = regulator_set_voltage(arizona->dcvdd,
  505. 1200000, 1200000);
  506. if (ret < 0) {
  507. dev_err(arizona->dev,
  508. "Failed to set resume voltage: %d\n",
  509. ret);
  510. goto err;
  511. }
  512. }
  513. ret = wm5110_apply_sleep_patch(arizona);
  514. if (ret) {
  515. dev_err(arizona->dev,
  516. "Failed to re-apply sleep patch: %d\n",
  517. ret);
  518. goto err;
  519. }
  520. break;
  521. case WM1831:
  522. case CS47L24:
  523. ret = arizona_wait_for_boot(arizona);
  524. if (ret != 0)
  525. goto err;
  526. break;
  527. default:
  528. ret = arizona_wait_for_boot(arizona);
  529. if (ret != 0)
  530. goto err;
  531. if (arizona->external_dcvdd) {
  532. ret = arizona_connect_dcvdd(arizona);
  533. if (ret != 0)
  534. goto err;
  535. }
  536. break;
  537. }
  538. ret = regcache_sync(arizona->regmap);
  539. if (ret != 0) {
  540. dev_err(arizona->dev, "Failed to restore register cache\n");
  541. goto err;
  542. }
  543. return 0;
  544. err:
  545. regcache_cache_only(arizona->regmap, true);
  546. regulator_disable(arizona->dcvdd);
  547. return ret;
  548. }
  549. static int arizona_runtime_suspend(struct device *dev)
  550. {
  551. struct arizona *arizona = dev_get_drvdata(dev);
  552. int jd_active = 0;
  553. int ret;
  554. dev_dbg(arizona->dev, "Entering AoD mode\n");
  555. switch (arizona->type) {
  556. case WM5110:
  557. case WM8280:
  558. jd_active = arizona_is_jack_det_active(arizona);
  559. if (jd_active < 0)
  560. return jd_active;
  561. if (arizona->external_dcvdd) {
  562. ret = arizona_isolate_dcvdd(arizona);
  563. if (ret != 0)
  564. return ret;
  565. } else {
  566. /*
  567. * As this is only called for the internal regulator
  568. * (where we know voltage ranges available) it is ok
  569. * to request an exact range.
  570. */
  571. ret = regulator_set_voltage(arizona->dcvdd,
  572. 1175000, 1175000);
  573. if (ret < 0) {
  574. dev_err(arizona->dev,
  575. "Failed to set suspend voltage: %d\n",
  576. ret);
  577. return ret;
  578. }
  579. }
  580. break;
  581. case WM5102:
  582. jd_active = arizona_is_jack_det_active(arizona);
  583. if (jd_active < 0)
  584. return jd_active;
  585. if (arizona->external_dcvdd) {
  586. ret = arizona_isolate_dcvdd(arizona);
  587. if (ret != 0)
  588. return ret;
  589. }
  590. if (!jd_active) {
  591. ret = regmap_write(arizona->regmap,
  592. ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
  593. if (ret) {
  594. dev_err(arizona->dev,
  595. "Failed to clear write sequencer: %d\n",
  596. ret);
  597. return ret;
  598. }
  599. }
  600. break;
  601. case WM1831:
  602. case CS47L24:
  603. break;
  604. default:
  605. jd_active = arizona_is_jack_det_active(arizona);
  606. if (jd_active < 0)
  607. return jd_active;
  608. if (arizona->external_dcvdd) {
  609. ret = arizona_isolate_dcvdd(arizona);
  610. if (ret != 0)
  611. return ret;
  612. }
  613. break;
  614. }
  615. regcache_cache_only(arizona->regmap, true);
  616. regcache_mark_dirty(arizona->regmap);
  617. regulator_disable(arizona->dcvdd);
  618. /* Allow us to completely power down if no jack detection */
  619. if (!jd_active) {
  620. dev_dbg(arizona->dev, "Fully powering off\n");
  621. arizona->has_fully_powered_off = true;
  622. disable_irq_nosync(arizona->irq);
  623. arizona_enable_reset(arizona);
  624. regulator_bulk_disable(arizona->num_core_supplies,
  625. arizona->core_supplies);
  626. }
  627. return 0;
  628. }
  629. #endif
  630. #ifdef CONFIG_PM_SLEEP
  631. static int arizona_suspend(struct device *dev)
  632. {
  633. struct arizona *arizona = dev_get_drvdata(dev);
  634. dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
  635. disable_irq(arizona->irq);
  636. return 0;
  637. }
  638. static int arizona_suspend_noirq(struct device *dev)
  639. {
  640. struct arizona *arizona = dev_get_drvdata(dev);
  641. dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
  642. enable_irq(arizona->irq);
  643. return 0;
  644. }
  645. static int arizona_resume_noirq(struct device *dev)
  646. {
  647. struct arizona *arizona = dev_get_drvdata(dev);
  648. dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
  649. disable_irq(arizona->irq);
  650. return 0;
  651. }
  652. static int arizona_resume(struct device *dev)
  653. {
  654. struct arizona *arizona = dev_get_drvdata(dev);
  655. dev_dbg(arizona->dev, "Resume, reenabling IRQ\n");
  656. enable_irq(arizona->irq);
  657. return 0;
  658. }
  659. #endif
  660. const struct dev_pm_ops arizona_pm_ops = {
  661. SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
  662. arizona_runtime_resume,
  663. NULL)
  664. SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
  665. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq,
  666. arizona_resume_noirq)
  667. };
  668. EXPORT_SYMBOL_GPL(arizona_pm_ops);
  669. #ifdef CONFIG_OF
  670. unsigned long arizona_of_get_type(struct device *dev)
  671. {
  672. const struct of_device_id *id = of_match_device(arizona_of_match, dev);
  673. if (id)
  674. return (unsigned long)id->data;
  675. else
  676. return 0;
  677. }
  678. EXPORT_SYMBOL_GPL(arizona_of_get_type);
  679. static int arizona_of_get_core_pdata(struct arizona *arizona)
  680. {
  681. struct arizona_pdata *pdata = &arizona->pdata;
  682. int ret, i;
  683. /* Handle old non-standard DT binding */
  684. pdata->reset = devm_gpiod_get(arizona->dev, "wlf,reset", GPIOD_OUT_LOW);
  685. if (IS_ERR(pdata->reset)) {
  686. ret = PTR_ERR(pdata->reset);
  687. /*
  688. * Reset missing will be caught when other binding is read
  689. * but all other errors imply this binding is in use but has
  690. * encountered a problem so should be handled.
  691. */
  692. if (ret == -EPROBE_DEFER)
  693. return ret;
  694. else if (ret != -ENOENT && ret != -ENOSYS)
  695. dev_err(arizona->dev, "Reset GPIO malformed: %d\n",
  696. ret);
  697. pdata->reset = NULL;
  698. }
  699. ret = of_property_read_u32_array(arizona->dev->of_node,
  700. "wlf,gpio-defaults",
  701. pdata->gpio_defaults,
  702. ARRAY_SIZE(pdata->gpio_defaults));
  703. if (ret >= 0) {
  704. /*
  705. * All values are literal except out of range values
  706. * which are chip default, translate into platform
  707. * data which uses 0 as chip default and out of range
  708. * as zero.
  709. */
  710. for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
  711. if (pdata->gpio_defaults[i] > 0xffff)
  712. pdata->gpio_defaults[i] = 0;
  713. else if (pdata->gpio_defaults[i] == 0)
  714. pdata->gpio_defaults[i] = 0x10000;
  715. }
  716. } else {
  717. dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
  718. ret);
  719. }
  720. return 0;
  721. }
  722. const struct of_device_id arizona_of_match[] = {
  723. { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
  724. { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
  725. { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
  726. { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
  727. { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
  728. { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
  729. { .compatible = "wlf,wm1831", .data = (void *)WM1831 },
  730. { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 },
  731. {},
  732. };
  733. EXPORT_SYMBOL_GPL(arizona_of_match);
  734. #else
  735. static inline int arizona_of_get_core_pdata(struct arizona *arizona)
  736. {
  737. return 0;
  738. }
  739. #endif
  740. static const struct mfd_cell early_devs[] = {
  741. { .name = "arizona-ldo1" },
  742. };
  743. static const char * const wm5102_supplies[] = {
  744. "MICVDD",
  745. "DBVDD2",
  746. "DBVDD3",
  747. "CPVDD",
  748. "SPKVDDL",
  749. "SPKVDDR",
  750. };
  751. static const struct mfd_cell wm5102_devs[] = {
  752. { .name = "arizona-micsupp" },
  753. { .name = "arizona-gpio" },
  754. {
  755. .name = "arizona-extcon",
  756. .parent_supplies = wm5102_supplies,
  757. .num_parent_supplies = 1, /* We only need MICVDD */
  758. },
  759. { .name = "arizona-haptics" },
  760. { .name = "arizona-pwm" },
  761. {
  762. .name = "wm5102-codec",
  763. .parent_supplies = wm5102_supplies,
  764. .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
  765. },
  766. };
  767. static const struct mfd_cell wm5110_devs[] = {
  768. { .name = "arizona-micsupp" },
  769. { .name = "arizona-gpio" },
  770. {
  771. .name = "arizona-extcon",
  772. .parent_supplies = wm5102_supplies,
  773. .num_parent_supplies = 1, /* We only need MICVDD */
  774. },
  775. { .name = "arizona-haptics" },
  776. { .name = "arizona-pwm" },
  777. {
  778. .name = "wm5110-codec",
  779. .parent_supplies = wm5102_supplies,
  780. .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
  781. },
  782. };
  783. static const char * const cs47l24_supplies[] = {
  784. "MICVDD",
  785. "CPVDD",
  786. "SPKVDD",
  787. };
  788. static const struct mfd_cell cs47l24_devs[] = {
  789. { .name = "arizona-gpio" },
  790. { .name = "arizona-haptics" },
  791. { .name = "arizona-pwm" },
  792. {
  793. .name = "cs47l24-codec",
  794. .parent_supplies = cs47l24_supplies,
  795. .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies),
  796. },
  797. };
  798. static const char * const wm8997_supplies[] = {
  799. "MICVDD",
  800. "DBVDD2",
  801. "CPVDD",
  802. "SPKVDD",
  803. };
  804. static const struct mfd_cell wm8997_devs[] = {
  805. { .name = "arizona-micsupp" },
  806. { .name = "arizona-gpio" },
  807. {
  808. .name = "arizona-extcon",
  809. .parent_supplies = wm8997_supplies,
  810. .num_parent_supplies = 1, /* We only need MICVDD */
  811. },
  812. { .name = "arizona-haptics" },
  813. { .name = "arizona-pwm" },
  814. {
  815. .name = "wm8997-codec",
  816. .parent_supplies = wm8997_supplies,
  817. .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
  818. },
  819. };
  820. static const struct mfd_cell wm8998_devs[] = {
  821. { .name = "arizona-micsupp" },
  822. { .name = "arizona-gpio" },
  823. {
  824. .name = "arizona-extcon",
  825. .parent_supplies = wm5102_supplies,
  826. .num_parent_supplies = 1, /* We only need MICVDD */
  827. },
  828. { .name = "arizona-haptics" },
  829. { .name = "arizona-pwm" },
  830. {
  831. .name = "wm8998-codec",
  832. .parent_supplies = wm5102_supplies,
  833. .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
  834. },
  835. };
  836. int arizona_dev_init(struct arizona *arizona)
  837. {
  838. static const char * const mclk_name[] = { "mclk1", "mclk2" };
  839. struct device *dev = arizona->dev;
  840. const char *type_name = NULL;
  841. unsigned int reg, val;
  842. int (*apply_patch)(struct arizona *) = NULL;
  843. const struct mfd_cell *subdevs = NULL;
  844. int n_subdevs = 0, ret, i;
  845. dev_set_drvdata(arizona->dev, arizona);
  846. mutex_init(&arizona->clk_lock);
  847. if (dev_get_platdata(arizona->dev)) {
  848. memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
  849. sizeof(arizona->pdata));
  850. } else {
  851. ret = arizona_of_get_core_pdata(arizona);
  852. if (ret < 0)
  853. return ret;
  854. }
  855. BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name));
  856. for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) {
  857. arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]);
  858. if (IS_ERR(arizona->mclk[i])) {
  859. dev_info(arizona->dev, "Failed to get %s: %ld\n",
  860. mclk_name[i], PTR_ERR(arizona->mclk[i]));
  861. arizona->mclk[i] = NULL;
  862. }
  863. }
  864. regcache_cache_only(arizona->regmap, true);
  865. switch (arizona->type) {
  866. case WM5102:
  867. case WM5110:
  868. case WM8280:
  869. case WM8997:
  870. case WM8998:
  871. case WM1814:
  872. case WM1831:
  873. case CS47L24:
  874. for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
  875. arizona->core_supplies[i].supply
  876. = wm5102_core_supplies[i];
  877. arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
  878. break;
  879. default:
  880. dev_err(arizona->dev, "Unknown device type %d\n",
  881. arizona->type);
  882. return -ENODEV;
  883. }
  884. /* Mark DCVDD as external, LDO1 driver will clear if internal */
  885. arizona->external_dcvdd = true;
  886. switch (arizona->type) {
  887. case WM1831:
  888. case CS47L24:
  889. break; /* No LDO1 regulator */
  890. default:
  891. ret = mfd_add_devices(arizona->dev, -1, early_devs,
  892. ARRAY_SIZE(early_devs), NULL, 0, NULL);
  893. if (ret != 0) {
  894. dev_err(dev, "Failed to add early children: %d\n", ret);
  895. return ret;
  896. }
  897. break;
  898. }
  899. ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
  900. arizona->core_supplies);
  901. if (ret != 0) {
  902. dev_err(dev, "Failed to request core supplies: %d\n",
  903. ret);
  904. goto err_early;
  905. }
  906. /**
  907. * Don't use devres here because the only device we have to get
  908. * against is the MFD device and DCVDD will likely be supplied by
  909. * one of its children. Meaning that the regulator will be
  910. * destroyed by the time devres calls regulator put.
  911. */
  912. arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
  913. if (IS_ERR(arizona->dcvdd)) {
  914. ret = PTR_ERR(arizona->dcvdd);
  915. dev_err(dev, "Failed to request DCVDD: %d\n", ret);
  916. goto err_early;
  917. }
  918. if (!arizona->pdata.reset) {
  919. /* Start out with /RESET low to put the chip into reset */
  920. arizona->pdata.reset = devm_gpiod_get(arizona->dev, "reset",
  921. GPIOD_OUT_LOW);
  922. if (IS_ERR(arizona->pdata.reset)) {
  923. ret = PTR_ERR(arizona->pdata.reset);
  924. if (ret == -EPROBE_DEFER)
  925. goto err_dcvdd;
  926. dev_err(arizona->dev,
  927. "Reset GPIO missing/malformed: %d\n", ret);
  928. arizona->pdata.reset = NULL;
  929. }
  930. }
  931. ret = regulator_bulk_enable(arizona->num_core_supplies,
  932. arizona->core_supplies);
  933. if (ret != 0) {
  934. dev_err(dev, "Failed to enable core supplies: %d\n",
  935. ret);
  936. goto err_dcvdd;
  937. }
  938. ret = regulator_enable(arizona->dcvdd);
  939. if (ret != 0) {
  940. dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
  941. goto err_enable;
  942. }
  943. arizona_disable_reset(arizona);
  944. regcache_cache_only(arizona->regmap, false);
  945. /* Verify that this is a chip we know about */
  946. ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
  947. if (ret != 0) {
  948. dev_err(dev, "Failed to read ID register: %d\n", ret);
  949. goto err_reset;
  950. }
  951. switch (reg) {
  952. case 0x5102:
  953. case 0x5110:
  954. case 0x6349:
  955. case 0x6363:
  956. case 0x8997:
  957. break;
  958. default:
  959. dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
  960. ret = -ENODEV;
  961. goto err_reset;
  962. }
  963. /* If we have a /RESET GPIO we'll already be reset */
  964. if (!arizona->pdata.reset) {
  965. ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
  966. if (ret != 0) {
  967. dev_err(dev, "Failed to reset device: %d\n", ret);
  968. goto err_reset;
  969. }
  970. usleep_range(1000, 5000);
  971. }
  972. /* Ensure device startup is complete */
  973. switch (arizona->type) {
  974. case WM5102:
  975. ret = regmap_read(arizona->regmap,
  976. ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
  977. if (ret) {
  978. dev_err(dev,
  979. "Failed to check write sequencer state: %d\n",
  980. ret);
  981. } else if (val & 0x01) {
  982. ret = wm5102_clear_write_sequencer(arizona);
  983. if (ret)
  984. return ret;
  985. }
  986. break;
  987. default:
  988. break;
  989. }
  990. ret = arizona_wait_for_boot(arizona);
  991. if (ret) {
  992. dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
  993. goto err_reset;
  994. }
  995. /* Read the device ID information & do device specific stuff */
  996. ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
  997. if (ret != 0) {
  998. dev_err(dev, "Failed to read ID register: %d\n", ret);
  999. goto err_reset;
  1000. }
  1001. ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
  1002. &arizona->rev);
  1003. if (ret != 0) {
  1004. dev_err(dev, "Failed to read revision register: %d\n", ret);
  1005. goto err_reset;
  1006. }
  1007. arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
  1008. switch (reg) {
  1009. case 0x5102:
  1010. if (IS_ENABLED(CONFIG_MFD_WM5102)) {
  1011. type_name = "WM5102";
  1012. if (arizona->type != WM5102) {
  1013. dev_warn(arizona->dev,
  1014. "WM5102 registered as %d\n",
  1015. arizona->type);
  1016. arizona->type = WM5102;
  1017. }
  1018. apply_patch = wm5102_patch;
  1019. arizona->rev &= 0x7;
  1020. subdevs = wm5102_devs;
  1021. n_subdevs = ARRAY_SIZE(wm5102_devs);
  1022. }
  1023. break;
  1024. case 0x5110:
  1025. if (IS_ENABLED(CONFIG_MFD_WM5110)) {
  1026. switch (arizona->type) {
  1027. case WM5110:
  1028. type_name = "WM5110";
  1029. break;
  1030. case WM8280:
  1031. type_name = "WM8280";
  1032. break;
  1033. default:
  1034. type_name = "WM5110";
  1035. dev_warn(arizona->dev,
  1036. "WM5110 registered as %d\n",
  1037. arizona->type);
  1038. arizona->type = WM5110;
  1039. break;
  1040. }
  1041. apply_patch = wm5110_patch;
  1042. subdevs = wm5110_devs;
  1043. n_subdevs = ARRAY_SIZE(wm5110_devs);
  1044. }
  1045. break;
  1046. case 0x6363:
  1047. if (IS_ENABLED(CONFIG_MFD_CS47L24)) {
  1048. switch (arizona->type) {
  1049. case CS47L24:
  1050. type_name = "CS47L24";
  1051. break;
  1052. case WM1831:
  1053. type_name = "WM1831";
  1054. break;
  1055. default:
  1056. dev_warn(arizona->dev,
  1057. "CS47L24 registered as %d\n",
  1058. arizona->type);
  1059. arizona->type = CS47L24;
  1060. break;
  1061. }
  1062. apply_patch = cs47l24_patch;
  1063. subdevs = cs47l24_devs;
  1064. n_subdevs = ARRAY_SIZE(cs47l24_devs);
  1065. }
  1066. break;
  1067. case 0x8997:
  1068. if (IS_ENABLED(CONFIG_MFD_WM8997)) {
  1069. type_name = "WM8997";
  1070. if (arizona->type != WM8997) {
  1071. dev_warn(arizona->dev,
  1072. "WM8997 registered as %d\n",
  1073. arizona->type);
  1074. arizona->type = WM8997;
  1075. }
  1076. apply_patch = wm8997_patch;
  1077. subdevs = wm8997_devs;
  1078. n_subdevs = ARRAY_SIZE(wm8997_devs);
  1079. }
  1080. break;
  1081. case 0x6349:
  1082. if (IS_ENABLED(CONFIG_MFD_WM8998)) {
  1083. switch (arizona->type) {
  1084. case WM8998:
  1085. type_name = "WM8998";
  1086. break;
  1087. case WM1814:
  1088. type_name = "WM1814";
  1089. break;
  1090. default:
  1091. type_name = "WM8998";
  1092. dev_warn(arizona->dev,
  1093. "WM8998 registered as %d\n",
  1094. arizona->type);
  1095. arizona->type = WM8998;
  1096. }
  1097. apply_patch = wm8998_patch;
  1098. subdevs = wm8998_devs;
  1099. n_subdevs = ARRAY_SIZE(wm8998_devs);
  1100. }
  1101. break;
  1102. default:
  1103. dev_err(arizona->dev, "Unknown device ID %x\n", reg);
  1104. ret = -ENODEV;
  1105. goto err_reset;
  1106. }
  1107. if (!subdevs) {
  1108. dev_err(arizona->dev,
  1109. "No kernel support for device ID %x\n", reg);
  1110. ret = -ENODEV;
  1111. goto err_reset;
  1112. }
  1113. dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
  1114. if (apply_patch) {
  1115. ret = apply_patch(arizona);
  1116. if (ret != 0) {
  1117. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  1118. ret);
  1119. goto err_reset;
  1120. }
  1121. switch (arizona->type) {
  1122. case WM5102:
  1123. ret = wm5102_apply_hardware_patch(arizona);
  1124. if (ret) {
  1125. dev_err(arizona->dev,
  1126. "Failed to apply hardware patch: %d\n",
  1127. ret);
  1128. goto err_reset;
  1129. }
  1130. break;
  1131. case WM5110:
  1132. case WM8280:
  1133. ret = wm5110_apply_sleep_patch(arizona);
  1134. if (ret) {
  1135. dev_err(arizona->dev,
  1136. "Failed to apply sleep patch: %d\n",
  1137. ret);
  1138. goto err_reset;
  1139. }
  1140. break;
  1141. default:
  1142. break;
  1143. }
  1144. }
  1145. for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
  1146. if (!arizona->pdata.gpio_defaults[i])
  1147. continue;
  1148. regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
  1149. arizona->pdata.gpio_defaults[i]);
  1150. }
  1151. /* Chip default */
  1152. if (!arizona->pdata.clk32k_src)
  1153. arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
  1154. switch (arizona->pdata.clk32k_src) {
  1155. case ARIZONA_32KZ_MCLK1:
  1156. case ARIZONA_32KZ_MCLK2:
  1157. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  1158. ARIZONA_CLK_32K_SRC_MASK,
  1159. arizona->pdata.clk32k_src - 1);
  1160. arizona_clk32k_enable(arizona);
  1161. break;
  1162. case ARIZONA_32KZ_NONE:
  1163. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  1164. ARIZONA_CLK_32K_SRC_MASK, 2);
  1165. break;
  1166. default:
  1167. dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
  1168. arizona->pdata.clk32k_src);
  1169. ret = -EINVAL;
  1170. goto err_reset;
  1171. }
  1172. for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
  1173. if (!arizona->pdata.micbias[i].mV &&
  1174. !arizona->pdata.micbias[i].bypass)
  1175. continue;
  1176. /* Apply default for bypass mode */
  1177. if (!arizona->pdata.micbias[i].mV)
  1178. arizona->pdata.micbias[i].mV = 2800;
  1179. val = (arizona->pdata.micbias[i].mV - 1500) / 100;
  1180. val <<= ARIZONA_MICB1_LVL_SHIFT;
  1181. if (arizona->pdata.micbias[i].ext_cap)
  1182. val |= ARIZONA_MICB1_EXT_CAP;
  1183. if (arizona->pdata.micbias[i].discharge)
  1184. val |= ARIZONA_MICB1_DISCH;
  1185. if (arizona->pdata.micbias[i].soft_start)
  1186. val |= ARIZONA_MICB1_RATE;
  1187. if (arizona->pdata.micbias[i].bypass)
  1188. val |= ARIZONA_MICB1_BYPASS;
  1189. regmap_update_bits(arizona->regmap,
  1190. ARIZONA_MIC_BIAS_CTRL_1 + i,
  1191. ARIZONA_MICB1_LVL_MASK |
  1192. ARIZONA_MICB1_EXT_CAP |
  1193. ARIZONA_MICB1_DISCH |
  1194. ARIZONA_MICB1_BYPASS |
  1195. ARIZONA_MICB1_RATE, val);
  1196. }
  1197. pm_runtime_set_active(arizona->dev);
  1198. pm_runtime_enable(arizona->dev);
  1199. /* Set up for interrupts */
  1200. ret = arizona_irq_init(arizona);
  1201. if (ret != 0)
  1202. goto err_pm;
  1203. pm_runtime_set_autosuspend_delay(arizona->dev, 100);
  1204. pm_runtime_use_autosuspend(arizona->dev);
  1205. arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
  1206. arizona_clkgen_err, arizona);
  1207. arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
  1208. arizona_overclocked, arizona);
  1209. arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
  1210. arizona_underclocked, arizona);
  1211. ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE,
  1212. subdevs, n_subdevs, NULL, 0, NULL);
  1213. if (ret) {
  1214. dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
  1215. goto err_irq;
  1216. }
  1217. return 0;
  1218. err_irq:
  1219. arizona_irq_exit(arizona);
  1220. err_pm:
  1221. pm_runtime_disable(arizona->dev);
  1222. switch (arizona->pdata.clk32k_src) {
  1223. case ARIZONA_32KZ_MCLK1:
  1224. case ARIZONA_32KZ_MCLK2:
  1225. arizona_clk32k_disable(arizona);
  1226. break;
  1227. default:
  1228. break;
  1229. }
  1230. err_reset:
  1231. arizona_enable_reset(arizona);
  1232. regulator_disable(arizona->dcvdd);
  1233. err_enable:
  1234. regulator_bulk_disable(arizona->num_core_supplies,
  1235. arizona->core_supplies);
  1236. err_dcvdd:
  1237. regulator_put(arizona->dcvdd);
  1238. err_early:
  1239. mfd_remove_devices(dev);
  1240. return ret;
  1241. }
  1242. EXPORT_SYMBOL_GPL(arizona_dev_init);
  1243. int arizona_dev_exit(struct arizona *arizona)
  1244. {
  1245. disable_irq(arizona->irq);
  1246. pm_runtime_disable(arizona->dev);
  1247. regulator_disable(arizona->dcvdd);
  1248. regulator_put(arizona->dcvdd);
  1249. switch (arizona->pdata.clk32k_src) {
  1250. case ARIZONA_32KZ_MCLK1:
  1251. case ARIZONA_32KZ_MCLK2:
  1252. arizona_clk32k_disable(arizona);
  1253. break;
  1254. default:
  1255. break;
  1256. }
  1257. mfd_remove_devices(arizona->dev);
  1258. arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
  1259. arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
  1260. arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
  1261. arizona_irq_exit(arizona);
  1262. arizona_enable_reset(arizona);
  1263. regulator_bulk_disable(arizona->num_core_supplies,
  1264. arizona->core_supplies);
  1265. return 0;
  1266. }
  1267. EXPORT_SYMBOL_GPL(arizona_dev_exit);