Kconfig 7.9 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only
  2. #
  3. # Memory devices
  4. #
  5. menuconfig MEMORY
  6. bool "Memory Controller drivers"
  7. help
  8. This option allows to enable specific memory controller drivers,
  9. useful mostly on embedded systems. These could be controllers
  10. for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features
  11. vary from memory tuning and frequency scaling to enabling
  12. access to attached peripherals through memory bus.
  13. if MEMORY
  14. config DDR
  15. bool
  16. help
  17. Data from JEDEC specs for DDR SDRAM memories,
  18. particularly the AC timing parameters and addressing
  19. information. This data is useful for drivers handling
  20. DDR SDRAM controllers.
  21. config ARM_PL172_MPMC
  22. tristate "ARM PL172 MPMC driver"
  23. depends on ARM_AMBA && OF
  24. help
  25. This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
  26. If you have an embedded system with an AMBA bus and a PL172
  27. controller, say Y or M here.
  28. config ATMEL_SDRAMC
  29. bool "Atmel (Multi-port DDR-)SDRAM Controller"
  30. default y if ARCH_AT91
  31. depends on ARCH_AT91 || COMPILE_TEST
  32. depends on OF
  33. help
  34. This driver is for Atmel SDRAM Controller or Atmel Multi-port
  35. DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
  36. Starting with the at91sam9g45, this controller supports SDR, DDR and
  37. LP-DDR memories.
  38. config ATMEL_EBI
  39. bool "Atmel EBI driver"
  40. default y if ARCH_AT91
  41. depends on ARCH_AT91 || COMPILE_TEST
  42. depends on OF
  43. select MFD_SYSCON
  44. select MFD_ATMEL_SMC
  45. help
  46. Driver for Atmel EBI controller.
  47. Used to configure the EBI (external bus interface) when the device-
  48. tree is used. This bus supports NANDs, external ethernet controller,
  49. SRAMs, ATA devices, etc.
  50. config BRCMSTB_DPFE
  51. bool "Broadcom STB DPFE driver" if COMPILE_TEST
  52. default y if ARCH_BRCMSTB
  53. depends on ARCH_BRCMSTB || COMPILE_TEST
  54. help
  55. This driver provides access to the DPFE interface of Broadcom
  56. STB SoCs. The firmware running on the DCPU inside the DDR PHY can
  57. provide current information about the system's RAM, for instance
  58. the DRAM refresh rate. This can be used as an indirect indicator
  59. for the DRAM's temperature. Slower refresh rate means cooler RAM,
  60. higher refresh rate means hotter RAM.
  61. config BT1_L2_CTL
  62. bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
  63. depends on MIPS_BAIKAL_T1 || COMPILE_TEST
  64. select MFD_SYSCON
  65. help
  66. Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
  67. resides Coherency Manager v2 with embedded 1MB L2-cache. It's
  68. possible to tune the L2 cache performance up by setting the data,
  69. tags and way-select latencies of RAM access. This driver provides a
  70. dt properties-based and sysfs interface for it.
  71. config TI_AEMIF
  72. tristate "Texas Instruments AEMIF driver"
  73. depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST
  74. depends on OF
  75. help
  76. This driver is for the AEMIF module available in Texas Instruments
  77. SoCs. AEMIF stands for Asynchronous External Memory Interface and
  78. is intended to provide a glue-less interface to a variety of
  79. asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
  80. of 256M bytes of any of these memories can be accessed at a given
  81. time via four chip selects with 64M byte access per chip select.
  82. config TI_EMIF
  83. tristate "Texas Instruments EMIF driver"
  84. depends on ARCH_OMAP2PLUS || COMPILE_TEST
  85. select DDR
  86. help
  87. This driver is for the EMIF module available in Texas Instruments
  88. SoCs. EMIF is an SDRAM controller that, based on its revision,
  89. supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
  90. This driver takes care of only LPDDR2 memories presently. The
  91. functions of the driver includes re-configuring AC timing
  92. parameters and other settings during frequency, voltage and
  93. temperature changes
  94. config OMAP_GPMC
  95. bool "Texas Instruments OMAP SoC GPMC driver" if COMPILE_TEST
  96. depends on OF_ADDRESS
  97. select GPIOLIB
  98. help
  99. This driver is for the General Purpose Memory Controller (GPMC)
  100. present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
  101. interfacing to a variety of asynchronous as well as synchronous
  102. memory drives like NOR, NAND, OneNAND, SRAM.
  103. config OMAP_GPMC_DEBUG
  104. bool "Enable GPMC debug output and skip reset of GPMC during init"
  105. depends on OMAP_GPMC
  106. help
  107. Enables verbose debugging mostly to decode the bootloader provided
  108. timings. To preserve the bootloader provided timings, the reset
  109. of GPMC is skipped during init. Enable this during development to
  110. configure devices connected to the GPMC bus.
  111. NOTE: In addition to matching the register setup with the bootloader
  112. you also need to match the GPMC FCLK frequency used by the
  113. bootloader or else the GPMC timings won't be identical with the
  114. bootloader timings.
  115. config TI_EMIF_SRAM
  116. tristate "Texas Instruments EMIF SRAM driver"
  117. depends on SOC_AM33XX || SOC_AM43XX || (ARM && CPU_V7 && COMPILE_TEST)
  118. depends on SRAM
  119. help
  120. This driver is for the EMIF module available on Texas Instruments
  121. AM33XX and AM43XX SoCs and is required for PM. Certain parts of
  122. the EMIF PM code must run from on-chip SRAM late in the suspend
  123. sequence so this driver provides several relocatable PM functions
  124. for the SoC PM code to use.
  125. config MVEBU_DEVBUS
  126. bool "Marvell EBU Device Bus Controller"
  127. default y if PLAT_ORION
  128. depends on PLAT_ORION || COMPILE_TEST
  129. depends on OF
  130. help
  131. This driver is for the Device Bus controller available in some
  132. Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
  133. Armada 370 and Armada XP. This controller allows to handle flash
  134. devices such as NOR, NAND, SRAM, and FPGA.
  135. config FSL_CORENET_CF
  136. tristate "Freescale CoreNet Error Reporting"
  137. depends on FSL_SOC_BOOKE || COMPILE_TEST
  138. help
  139. Say Y for reporting of errors from the Freescale CoreNet
  140. Coherency Fabric. Errors reported include accesses to
  141. physical addresses that mapped by no local access window
  142. (LAW) or an invalid LAW, as well as bad cache state that
  143. represents a coherency violation.
  144. config FSL_IFC
  145. bool "Freescale IFC driver" if COMPILE_TEST
  146. depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
  147. depends on HAS_IOMEM
  148. config JZ4780_NEMC
  149. bool "Ingenic JZ4780 SoC NEMC driver"
  150. depends on MIPS || COMPILE_TEST
  151. depends on HAS_IOMEM && OF
  152. help
  153. This driver is for the NAND/External Memory Controller (NEMC) in
  154. the Ingenic JZ4780. This controller is used to handle external
  155. memory devices such as NAND and SRAM.
  156. config MTK_SMI
  157. tristate "MediaTek SoC Memory Controller driver" if COMPILE_TEST
  158. depends on ARCH_MEDIATEK || COMPILE_TEST
  159. help
  160. This driver is for the Memory Controller module in MediaTek SoCs,
  161. mainly help enable/disable iommu and control the power domain and
  162. clocks for each local arbiter.
  163. config DA8XX_DDRCTL
  164. bool "Texas Instruments da8xx DDR2/mDDR driver"
  165. depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST
  166. help
  167. This driver is for the DDR2/mDDR Memory Controller present on
  168. Texas Instruments da8xx SoCs. It's used to tweak various memory
  169. controller configuration options.
  170. config PL353_SMC
  171. tristate "ARM PL35X Static Memory Controller(SMC) driver"
  172. default y if ARM
  173. depends on ARM
  174. depends on ARM_AMBA || COMPILE_TEST
  175. help
  176. This driver is for the ARM PL351/PL353 Static Memory
  177. Controller(SMC) module.
  178. config RENESAS_RPCIF
  179. tristate "Renesas RPC-IF driver"
  180. depends on ARCH_RENESAS || COMPILE_TEST
  181. select REGMAP_MMIO
  182. help
  183. This supports Renesas R-Car Gen3 RPC-IF which provides either SPI
  184. host or HyperFlash. You'll have to select individual components
  185. under the corresponding menu.
  186. config STM32_FMC2_EBI
  187. tristate "Support for FMC2 External Bus Interface on STM32MP SoCs"
  188. depends on MACH_STM32MP157 || COMPILE_TEST
  189. select MFD_SYSCON
  190. help
  191. Select this option to enable the STM32 FMC2 External Bus Interface
  192. controller. This driver configures the transactions with external
  193. devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on
  194. SOCs containing the FMC2 External Bus Interface.
  195. source "drivers/memory/samsung/Kconfig"
  196. source "drivers/memory/tegra/Kconfig"
  197. endif