tda18250_priv.h 3.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * NXP TDA18250BHN silicon tuner driver
  4. *
  5. * Copyright (C) 2017 Olli Salonen <olli.salonen@iki.fi>
  6. */
  7. #ifndef TDA18250_PRIV_H
  8. #define TDA18250_PRIV_H
  9. #include "tda18250.h"
  10. #define R00_ID1 0x00 /* ID byte 1 */
  11. #define R01_ID2 0x01 /* ID byte 2 */
  12. #define R02_ID3 0x02 /* ID byte 3 */
  13. #define R03_THERMO1 0x03 /* Thermo byte 1 */
  14. #define R04_THERMO2 0x04 /* Thermo byte 2 */
  15. #define R05_POWER1 0x05 /* Power byte 1 */
  16. #define R06_POWER2 0x06 /* Power byte 2 */
  17. #define R07_GPIO 0x07 /* GPIO */
  18. #define R08_IRQ1 0x08 /* IRQ */
  19. #define R09_IRQ2 0x09 /* IRQ */
  20. #define R0A_IRQ3 0x0a /* IRQ */
  21. #define R0B_IRQ4 0x0b /* IRQ */
  22. #define R0C_AGC11 0x0c /* AGC1 byte 1 */
  23. #define R0D_AGC12 0x0d /* AGC1 byte 2 */
  24. #define R0E_AGC13 0x0e /* AGC1 byte 3 */
  25. #define R0F_AGC14 0x0f /* AGC1 byte 4 */
  26. #define R10_LT1 0x10 /* LT byte 1 */
  27. #define R11_LT2 0x11 /* LT byte 2 */
  28. #define R12_AGC21 0x12 /* AGC2 byte 1 */
  29. #define R13_AGC22 0x13 /* AGC2 byte 2 */
  30. #define R14_AGC23 0x14 /* AGC2 byte 3 */
  31. #define R15_AGC24 0x15 /* AGC2 byte 4 */
  32. #define R16_AGC25 0x16 /* AGC2 byte 5 */
  33. #define R17_AGC31 0x17 /* AGC3 byte 1 */
  34. #define R18_AGC32 0x18 /* AGC3 byte 2 */
  35. #define R19_AGC33 0x19 /* AGC3 byte 3 */
  36. #define R1A_AGCK 0x1a
  37. #define R1B_GAIN1 0x1b
  38. #define R1C_GAIN2 0x1c
  39. #define R1D_GAIN3 0x1d
  40. #define R1E_WI_FI 0x1e /* Wireless Filter */
  41. #define R1F_RF_BPF 0x1f /* RF Band Pass Filter */
  42. #define R20_IR_MIX 0x20 /* IR Mixer */
  43. #define R21_IF_AGC 0x21
  44. #define R22_IF1 0x22 /* IF byte 1 */
  45. #define R23_IF2 0x23 /* IF byte 2 */
  46. #define R24_IF3 0x24 /* IF byte 3 */
  47. #define R25_REF 0x25 /* reference byte */
  48. #define R26_IF 0x26 /* IF frequency */
  49. #define R27_RF1 0x27 /* RF frequency byte 1 */
  50. #define R28_RF2 0x28 /* RF frequency byte 2 */
  51. #define R29_RF3 0x29 /* RF frequency byte 3 */
  52. #define R2A_MSM1 0x2a
  53. #define R2B_MSM2 0x2b
  54. #define R2C_PS1 0x2c /* power saving mode byte 1 */
  55. #define R2D_PS2 0x2d /* power saving mode byte 2 */
  56. #define R2E_PS3 0x2e /* power saving mode byte 3 */
  57. #define R2F_RSSI1 0x2f
  58. #define R30_RSSI2 0x30
  59. #define R31_IRQ_CTRL 0x31
  60. #define R32_DUMMY 0x32
  61. #define R33_TEST 0x33
  62. #define R34_MD1 0x34
  63. #define R35_SD1 0x35
  64. #define R36_SD2 0x36
  65. #define R37_SD3 0x37
  66. #define R38_SD4 0x38
  67. #define R39_SD5 0x39
  68. #define R3A_SD_TEST 0x3a
  69. #define R3B_REGU 0x3b
  70. #define R3C_RCCAL1 0x3c
  71. #define R3D_RCCAL2 0x3d
  72. #define R3E_IRCAL1 0x3e
  73. #define R3F_IRCAL2 0x3f
  74. #define R40_IRCAL3 0x40
  75. #define R41_IRCAL4 0x41
  76. #define R42_IRCAL5 0x42
  77. #define R43_PD1 0x43 /* power down byte 1 */
  78. #define R44_PD2 0x44 /* power down byte 2 */
  79. #define R45_PD 0x45 /* power down */
  80. #define R46_CPUMP 0x46 /* charge pump */
  81. #define R47_LNAPOL 0x47 /* LNA polar casc */
  82. #define R48_SMOOTH1 0x48 /* smooth test byte 1 */
  83. #define R49_SMOOTH2 0x49 /* smooth test byte 2 */
  84. #define R4A_SMOOTH3 0x4a /* smooth test byte 3 */
  85. #define R4B_XTALOSC1 0x4b
  86. #define R4C_XTALOSC2 0x4c
  87. #define R4D_XTALFLX1 0x4d
  88. #define R4E_XTALFLX2 0x4e
  89. #define R4F_XTALFLX3 0x4f
  90. #define R50_XTALFLX4 0x50
  91. #define R51_XTALFLX5 0x51
  92. #define R52_IRLOOP0 0x52
  93. #define R53_IRLOOP1 0x53
  94. #define R54_IRLOOP2 0x54
  95. #define R55_IRLOOP3 0x55
  96. #define R56_IRLOOP4 0x56
  97. #define R57_PLL_LOG 0x57
  98. #define R58_AGC2_UP1 0x58
  99. #define R59_AGC2_UP2 0x59
  100. #define R5A_H3H5 0x5a
  101. #define R5B_AGC_AUTO 0x5b
  102. #define R5C_AGC_DEBUG 0x5c
  103. #define TDA18250_NUM_REGS 93
  104. #define TDA18250_POWER_STANDBY 0
  105. #define TDA18250_POWER_NORMAL 1
  106. #define TDA18250_IRQ_CAL 0x81
  107. #define TDA18250_IRQ_HW_INIT 0x82
  108. #define TDA18250_IRQ_TUNE 0x88
  109. struct tda18250_dev {
  110. struct mutex i2c_mutex;
  111. struct dvb_frontend *fe;
  112. struct i2c_adapter *i2c;
  113. struct regmap *regmap;
  114. u8 xtal_freq;
  115. /* IF in kHz */
  116. u16 if_dvbt_6;
  117. u16 if_dvbt_7;
  118. u16 if_dvbt_8;
  119. u16 if_dvbc_6;
  120. u16 if_dvbc_8;
  121. u16 if_atsc;
  122. u16 if_frequency;
  123. bool slave;
  124. bool loopthrough;
  125. bool warm;
  126. u8 regs[TDA18250_NUM_REGS];
  127. };
  128. #endif