mxl5007t.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
  4. *
  5. * Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org>
  6. */
  7. #include <linux/i2c.h>
  8. #include <linux/types.h>
  9. #include <linux/videodev2.h>
  10. #include "tuner-i2c.h"
  11. #include "mxl5007t.h"
  12. static DEFINE_MUTEX(mxl5007t_list_mutex);
  13. static LIST_HEAD(hybrid_tuner_instance_list);
  14. static int mxl5007t_debug;
  15. module_param_named(debug, mxl5007t_debug, int, 0644);
  16. MODULE_PARM_DESC(debug, "set debug level");
  17. /* ------------------------------------------------------------------------- */
  18. #define mxl_printk(kern, fmt, arg...) \
  19. printk(kern "%s: " fmt "\n", __func__, ##arg)
  20. #define mxl_err(fmt, arg...) \
  21. mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)
  22. #define mxl_warn(fmt, arg...) \
  23. mxl_printk(KERN_WARNING, fmt, ##arg)
  24. #define mxl_info(fmt, arg...) \
  25. mxl_printk(KERN_INFO, fmt, ##arg)
  26. #define mxl_debug(fmt, arg...) \
  27. ({ \
  28. if (mxl5007t_debug) \
  29. mxl_printk(KERN_DEBUG, fmt, ##arg); \
  30. })
  31. #define mxl_fail(ret) \
  32. ({ \
  33. int __ret; \
  34. __ret = (ret < 0); \
  35. if (__ret) \
  36. mxl_printk(KERN_ERR, "error %d on line %d", \
  37. ret, __LINE__); \
  38. __ret; \
  39. })
  40. /* ------------------------------------------------------------------------- */
  41. enum mxl5007t_mode {
  42. MxL_MODE_ISDBT = 0,
  43. MxL_MODE_DVBT = 1,
  44. MxL_MODE_ATSC = 2,
  45. MxL_MODE_CABLE = 0x10,
  46. };
  47. enum mxl5007t_chip_version {
  48. MxL_UNKNOWN_ID = 0x00,
  49. MxL_5007_V1_F1 = 0x11,
  50. MxL_5007_V1_F2 = 0x12,
  51. MxL_5007_V4 = 0x14,
  52. MxL_5007_V2_100_F1 = 0x21,
  53. MxL_5007_V2_100_F2 = 0x22,
  54. MxL_5007_V2_200_F1 = 0x23,
  55. MxL_5007_V2_200_F2 = 0x24,
  56. };
  57. struct reg_pair_t {
  58. u8 reg;
  59. u8 val;
  60. };
  61. /* ------------------------------------------------------------------------- */
  62. static struct reg_pair_t init_tab[] = {
  63. { 0x02, 0x06 },
  64. { 0x03, 0x48 },
  65. { 0x05, 0x04 },
  66. { 0x06, 0x10 },
  67. { 0x2e, 0x15 }, /* OVERRIDE */
  68. { 0x30, 0x10 }, /* OVERRIDE */
  69. { 0x45, 0x58 }, /* OVERRIDE */
  70. { 0x48, 0x19 }, /* OVERRIDE */
  71. { 0x52, 0x03 }, /* OVERRIDE */
  72. { 0x53, 0x44 }, /* OVERRIDE */
  73. { 0x6a, 0x4b }, /* OVERRIDE */
  74. { 0x76, 0x00 }, /* OVERRIDE */
  75. { 0x78, 0x18 }, /* OVERRIDE */
  76. { 0x7a, 0x17 }, /* OVERRIDE */
  77. { 0x85, 0x06 }, /* OVERRIDE */
  78. { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
  79. { 0, 0 }
  80. };
  81. static struct reg_pair_t init_tab_cable[] = {
  82. { 0x02, 0x06 },
  83. { 0x03, 0x48 },
  84. { 0x05, 0x04 },
  85. { 0x06, 0x10 },
  86. { 0x09, 0x3f },
  87. { 0x0a, 0x3f },
  88. { 0x0b, 0x3f },
  89. { 0x2e, 0x15 }, /* OVERRIDE */
  90. { 0x30, 0x10 }, /* OVERRIDE */
  91. { 0x45, 0x58 }, /* OVERRIDE */
  92. { 0x48, 0x19 }, /* OVERRIDE */
  93. { 0x52, 0x03 }, /* OVERRIDE */
  94. { 0x53, 0x44 }, /* OVERRIDE */
  95. { 0x6a, 0x4b }, /* OVERRIDE */
  96. { 0x76, 0x00 }, /* OVERRIDE */
  97. { 0x78, 0x18 }, /* OVERRIDE */
  98. { 0x7a, 0x17 }, /* OVERRIDE */
  99. { 0x85, 0x06 }, /* OVERRIDE */
  100. { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
  101. { 0, 0 }
  102. };
  103. /* ------------------------------------------------------------------------- */
  104. static struct reg_pair_t reg_pair_rftune[] = {
  105. { 0x0f, 0x00 }, /* abort tune */
  106. { 0x0c, 0x15 },
  107. { 0x0d, 0x40 },
  108. { 0x0e, 0x0e },
  109. { 0x1f, 0x87 }, /* OVERRIDE */
  110. { 0x20, 0x1f }, /* OVERRIDE */
  111. { 0x21, 0x87 }, /* OVERRIDE */
  112. { 0x22, 0x1f }, /* OVERRIDE */
  113. { 0x80, 0x01 }, /* freq dependent */
  114. { 0x0f, 0x01 }, /* start tune */
  115. { 0, 0 }
  116. };
  117. /* ------------------------------------------------------------------------- */
  118. struct mxl5007t_state {
  119. struct list_head hybrid_tuner_instance_list;
  120. struct tuner_i2c_props i2c_props;
  121. struct mutex lock;
  122. struct mxl5007t_config *config;
  123. enum mxl5007t_chip_version chip_id;
  124. struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)];
  125. struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)];
  126. struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)];
  127. enum mxl5007t_if_freq if_freq;
  128. u32 frequency;
  129. u32 bandwidth;
  130. };
  131. /* ------------------------------------------------------------------------- */
  132. /* called by _init and _rftun to manipulate the register arrays */
  133. static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)
  134. {
  135. unsigned int i = 0;
  136. while (reg_pair[i].reg || reg_pair[i].val) {
  137. if (reg_pair[i].reg == reg) {
  138. reg_pair[i].val &= ~mask;
  139. reg_pair[i].val |= val;
  140. }
  141. i++;
  142. }
  143. return;
  144. }
  145. static void copy_reg_bits(struct reg_pair_t *reg_pair1,
  146. struct reg_pair_t *reg_pair2)
  147. {
  148. unsigned int i, j;
  149. i = j = 0;
  150. while (reg_pair1[i].reg || reg_pair1[i].val) {
  151. while (reg_pair2[j].reg || reg_pair2[j].val) {
  152. if (reg_pair1[i].reg != reg_pair2[j].reg) {
  153. j++;
  154. continue;
  155. }
  156. reg_pair2[j].val = reg_pair1[i].val;
  157. break;
  158. }
  159. i++;
  160. }
  161. return;
  162. }
  163. /* ------------------------------------------------------------------------- */
  164. static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,
  165. enum mxl5007t_mode mode,
  166. s32 if_diff_out_level)
  167. {
  168. switch (mode) {
  169. case MxL_MODE_ATSC:
  170. set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);
  171. break;
  172. case MxL_MODE_DVBT:
  173. set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);
  174. break;
  175. case MxL_MODE_ISDBT:
  176. set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);
  177. break;
  178. case MxL_MODE_CABLE:
  179. set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1);
  180. set_reg_bits(state->tab_init_cable, 0x0a, 0xff,
  181. 8 - if_diff_out_level);
  182. set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17);
  183. break;
  184. default:
  185. mxl_fail(-EINVAL);
  186. }
  187. return;
  188. }
  189. static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
  190. enum mxl5007t_if_freq if_freq,
  191. int invert_if)
  192. {
  193. u8 val;
  194. switch (if_freq) {
  195. case MxL_IF_4_MHZ:
  196. val = 0x00;
  197. break;
  198. case MxL_IF_4_5_MHZ:
  199. val = 0x02;
  200. break;
  201. case MxL_IF_4_57_MHZ:
  202. val = 0x03;
  203. break;
  204. case MxL_IF_5_MHZ:
  205. val = 0x04;
  206. break;
  207. case MxL_IF_5_38_MHZ:
  208. val = 0x05;
  209. break;
  210. case MxL_IF_6_MHZ:
  211. val = 0x06;
  212. break;
  213. case MxL_IF_6_28_MHZ:
  214. val = 0x07;
  215. break;
  216. case MxL_IF_9_1915_MHZ:
  217. val = 0x08;
  218. break;
  219. case MxL_IF_35_25_MHZ:
  220. val = 0x09;
  221. break;
  222. case MxL_IF_36_15_MHZ:
  223. val = 0x0a;
  224. break;
  225. case MxL_IF_44_MHZ:
  226. val = 0x0b;
  227. break;
  228. default:
  229. mxl_fail(-EINVAL);
  230. return;
  231. }
  232. set_reg_bits(state->tab_init, 0x02, 0x0f, val);
  233. /* set inverted IF or normal IF */
  234. set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);
  235. state->if_freq = if_freq;
  236. return;
  237. }
  238. static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,
  239. enum mxl5007t_xtal_freq xtal_freq)
  240. {
  241. switch (xtal_freq) {
  242. case MxL_XTAL_16_MHZ:
  243. /* select xtal freq & ref freq */
  244. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);
  245. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);
  246. break;
  247. case MxL_XTAL_20_MHZ:
  248. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);
  249. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);
  250. break;
  251. case MxL_XTAL_20_25_MHZ:
  252. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);
  253. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);
  254. break;
  255. case MxL_XTAL_20_48_MHZ:
  256. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);
  257. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);
  258. break;
  259. case MxL_XTAL_24_MHZ:
  260. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);
  261. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);
  262. break;
  263. case MxL_XTAL_25_MHZ:
  264. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);
  265. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);
  266. break;
  267. case MxL_XTAL_25_14_MHZ:
  268. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);
  269. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);
  270. break;
  271. case MxL_XTAL_27_MHZ:
  272. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);
  273. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);
  274. break;
  275. case MxL_XTAL_28_8_MHZ:
  276. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);
  277. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);
  278. break;
  279. case MxL_XTAL_32_MHZ:
  280. set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);
  281. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);
  282. break;
  283. case MxL_XTAL_40_MHZ:
  284. set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);
  285. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);
  286. break;
  287. case MxL_XTAL_44_MHZ:
  288. set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);
  289. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);
  290. break;
  291. case MxL_XTAL_48_MHZ:
  292. set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);
  293. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);
  294. break;
  295. case MxL_XTAL_49_3811_MHZ:
  296. set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);
  297. set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);
  298. break;
  299. default:
  300. mxl_fail(-EINVAL);
  301. return;
  302. }
  303. return;
  304. }
  305. static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,
  306. enum mxl5007t_mode mode)
  307. {
  308. struct mxl5007t_config *cfg = state->config;
  309. memcpy(&state->tab_init, &init_tab, sizeof(init_tab));
  310. memcpy(&state->tab_init_cable, &init_tab_cable, sizeof(init_tab_cable));
  311. mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level);
  312. mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);
  313. mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);
  314. set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);
  315. set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);
  316. if (mode >= MxL_MODE_CABLE) {
  317. copy_reg_bits(state->tab_init, state->tab_init_cable);
  318. return state->tab_init_cable;
  319. } else
  320. return state->tab_init;
  321. }
  322. /* ------------------------------------------------------------------------- */
  323. enum mxl5007t_bw_mhz {
  324. MxL_BW_6MHz = 6,
  325. MxL_BW_7MHz = 7,
  326. MxL_BW_8MHz = 8,
  327. };
  328. static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
  329. enum mxl5007t_bw_mhz bw)
  330. {
  331. u8 val;
  332. switch (bw) {
  333. case MxL_BW_6MHz:
  334. val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,
  335. * and DIG_MODEINDEX_CSF */
  336. break;
  337. case MxL_BW_7MHz:
  338. val = 0x2a;
  339. break;
  340. case MxL_BW_8MHz:
  341. val = 0x3f;
  342. break;
  343. default:
  344. mxl_fail(-EINVAL);
  345. return;
  346. }
  347. set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val);
  348. return;
  349. }
  350. static struct
  351. reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,
  352. u32 rf_freq, enum mxl5007t_bw_mhz bw)
  353. {
  354. u32 dig_rf_freq = 0;
  355. u32 temp;
  356. u32 frac_divider = 1000000;
  357. unsigned int i;
  358. memcpy(&state->tab_rftune, &reg_pair_rftune, sizeof(reg_pair_rftune));
  359. mxl5007t_set_bw_bits(state, bw);
  360. /* Convert RF frequency into 16 bits =>
  361. * 10 bit integer (MHz) + 6 bit fraction */
  362. dig_rf_freq = rf_freq / MHz;
  363. temp = rf_freq % MHz;
  364. for (i = 0; i < 6; i++) {
  365. dig_rf_freq <<= 1;
  366. frac_divider /= 2;
  367. if (temp > frac_divider) {
  368. temp -= frac_divider;
  369. dig_rf_freq++;
  370. }
  371. }
  372. /* add to have shift center point by 7.8124 kHz */
  373. if (temp > 7812)
  374. dig_rf_freq++;
  375. set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq);
  376. set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8));
  377. if (rf_freq >= 333000000)
  378. set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40);
  379. return state->tab_rftune;
  380. }
  381. /* ------------------------------------------------------------------------- */
  382. static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val)
  383. {
  384. u8 buf[] = { reg, val };
  385. struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,
  386. .buf = buf, .len = 2 };
  387. int ret;
  388. ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
  389. if (ret != 1) {
  390. mxl_err("failed!");
  391. return -EREMOTEIO;
  392. }
  393. return 0;
  394. }
  395. static int mxl5007t_write_regs(struct mxl5007t_state *state,
  396. struct reg_pair_t *reg_pair)
  397. {
  398. unsigned int i = 0;
  399. int ret = 0;
  400. while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) {
  401. ret = mxl5007t_write_reg(state,
  402. reg_pair[i].reg, reg_pair[i].val);
  403. i++;
  404. }
  405. return ret;
  406. }
  407. static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
  408. {
  409. u8 buf[2] = { 0xfb, reg };
  410. struct i2c_msg msg[] = {
  411. { .addr = state->i2c_props.addr, .flags = 0,
  412. .buf = buf, .len = 2 },
  413. { .addr = state->i2c_props.addr, .flags = I2C_M_RD,
  414. .buf = val, .len = 1 },
  415. };
  416. int ret;
  417. ret = i2c_transfer(state->i2c_props.adap, msg, 2);
  418. if (ret != 2) {
  419. mxl_err("failed!");
  420. return -EREMOTEIO;
  421. }
  422. return 0;
  423. }
  424. static int mxl5007t_soft_reset(struct mxl5007t_state *state)
  425. {
  426. u8 d = 0xff;
  427. struct i2c_msg msg = {
  428. .addr = state->i2c_props.addr, .flags = 0,
  429. .buf = &d, .len = 1
  430. };
  431. int ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
  432. if (ret != 1) {
  433. mxl_err("failed!");
  434. return -EREMOTEIO;
  435. }
  436. return 0;
  437. }
  438. static int mxl5007t_tuner_init(struct mxl5007t_state *state,
  439. enum mxl5007t_mode mode)
  440. {
  441. struct reg_pair_t *init_regs;
  442. int ret;
  443. /* calculate initialization reg array */
  444. init_regs = mxl5007t_calc_init_regs(state, mode);
  445. ret = mxl5007t_write_regs(state, init_regs);
  446. if (mxl_fail(ret))
  447. goto fail;
  448. mdelay(1);
  449. fail:
  450. return ret;
  451. }
  452. static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz,
  453. enum mxl5007t_bw_mhz bw)
  454. {
  455. struct reg_pair_t *rf_tune_regs;
  456. int ret;
  457. /* calculate channel change reg array */
  458. rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);
  459. ret = mxl5007t_write_regs(state, rf_tune_regs);
  460. if (mxl_fail(ret))
  461. goto fail;
  462. msleep(3);
  463. fail:
  464. return ret;
  465. }
  466. /* ------------------------------------------------------------------------- */
  467. static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,
  468. int *rf_locked, int *ref_locked)
  469. {
  470. u8 d;
  471. int ret;
  472. *rf_locked = 0;
  473. *ref_locked = 0;
  474. ret = mxl5007t_read_reg(state, 0xd8, &d);
  475. if (mxl_fail(ret))
  476. goto fail;
  477. if ((d & 0x0c) == 0x0c)
  478. *rf_locked = 1;
  479. if ((d & 0x03) == 0x03)
  480. *ref_locked = 1;
  481. fail:
  482. return ret;
  483. }
  484. /* ------------------------------------------------------------------------- */
  485. static int mxl5007t_get_status(struct dvb_frontend *fe, u32 *status)
  486. {
  487. struct mxl5007t_state *state = fe->tuner_priv;
  488. int rf_locked, ref_locked, ret;
  489. *status = 0;
  490. if (fe->ops.i2c_gate_ctrl)
  491. fe->ops.i2c_gate_ctrl(fe, 1);
  492. ret = mxl5007t_synth_lock_status(state, &rf_locked, &ref_locked);
  493. if (mxl_fail(ret))
  494. goto fail;
  495. mxl_debug("%s%s", rf_locked ? "rf locked " : "",
  496. ref_locked ? "ref locked" : "");
  497. if ((rf_locked) || (ref_locked))
  498. *status |= TUNER_STATUS_LOCKED;
  499. fail:
  500. if (fe->ops.i2c_gate_ctrl)
  501. fe->ops.i2c_gate_ctrl(fe, 0);
  502. return ret;
  503. }
  504. /* ------------------------------------------------------------------------- */
  505. static int mxl5007t_set_params(struct dvb_frontend *fe)
  506. {
  507. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  508. u32 delsys = c->delivery_system;
  509. struct mxl5007t_state *state = fe->tuner_priv;
  510. enum mxl5007t_bw_mhz bw;
  511. enum mxl5007t_mode mode;
  512. int ret;
  513. u32 freq = c->frequency;
  514. switch (delsys) {
  515. case SYS_ATSC:
  516. mode = MxL_MODE_ATSC;
  517. bw = MxL_BW_6MHz;
  518. break;
  519. case SYS_DVBC_ANNEX_B:
  520. mode = MxL_MODE_CABLE;
  521. bw = MxL_BW_6MHz;
  522. break;
  523. case SYS_DVBT:
  524. case SYS_DVBT2:
  525. mode = MxL_MODE_DVBT;
  526. switch (c->bandwidth_hz) {
  527. case 6000000:
  528. bw = MxL_BW_6MHz;
  529. break;
  530. case 7000000:
  531. bw = MxL_BW_7MHz;
  532. break;
  533. case 8000000:
  534. bw = MxL_BW_8MHz;
  535. break;
  536. default:
  537. return -EINVAL;
  538. }
  539. break;
  540. default:
  541. mxl_err("modulation type not supported!");
  542. return -EINVAL;
  543. }
  544. if (fe->ops.i2c_gate_ctrl)
  545. fe->ops.i2c_gate_ctrl(fe, 1);
  546. mutex_lock(&state->lock);
  547. ret = mxl5007t_tuner_init(state, mode);
  548. if (mxl_fail(ret))
  549. goto fail;
  550. ret = mxl5007t_tuner_rf_tune(state, freq, bw);
  551. if (mxl_fail(ret))
  552. goto fail;
  553. state->frequency = freq;
  554. state->bandwidth = c->bandwidth_hz;
  555. fail:
  556. mutex_unlock(&state->lock);
  557. if (fe->ops.i2c_gate_ctrl)
  558. fe->ops.i2c_gate_ctrl(fe, 0);
  559. return ret;
  560. }
  561. /* ------------------------------------------------------------------------- */
  562. static int mxl5007t_init(struct dvb_frontend *fe)
  563. {
  564. struct mxl5007t_state *state = fe->tuner_priv;
  565. int ret;
  566. if (fe->ops.i2c_gate_ctrl)
  567. fe->ops.i2c_gate_ctrl(fe, 1);
  568. /* wake from standby */
  569. ret = mxl5007t_write_reg(state, 0x01, 0x01);
  570. mxl_fail(ret);
  571. if (fe->ops.i2c_gate_ctrl)
  572. fe->ops.i2c_gate_ctrl(fe, 0);
  573. return ret;
  574. }
  575. static int mxl5007t_sleep(struct dvb_frontend *fe)
  576. {
  577. struct mxl5007t_state *state = fe->tuner_priv;
  578. int ret;
  579. if (fe->ops.i2c_gate_ctrl)
  580. fe->ops.i2c_gate_ctrl(fe, 1);
  581. /* enter standby mode */
  582. ret = mxl5007t_write_reg(state, 0x01, 0x00);
  583. mxl_fail(ret);
  584. ret = mxl5007t_write_reg(state, 0x0f, 0x00);
  585. mxl_fail(ret);
  586. if (fe->ops.i2c_gate_ctrl)
  587. fe->ops.i2c_gate_ctrl(fe, 0);
  588. return ret;
  589. }
  590. /* ------------------------------------------------------------------------- */
  591. static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  592. {
  593. struct mxl5007t_state *state = fe->tuner_priv;
  594. *frequency = state->frequency;
  595. return 0;
  596. }
  597. static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  598. {
  599. struct mxl5007t_state *state = fe->tuner_priv;
  600. *bandwidth = state->bandwidth;
  601. return 0;
  602. }
  603. static int mxl5007t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  604. {
  605. struct mxl5007t_state *state = fe->tuner_priv;
  606. *frequency = 0;
  607. switch (state->if_freq) {
  608. case MxL_IF_4_MHZ:
  609. *frequency = 4000000;
  610. break;
  611. case MxL_IF_4_5_MHZ:
  612. *frequency = 4500000;
  613. break;
  614. case MxL_IF_4_57_MHZ:
  615. *frequency = 4570000;
  616. break;
  617. case MxL_IF_5_MHZ:
  618. *frequency = 5000000;
  619. break;
  620. case MxL_IF_5_38_MHZ:
  621. *frequency = 5380000;
  622. break;
  623. case MxL_IF_6_MHZ:
  624. *frequency = 6000000;
  625. break;
  626. case MxL_IF_6_28_MHZ:
  627. *frequency = 6280000;
  628. break;
  629. case MxL_IF_9_1915_MHZ:
  630. *frequency = 9191500;
  631. break;
  632. case MxL_IF_35_25_MHZ:
  633. *frequency = 35250000;
  634. break;
  635. case MxL_IF_36_15_MHZ:
  636. *frequency = 36150000;
  637. break;
  638. case MxL_IF_44_MHZ:
  639. *frequency = 44000000;
  640. break;
  641. }
  642. return 0;
  643. }
  644. static void mxl5007t_release(struct dvb_frontend *fe)
  645. {
  646. struct mxl5007t_state *state = fe->tuner_priv;
  647. mutex_lock(&mxl5007t_list_mutex);
  648. if (state)
  649. hybrid_tuner_release_state(state);
  650. mutex_unlock(&mxl5007t_list_mutex);
  651. fe->tuner_priv = NULL;
  652. }
  653. /* ------------------------------------------------------------------------- */
  654. static const struct dvb_tuner_ops mxl5007t_tuner_ops = {
  655. .info = {
  656. .name = "MaxLinear MxL5007T",
  657. },
  658. .init = mxl5007t_init,
  659. .sleep = mxl5007t_sleep,
  660. .set_params = mxl5007t_set_params,
  661. .get_status = mxl5007t_get_status,
  662. .get_frequency = mxl5007t_get_frequency,
  663. .get_bandwidth = mxl5007t_get_bandwidth,
  664. .release = mxl5007t_release,
  665. .get_if_frequency = mxl5007t_get_if_frequency,
  666. };
  667. static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
  668. {
  669. char *name;
  670. int ret;
  671. u8 id;
  672. ret = mxl5007t_read_reg(state, 0xd9, &id);
  673. if (mxl_fail(ret))
  674. goto fail;
  675. switch (id) {
  676. case MxL_5007_V1_F1:
  677. name = "MxL5007.v1.f1";
  678. break;
  679. case MxL_5007_V1_F2:
  680. name = "MxL5007.v1.f2";
  681. break;
  682. case MxL_5007_V2_100_F1:
  683. name = "MxL5007.v2.100.f1";
  684. break;
  685. case MxL_5007_V2_100_F2:
  686. name = "MxL5007.v2.100.f2";
  687. break;
  688. case MxL_5007_V2_200_F1:
  689. name = "MxL5007.v2.200.f1";
  690. break;
  691. case MxL_5007_V2_200_F2:
  692. name = "MxL5007.v2.200.f2";
  693. break;
  694. case MxL_5007_V4:
  695. name = "MxL5007T.v4";
  696. break;
  697. default:
  698. name = "MxL5007T";
  699. printk(KERN_WARNING "%s: unknown rev (%02x)\n", __func__, id);
  700. id = MxL_UNKNOWN_ID;
  701. }
  702. state->chip_id = id;
  703. mxl_info("%s detected @ %d-%04x", name,
  704. i2c_adapter_id(state->i2c_props.adap),
  705. state->i2c_props.addr);
  706. return 0;
  707. fail:
  708. mxl_warn("unable to identify device @ %d-%04x",
  709. i2c_adapter_id(state->i2c_props.adap),
  710. state->i2c_props.addr);
  711. state->chip_id = MxL_UNKNOWN_ID;
  712. return ret;
  713. }
  714. struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,
  715. struct i2c_adapter *i2c, u8 addr,
  716. struct mxl5007t_config *cfg)
  717. {
  718. struct mxl5007t_state *state = NULL;
  719. int instance, ret;
  720. mutex_lock(&mxl5007t_list_mutex);
  721. instance = hybrid_tuner_request_state(struct mxl5007t_state, state,
  722. hybrid_tuner_instance_list,
  723. i2c, addr, "mxl5007t");
  724. switch (instance) {
  725. case 0:
  726. goto fail;
  727. case 1:
  728. /* new tuner instance */
  729. state->config = cfg;
  730. mutex_init(&state->lock);
  731. if (fe->ops.i2c_gate_ctrl)
  732. fe->ops.i2c_gate_ctrl(fe, 1);
  733. ret = mxl5007t_get_chip_id(state);
  734. if (fe->ops.i2c_gate_ctrl)
  735. fe->ops.i2c_gate_ctrl(fe, 0);
  736. /* check return value of mxl5007t_get_chip_id */
  737. if (mxl_fail(ret))
  738. goto fail;
  739. break;
  740. default:
  741. /* existing tuner instance */
  742. break;
  743. }
  744. if (fe->ops.i2c_gate_ctrl)
  745. fe->ops.i2c_gate_ctrl(fe, 1);
  746. ret = mxl5007t_soft_reset(state);
  747. if (fe->ops.i2c_gate_ctrl)
  748. fe->ops.i2c_gate_ctrl(fe, 0);
  749. if (mxl_fail(ret))
  750. goto fail;
  751. if (fe->ops.i2c_gate_ctrl)
  752. fe->ops.i2c_gate_ctrl(fe, 1);
  753. ret = mxl5007t_write_reg(state, 0x04,
  754. state->config->loop_thru_enable);
  755. if (fe->ops.i2c_gate_ctrl)
  756. fe->ops.i2c_gate_ctrl(fe, 0);
  757. if (mxl_fail(ret))
  758. goto fail;
  759. fe->tuner_priv = state;
  760. mutex_unlock(&mxl5007t_list_mutex);
  761. memcpy(&fe->ops.tuner_ops, &mxl5007t_tuner_ops,
  762. sizeof(struct dvb_tuner_ops));
  763. return fe;
  764. fail:
  765. mutex_unlock(&mxl5007t_list_mutex);
  766. mxl5007t_release(fe);
  767. return NULL;
  768. }
  769. EXPORT_SYMBOL_GPL(mxl5007t_attach);
  770. MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");
  771. MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
  772. MODULE_LICENSE("GPL");
  773. MODULE_VERSION("0.2");