mt2060.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Driver for Microtune MT2060 "Single chip dual conversion broadband tuner"
  4. *
  5. * Copyright (c) 2006 Olivier DANET <odanet@caramail.com>
  6. */
  7. /* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
  8. #include <linux/module.h>
  9. #include <linux/delay.h>
  10. #include <linux/dvb/frontend.h>
  11. #include <linux/i2c.h>
  12. #include <linux/slab.h>
  13. #include <media/dvb_frontend.h>
  14. #include "mt2060.h"
  15. #include "mt2060_priv.h"
  16. static int debug;
  17. module_param(debug, int, 0644);
  18. MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
  19. #define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2060: " args); printk("\n"); }} while (0)
  20. // Reads a single register
  21. static int mt2060_readreg(struct mt2060_priv *priv, u8 reg, u8 *val)
  22. {
  23. struct i2c_msg msg[2] = {
  24. { .addr = priv->cfg->i2c_address, .flags = 0, .len = 1 },
  25. { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .len = 1 },
  26. };
  27. int rc = 0;
  28. u8 *b;
  29. b = kmalloc(2, GFP_KERNEL);
  30. if (!b)
  31. return -ENOMEM;
  32. b[0] = reg;
  33. b[1] = 0;
  34. msg[0].buf = b;
  35. msg[1].buf = b + 1;
  36. if (i2c_transfer(priv->i2c, msg, 2) != 2) {
  37. printk(KERN_WARNING "mt2060 I2C read failed\n");
  38. rc = -EREMOTEIO;
  39. }
  40. *val = b[1];
  41. kfree(b);
  42. return rc;
  43. }
  44. // Writes a single register
  45. static int mt2060_writereg(struct mt2060_priv *priv, u8 reg, u8 val)
  46. {
  47. struct i2c_msg msg = {
  48. .addr = priv->cfg->i2c_address, .flags = 0, .len = 2
  49. };
  50. u8 *buf;
  51. int rc = 0;
  52. buf = kmalloc(2, GFP_KERNEL);
  53. if (!buf)
  54. return -ENOMEM;
  55. buf[0] = reg;
  56. buf[1] = val;
  57. msg.buf = buf;
  58. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  59. printk(KERN_WARNING "mt2060 I2C write failed\n");
  60. rc = -EREMOTEIO;
  61. }
  62. kfree(buf);
  63. return rc;
  64. }
  65. // Writes a set of consecutive registers
  66. static int mt2060_writeregs(struct mt2060_priv *priv,u8 *buf, u8 len)
  67. {
  68. int rem, val_len;
  69. u8 *xfer_buf;
  70. int rc = 0;
  71. struct i2c_msg msg = {
  72. .addr = priv->cfg->i2c_address, .flags = 0
  73. };
  74. xfer_buf = kmalloc(16, GFP_KERNEL);
  75. if (!xfer_buf)
  76. return -ENOMEM;
  77. msg.buf = xfer_buf;
  78. for (rem = len - 1; rem > 0; rem -= priv->i2c_max_regs) {
  79. val_len = min_t(int, rem, priv->i2c_max_regs);
  80. msg.len = 1 + val_len;
  81. xfer_buf[0] = buf[0] + len - 1 - rem;
  82. memcpy(&xfer_buf[1], &buf[1 + len - 1 - rem], val_len);
  83. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  84. printk(KERN_WARNING "mt2060 I2C write failed (len=%i)\n", val_len);
  85. rc = -EREMOTEIO;
  86. break;
  87. }
  88. }
  89. kfree(xfer_buf);
  90. return rc;
  91. }
  92. // Initialisation sequences
  93. // LNABAND=3, NUM1=0x3C, DIV1=0x74, NUM2=0x1080, DIV2=0x49
  94. static u8 mt2060_config1[] = {
  95. REG_LO1C1,
  96. 0x3F, 0x74, 0x00, 0x08, 0x93
  97. };
  98. // FMCG=2, GP2=0, GP1=0
  99. static u8 mt2060_config2[] = {
  100. REG_MISC_CTRL,
  101. 0x20, 0x1E, 0x30, 0xff, 0x80, 0xff, 0x00, 0x2c, 0x42
  102. };
  103. // VGAG=3, V1CSE=1
  104. #ifdef MT2060_SPURCHECK
  105. /* The function below calculates the frequency offset between the output frequency if2
  106. and the closer cross modulation subcarrier between lo1 and lo2 up to the tenth harmonic */
  107. static int mt2060_spurcalc(u32 lo1,u32 lo2,u32 if2)
  108. {
  109. int I,J;
  110. int dia,diamin,diff;
  111. diamin=1000000;
  112. for (I = 1; I < 10; I++) {
  113. J = ((2*I*lo1)/lo2+1)/2;
  114. diff = I*(int)lo1-J*(int)lo2;
  115. if (diff < 0) diff=-diff;
  116. dia = (diff-(int)if2);
  117. if (dia < 0) dia=-dia;
  118. if (diamin > dia) diamin=dia;
  119. }
  120. return diamin;
  121. }
  122. #define BANDWIDTH 4000 // kHz
  123. /* Calculates the frequency offset to add to avoid spurs. Returns 0 if no offset is needed */
  124. static int mt2060_spurcheck(u32 lo1,u32 lo2,u32 if2)
  125. {
  126. u32 Spur,Sp1,Sp2;
  127. int I,J;
  128. I=0;
  129. J=1000;
  130. Spur=mt2060_spurcalc(lo1,lo2,if2);
  131. if (Spur < BANDWIDTH) {
  132. /* Potential spurs detected */
  133. dprintk("Spurs before : f_lo1: %d f_lo2: %d (kHz)",
  134. (int)lo1,(int)lo2);
  135. I=1000;
  136. Sp1 = mt2060_spurcalc(lo1+I,lo2+I,if2);
  137. Sp2 = mt2060_spurcalc(lo1-I,lo2-I,if2);
  138. if (Sp1 < Sp2) {
  139. J=-J; I=-I; Spur=Sp2;
  140. } else
  141. Spur=Sp1;
  142. while (Spur < BANDWIDTH) {
  143. I += J;
  144. Spur = mt2060_spurcalc(lo1+I,lo2+I,if2);
  145. }
  146. dprintk("Spurs after : f_lo1: %d f_lo2: %d (kHz)",
  147. (int)(lo1+I),(int)(lo2+I));
  148. }
  149. return I;
  150. }
  151. #endif
  152. #define IF2 36150 // IF2 frequency = 36.150 MHz
  153. #define FREF 16000 // Quartz oscillator 16 MHz
  154. static int mt2060_set_params(struct dvb_frontend *fe)
  155. {
  156. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  157. struct mt2060_priv *priv;
  158. int i=0;
  159. u32 freq;
  160. u8 lnaband;
  161. u32 f_lo1,f_lo2;
  162. u32 div1,num1,div2,num2;
  163. u8 b[8];
  164. u32 if1;
  165. priv = fe->tuner_priv;
  166. if1 = priv->if1_freq;
  167. b[0] = REG_LO1B1;
  168. b[1] = 0xFF;
  169. if (fe->ops.i2c_gate_ctrl)
  170. fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
  171. mt2060_writeregs(priv,b,2);
  172. freq = c->frequency / 1000; /* Hz -> kHz */
  173. f_lo1 = freq + if1 * 1000;
  174. f_lo1 = (f_lo1 / 250) * 250;
  175. f_lo2 = f_lo1 - freq - IF2;
  176. // From the Comtech datasheet, the step used is 50kHz. The tuner chip could be more precise
  177. f_lo2 = ((f_lo2 + 25) / 50) * 50;
  178. priv->frequency = (f_lo1 - f_lo2 - IF2) * 1000,
  179. #ifdef MT2060_SPURCHECK
  180. // LO-related spurs detection and correction
  181. num1 = mt2060_spurcheck(f_lo1,f_lo2,IF2);
  182. f_lo1 += num1;
  183. f_lo2 += num1;
  184. #endif
  185. //Frequency LO1 = 16MHz * (DIV1 + NUM1/64 )
  186. num1 = f_lo1 / (FREF / 64);
  187. div1 = num1 / 64;
  188. num1 &= 0x3f;
  189. // Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 )
  190. num2 = f_lo2 * 64 / (FREF / 128);
  191. div2 = num2 / 8192;
  192. num2 &= 0x1fff;
  193. if (freq <= 95000) lnaband = 0xB0; else
  194. if (freq <= 180000) lnaband = 0xA0; else
  195. if (freq <= 260000) lnaband = 0x90; else
  196. if (freq <= 335000) lnaband = 0x80; else
  197. if (freq <= 425000) lnaband = 0x70; else
  198. if (freq <= 480000) lnaband = 0x60; else
  199. if (freq <= 570000) lnaband = 0x50; else
  200. if (freq <= 645000) lnaband = 0x40; else
  201. if (freq <= 730000) lnaband = 0x30; else
  202. if (freq <= 810000) lnaband = 0x20; else lnaband = 0x10;
  203. b[0] = REG_LO1C1;
  204. b[1] = lnaband | ((num1 >>2) & 0x0F);
  205. b[2] = div1;
  206. b[3] = (num2 & 0x0F) | ((num1 & 3) << 4);
  207. b[4] = num2 >> 4;
  208. b[5] = ((num2 >>12) & 1) | (div2 << 1);
  209. dprintk("IF1: %dMHz",(int)if1);
  210. dprintk("PLL freq=%dkHz f_lo1=%dkHz f_lo2=%dkHz",(int)freq,(int)f_lo1,(int)f_lo2);
  211. dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2);
  212. dprintk("PLL [1..5]: %2x %2x %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3],(int)b[4],(int)b[5]);
  213. mt2060_writeregs(priv,b,6);
  214. //Waits for pll lock or timeout
  215. i = 0;
  216. do {
  217. mt2060_readreg(priv,REG_LO_STATUS,b);
  218. if ((b[0] & 0x88)==0x88)
  219. break;
  220. msleep(4);
  221. i++;
  222. } while (i<10);
  223. if (fe->ops.i2c_gate_ctrl)
  224. fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
  225. return 0;
  226. }
  227. static void mt2060_calibrate(struct mt2060_priv *priv)
  228. {
  229. u8 b = 0;
  230. int i = 0;
  231. if (mt2060_writeregs(priv,mt2060_config1,sizeof(mt2060_config1)))
  232. return;
  233. if (mt2060_writeregs(priv,mt2060_config2,sizeof(mt2060_config2)))
  234. return;
  235. /* initialize the clock output */
  236. mt2060_writereg(priv, REG_VGAG, (priv->cfg->clock_out << 6) | 0x30);
  237. do {
  238. b |= (1 << 6); // FM1SS;
  239. mt2060_writereg(priv, REG_LO2C1,b);
  240. msleep(20);
  241. if (i == 0) {
  242. b |= (1 << 7); // FM1CA;
  243. mt2060_writereg(priv, REG_LO2C1,b);
  244. b &= ~(1 << 7); // FM1CA;
  245. msleep(20);
  246. }
  247. b &= ~(1 << 6); // FM1SS
  248. mt2060_writereg(priv, REG_LO2C1,b);
  249. msleep(20);
  250. i++;
  251. } while (i < 9);
  252. i = 0;
  253. while (i++ < 10 && mt2060_readreg(priv, REG_MISC_STAT, &b) == 0 && (b & (1 << 6)) == 0)
  254. msleep(20);
  255. if (i <= 10) {
  256. mt2060_readreg(priv, REG_FM_FREQ, &priv->fmfreq); // now find out, what is fmreq used for :)
  257. dprintk("calibration was successful: %d", (int)priv->fmfreq);
  258. } else
  259. dprintk("FMCAL timed out");
  260. }
  261. static int mt2060_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  262. {
  263. struct mt2060_priv *priv = fe->tuner_priv;
  264. *frequency = priv->frequency;
  265. return 0;
  266. }
  267. static int mt2060_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  268. {
  269. *frequency = IF2 * 1000;
  270. return 0;
  271. }
  272. static int mt2060_init(struct dvb_frontend *fe)
  273. {
  274. struct mt2060_priv *priv = fe->tuner_priv;
  275. int ret;
  276. if (fe->ops.i2c_gate_ctrl)
  277. fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
  278. if (priv->sleep) {
  279. ret = mt2060_writereg(priv, REG_MISC_CTRL, 0x20);
  280. if (ret)
  281. goto err_i2c_gate_ctrl;
  282. }
  283. ret = mt2060_writereg(priv, REG_VGAG,
  284. (priv->cfg->clock_out << 6) | 0x33);
  285. err_i2c_gate_ctrl:
  286. if (fe->ops.i2c_gate_ctrl)
  287. fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
  288. return ret;
  289. }
  290. static int mt2060_sleep(struct dvb_frontend *fe)
  291. {
  292. struct mt2060_priv *priv = fe->tuner_priv;
  293. int ret;
  294. if (fe->ops.i2c_gate_ctrl)
  295. fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
  296. ret = mt2060_writereg(priv, REG_VGAG,
  297. (priv->cfg->clock_out << 6) | 0x30);
  298. if (ret)
  299. goto err_i2c_gate_ctrl;
  300. if (priv->sleep)
  301. ret = mt2060_writereg(priv, REG_MISC_CTRL, 0xe8);
  302. err_i2c_gate_ctrl:
  303. if (fe->ops.i2c_gate_ctrl)
  304. fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
  305. return ret;
  306. }
  307. static void mt2060_release(struct dvb_frontend *fe)
  308. {
  309. kfree(fe->tuner_priv);
  310. fe->tuner_priv = NULL;
  311. }
  312. static const struct dvb_tuner_ops mt2060_tuner_ops = {
  313. .info = {
  314. .name = "Microtune MT2060",
  315. .frequency_min_hz = 48 * MHz,
  316. .frequency_max_hz = 860 * MHz,
  317. .frequency_step_hz = 50 * kHz,
  318. },
  319. .release = mt2060_release,
  320. .init = mt2060_init,
  321. .sleep = mt2060_sleep,
  322. .set_params = mt2060_set_params,
  323. .get_frequency = mt2060_get_frequency,
  324. .get_if_frequency = mt2060_get_if_frequency,
  325. };
  326. /* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */
  327. struct dvb_frontend * mt2060_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2060_config *cfg, u16 if1)
  328. {
  329. struct mt2060_priv *priv = NULL;
  330. u8 id = 0;
  331. priv = kzalloc(sizeof(struct mt2060_priv), GFP_KERNEL);
  332. if (priv == NULL)
  333. return NULL;
  334. priv->cfg = cfg;
  335. priv->i2c = i2c;
  336. priv->if1_freq = if1;
  337. priv->i2c_max_regs = ~0;
  338. if (fe->ops.i2c_gate_ctrl)
  339. fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
  340. if (mt2060_readreg(priv,REG_PART_REV,&id) != 0) {
  341. kfree(priv);
  342. return NULL;
  343. }
  344. if (id != PART_REV) {
  345. kfree(priv);
  346. return NULL;
  347. }
  348. printk(KERN_INFO "MT2060: successfully identified (IF1 = %d)\n", if1);
  349. memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(struct dvb_tuner_ops));
  350. fe->tuner_priv = priv;
  351. mt2060_calibrate(priv);
  352. if (fe->ops.i2c_gate_ctrl)
  353. fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
  354. return fe;
  355. }
  356. EXPORT_SYMBOL(mt2060_attach);
  357. static int mt2060_probe(struct i2c_client *client,
  358. const struct i2c_device_id *id)
  359. {
  360. struct mt2060_platform_data *pdata = client->dev.platform_data;
  361. struct dvb_frontend *fe;
  362. struct mt2060_priv *dev;
  363. int ret;
  364. u8 chip_id;
  365. dev_dbg(&client->dev, "\n");
  366. if (!pdata) {
  367. dev_err(&client->dev, "Cannot proceed without platform data\n");
  368. ret = -EINVAL;
  369. goto err;
  370. }
  371. dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
  372. if (!dev) {
  373. ret = -ENOMEM;
  374. goto err;
  375. }
  376. fe = pdata->dvb_frontend;
  377. dev->config.i2c_address = client->addr;
  378. dev->config.clock_out = pdata->clock_out;
  379. dev->cfg = &dev->config;
  380. dev->i2c = client->adapter;
  381. dev->if1_freq = pdata->if1 ? pdata->if1 : 1220;
  382. dev->client = client;
  383. dev->i2c_max_regs = pdata->i2c_write_max ? pdata->i2c_write_max - 1 : ~0;
  384. dev->sleep = true;
  385. ret = mt2060_readreg(dev, REG_PART_REV, &chip_id);
  386. if (ret) {
  387. ret = -ENODEV;
  388. goto err;
  389. }
  390. dev_dbg(&client->dev, "chip id=%02x\n", chip_id);
  391. if (chip_id != PART_REV) {
  392. ret = -ENODEV;
  393. goto err;
  394. }
  395. /* Power on, calibrate, sleep */
  396. ret = mt2060_writereg(dev, REG_MISC_CTRL, 0x20);
  397. if (ret)
  398. goto err;
  399. mt2060_calibrate(dev);
  400. ret = mt2060_writereg(dev, REG_MISC_CTRL, 0xe8);
  401. if (ret)
  402. goto err;
  403. dev_info(&client->dev, "Microtune MT2060 successfully identified\n");
  404. memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(fe->ops.tuner_ops));
  405. fe->ops.tuner_ops.release = NULL;
  406. fe->tuner_priv = dev;
  407. i2c_set_clientdata(client, dev);
  408. return 0;
  409. err:
  410. dev_dbg(&client->dev, "failed=%d\n", ret);
  411. return ret;
  412. }
  413. static int mt2060_remove(struct i2c_client *client)
  414. {
  415. dev_dbg(&client->dev, "\n");
  416. return 0;
  417. }
  418. static const struct i2c_device_id mt2060_id_table[] = {
  419. {"mt2060", 0},
  420. {}
  421. };
  422. MODULE_DEVICE_TABLE(i2c, mt2060_id_table);
  423. static struct i2c_driver mt2060_driver = {
  424. .driver = {
  425. .name = "mt2060",
  426. .suppress_bind_attrs = true,
  427. },
  428. .probe = mt2060_probe,
  429. .remove = mt2060_remove,
  430. .id_table = mt2060_id_table,
  431. };
  432. module_i2c_driver(mt2060_driver);
  433. MODULE_AUTHOR("Olivier DANET");
  434. MODULE_DESCRIPTION("Microtune MT2060 silicon tuner driver");
  435. MODULE_LICENSE("GPL");