mc44s803_priv.h 5.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Driver for Freescale MC44S803 Low Power CMOS Broadband Tuner
  4. *
  5. * Copyright (c) 2009 Jochen Friedrich <jochen@scram.de>
  6. */
  7. #ifndef MC44S803_PRIV_H
  8. #define MC44S803_PRIV_H
  9. /* This driver is based on the information available in the datasheet
  10. http://www.freescale.com/files/rf_if/doc/data_sheet/MC44S803.pdf
  11. SPI or I2C Address : 0xc0-0xc6
  12. Reg.No | Function
  13. -------------------------------------------
  14. 00 | Power Down
  15. 01 | Reference Oszillator
  16. 02 | Reference Dividers
  17. 03 | Mixer and Reference Buffer
  18. 04 | Reset/Serial Out
  19. 05 | LO 1
  20. 06 | LO 2
  21. 07 | Circuit Adjust
  22. 08 | Test
  23. 09 | Digital Tune
  24. 0A | LNA AGC
  25. 0B | Data Register Address
  26. 0C | Regulator Test
  27. 0D | VCO Test
  28. 0E | LNA Gain/Input Power
  29. 0F | ID Bits
  30. */
  31. #define MC44S803_OSC 26000000 /* 26 MHz */
  32. #define MC44S803_IF1 1086000000 /* 1086 MHz */
  33. #define MC44S803_IF2 36125000 /* 36.125 MHz */
  34. #define MC44S803_REG_POWER 0
  35. #define MC44S803_REG_REFOSC 1
  36. #define MC44S803_REG_REFDIV 2
  37. #define MC44S803_REG_MIXER 3
  38. #define MC44S803_REG_RESET 4
  39. #define MC44S803_REG_LO1 5
  40. #define MC44S803_REG_LO2 6
  41. #define MC44S803_REG_CIRCADJ 7
  42. #define MC44S803_REG_TEST 8
  43. #define MC44S803_REG_DIGTUNE 9
  44. #define MC44S803_REG_LNAAGC 0x0A
  45. #define MC44S803_REG_DATAREG 0x0B
  46. #define MC44S803_REG_REGTEST 0x0C
  47. #define MC44S803_REG_VCOTEST 0x0D
  48. #define MC44S803_REG_LNAGAIN 0x0E
  49. #define MC44S803_REG_ID 0x0F
  50. /* Register definitions */
  51. #define MC44S803_ADDR 0x0F
  52. #define MC44S803_ADDR_S 0
  53. /* REG_POWER */
  54. #define MC44S803_POWER 0xFFFFF0
  55. #define MC44S803_POWER_S 4
  56. /* REG_REFOSC */
  57. #define MC44S803_REFOSC 0x1FF0
  58. #define MC44S803_REFOSC_S 4
  59. #define MC44S803_OSCSEL 0x2000
  60. #define MC44S803_OSCSEL_S 13
  61. /* REG_REFDIV */
  62. #define MC44S803_R2 0x1FF0
  63. #define MC44S803_R2_S 4
  64. #define MC44S803_REFBUF_EN 0x2000
  65. #define MC44S803_REFBUF_EN_S 13
  66. #define MC44S803_R1 0x7C000
  67. #define MC44S803_R1_S 14
  68. /* REG_MIXER */
  69. #define MC44S803_R3 0x70
  70. #define MC44S803_R3_S 4
  71. #define MC44S803_MUX3 0x80
  72. #define MC44S803_MUX3_S 7
  73. #define MC44S803_MUX4 0x100
  74. #define MC44S803_MUX4_S 8
  75. #define MC44S803_OSC_SCR 0x200
  76. #define MC44S803_OSC_SCR_S 9
  77. #define MC44S803_TRI_STATE 0x400
  78. #define MC44S803_TRI_STATE_S 10
  79. #define MC44S803_BUF_GAIN 0x800
  80. #define MC44S803_BUF_GAIN_S 11
  81. #define MC44S803_BUF_IO 0x1000
  82. #define MC44S803_BUF_IO_S 12
  83. #define MC44S803_MIXER_RES 0xFE000
  84. #define MC44S803_MIXER_RES_S 13
  85. /* REG_RESET */
  86. #define MC44S803_RS 0x10
  87. #define MC44S803_RS_S 4
  88. #define MC44S803_SO 0x20
  89. #define MC44S803_SO_S 5
  90. /* REG_LO1 */
  91. #define MC44S803_LO1 0xFFF0
  92. #define MC44S803_LO1_S 4
  93. /* REG_LO2 */
  94. #define MC44S803_LO2 0x7FFF0
  95. #define MC44S803_LO2_S 4
  96. /* REG_CIRCADJ */
  97. #define MC44S803_G1 0x20
  98. #define MC44S803_G1_S 5
  99. #define MC44S803_G3 0x80
  100. #define MC44S803_G3_S 7
  101. #define MC44S803_CIRCADJ_RES 0x300
  102. #define MC44S803_CIRCADJ_RES_S 8
  103. #define MC44S803_G6 0x400
  104. #define MC44S803_G6_S 10
  105. #define MC44S803_G7 0x800
  106. #define MC44S803_G7_S 11
  107. #define MC44S803_S1 0x1000
  108. #define MC44S803_S1_S 12
  109. #define MC44S803_LP 0x7E000
  110. #define MC44S803_LP_S 13
  111. #define MC44S803_CLRF 0x80000
  112. #define MC44S803_CLRF_S 19
  113. #define MC44S803_CLIF 0x100000
  114. #define MC44S803_CLIF_S 20
  115. /* REG_TEST */
  116. /* REG_DIGTUNE */
  117. #define MC44S803_DA 0xF0
  118. #define MC44S803_DA_S 4
  119. #define MC44S803_XOD 0x300
  120. #define MC44S803_XOD_S 8
  121. #define MC44S803_RST 0x10000
  122. #define MC44S803_RST_S 16
  123. #define MC44S803_LO_REF 0x1FFF00
  124. #define MC44S803_LO_REF_S 8
  125. #define MC44S803_AT 0x200000
  126. #define MC44S803_AT_S 21
  127. #define MC44S803_MT 0x400000
  128. #define MC44S803_MT_S 22
  129. /* REG_LNAAGC */
  130. #define MC44S803_G 0x3F0
  131. #define MC44S803_G_S 4
  132. #define MC44S803_AT1 0x400
  133. #define MC44S803_AT1_S 10
  134. #define MC44S803_AT2 0x800
  135. #define MC44S803_AT2_S 11
  136. #define MC44S803_HL_GR_EN 0x8000
  137. #define MC44S803_HL_GR_EN_S 15
  138. #define MC44S803_AGC_AN_DIG 0x10000
  139. #define MC44S803_AGC_AN_DIG_S 16
  140. #define MC44S803_ATTEN_EN 0x20000
  141. #define MC44S803_ATTEN_EN_S 17
  142. #define MC44S803_AGC_READ_EN 0x40000
  143. #define MC44S803_AGC_READ_EN_S 18
  144. #define MC44S803_LNA0 0x80000
  145. #define MC44S803_LNA0_S 19
  146. #define MC44S803_AGC_SEL 0x100000
  147. #define MC44S803_AGC_SEL_S 20
  148. #define MC44S803_AT0 0x200000
  149. #define MC44S803_AT0_S 21
  150. #define MC44S803_B 0xC00000
  151. #define MC44S803_B_S 22
  152. /* REG_DATAREG */
  153. #define MC44S803_D 0xF0
  154. #define MC44S803_D_S 4
  155. /* REG_REGTEST */
  156. /* REG_VCOTEST */
  157. /* REG_LNAGAIN */
  158. #define MC44S803_IF_PWR 0x700
  159. #define MC44S803_IF_PWR_S 8
  160. #define MC44S803_RF_PWR 0x3800
  161. #define MC44S803_RF_PWR_S 11
  162. #define MC44S803_LNA_GAIN 0xFC000
  163. #define MC44S803_LNA_GAIN_S 14
  164. /* REG_ID */
  165. #define MC44S803_ID 0x3E00
  166. #define MC44S803_ID_S 9
  167. /* Some macros to read/write fields */
  168. /* First shift, then mask */
  169. #define MC44S803_REG_SM(_val, _reg) \
  170. (((_val) << _reg##_S) & (_reg))
  171. /* First mask, then shift */
  172. #define MC44S803_REG_MS(_val, _reg) \
  173. (((_val) & (_reg)) >> _reg##_S)
  174. struct mc44s803_priv {
  175. struct mc44s803_config *cfg;
  176. struct i2c_adapter *i2c;
  177. struct dvb_frontend *fe;
  178. u32 frequency;
  179. };
  180. #endif