st_rc.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2013 STMicroelectronics Limited
  4. * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/clk.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/module.h>
  10. #include <linux/of.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/reset.h>
  13. #include <media/rc-core.h>
  14. #include <linux/pinctrl/consumer.h>
  15. #include <linux/pm_wakeirq.h>
  16. struct st_rc_device {
  17. struct device *dev;
  18. int irq;
  19. int irq_wake;
  20. struct clk *sys_clock;
  21. void __iomem *base; /* Register base address */
  22. void __iomem *rx_base;/* RX Register base address */
  23. struct rc_dev *rdev;
  24. bool overclocking;
  25. int sample_mult;
  26. int sample_div;
  27. bool rxuhfmode;
  28. struct reset_control *rstc;
  29. };
  30. /* Registers */
  31. #define IRB_SAMPLE_RATE_COMM 0x64 /* sample freq divisor*/
  32. #define IRB_CLOCK_SEL 0x70 /* clock select */
  33. #define IRB_CLOCK_SEL_STATUS 0x74 /* clock status */
  34. /* IRB IR/UHF receiver registers */
  35. #define IRB_RX_ON 0x40 /* pulse time capture */
  36. #define IRB_RX_SYS 0X44 /* sym period capture */
  37. #define IRB_RX_INT_EN 0x48 /* IRQ enable (R/W) */
  38. #define IRB_RX_INT_STATUS 0x4c /* IRQ status (R/W) */
  39. #define IRB_RX_EN 0x50 /* Receive enable */
  40. #define IRB_MAX_SYM_PERIOD 0x54 /* max sym value */
  41. #define IRB_RX_INT_CLEAR 0x58 /* overrun status */
  42. #define IRB_RX_STATUS 0x6c /* receive status */
  43. #define IRB_RX_NOISE_SUPPR 0x5c /* noise suppression */
  44. #define IRB_RX_POLARITY_INV 0x68 /* polarity inverter */
  45. /*
  46. * IRQ set: Enable full FIFO 1 -> bit 3;
  47. * Enable overrun IRQ 1 -> bit 2;
  48. * Enable last symbol IRQ 1 -> bit 1:
  49. * Enable RX interrupt 1 -> bit 0;
  50. */
  51. #define IRB_RX_INTS 0x0f
  52. #define IRB_RX_OVERRUN_INT 0x04
  53. /* maximum symbol period (microsecs),timeout to detect end of symbol train */
  54. #define MAX_SYMB_TIME 0x5000
  55. #define IRB_SAMPLE_FREQ 10000000
  56. #define IRB_FIFO_NOT_EMPTY 0xff00
  57. #define IRB_OVERFLOW 0x4
  58. #define IRB_TIMEOUT 0xffff
  59. #define IR_ST_NAME "st-rc"
  60. static void st_rc_send_lirc_timeout(struct rc_dev *rdev)
  61. {
  62. struct ir_raw_event ev = { .timeout = true, .duration = rdev->timeout };
  63. ir_raw_event_store(rdev, &ev);
  64. }
  65. /*
  66. * RX graphical example to better understand the difference between ST IR block
  67. * output and standard definition used by LIRC (and most of the world!)
  68. *
  69. * mark mark
  70. * |-IRB_RX_ON-| |-IRB_RX_ON-|
  71. * ___ ___ ___ ___ ___ ___ _
  72. * | | | | | | | | | | | | |
  73. * | | | | | | space 0 | | | | | | space 1 |
  74. * _____| |__| |__| |____________________________| |__| |__| |_____________|
  75. *
  76. * |--------------- IRB_RX_SYS -------------|------ IRB_RX_SYS -------|
  77. *
  78. * |------------- encoding bit 0 -----------|---- encoding bit 1 -----|
  79. *
  80. * ST hardware returns mark (IRB_RX_ON) and total symbol time (IRB_RX_SYS), so
  81. * convert to standard mark/space we have to calculate space=(IRB_RX_SYS-mark)
  82. * The mark time represents the amount of time the carrier (usually 36-40kHz)
  83. * is detected.The above examples shows Pulse Width Modulation encoding where
  84. * bit 0 is represented by space>mark.
  85. */
  86. static irqreturn_t st_rc_rx_interrupt(int irq, void *data)
  87. {
  88. unsigned long timeout;
  89. unsigned int symbol, mark = 0;
  90. struct st_rc_device *dev = data;
  91. int last_symbol = 0;
  92. u32 status, int_status;
  93. struct ir_raw_event ev = {};
  94. if (dev->irq_wake)
  95. pm_wakeup_event(dev->dev, 0);
  96. /* FIXME: is 10ms good enough ? */
  97. timeout = jiffies + msecs_to_jiffies(10);
  98. do {
  99. status = readl(dev->rx_base + IRB_RX_STATUS);
  100. if (!(status & (IRB_FIFO_NOT_EMPTY | IRB_OVERFLOW)))
  101. break;
  102. int_status = readl(dev->rx_base + IRB_RX_INT_STATUS);
  103. if (unlikely(int_status & IRB_RX_OVERRUN_INT)) {
  104. /* discard the entire collection in case of errors! */
  105. ir_raw_event_reset(dev->rdev);
  106. dev_info(dev->dev, "IR RX overrun\n");
  107. writel(IRB_RX_OVERRUN_INT,
  108. dev->rx_base + IRB_RX_INT_CLEAR);
  109. continue;
  110. }
  111. symbol = readl(dev->rx_base + IRB_RX_SYS);
  112. mark = readl(dev->rx_base + IRB_RX_ON);
  113. if (symbol == IRB_TIMEOUT)
  114. last_symbol = 1;
  115. /* Ignore any noise */
  116. if ((mark > 2) && (symbol > 1)) {
  117. symbol -= mark;
  118. if (dev->overclocking) { /* adjustments to timings */
  119. symbol *= dev->sample_mult;
  120. symbol /= dev->sample_div;
  121. mark *= dev->sample_mult;
  122. mark /= dev->sample_div;
  123. }
  124. ev.duration = mark;
  125. ev.pulse = true;
  126. ir_raw_event_store(dev->rdev, &ev);
  127. if (!last_symbol) {
  128. ev.duration = symbol;
  129. ev.pulse = false;
  130. ir_raw_event_store(dev->rdev, &ev);
  131. } else {
  132. st_rc_send_lirc_timeout(dev->rdev);
  133. }
  134. }
  135. last_symbol = 0;
  136. } while (time_is_after_jiffies(timeout));
  137. writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_CLEAR);
  138. /* Empty software fifo */
  139. ir_raw_event_handle(dev->rdev);
  140. return IRQ_HANDLED;
  141. }
  142. static void st_rc_hardware_init(struct st_rc_device *dev)
  143. {
  144. int baseclock, freqdiff;
  145. unsigned int rx_max_symbol_per = MAX_SYMB_TIME;
  146. unsigned int rx_sampling_freq_div;
  147. /* Enable the IP */
  148. reset_control_deassert(dev->rstc);
  149. clk_prepare_enable(dev->sys_clock);
  150. baseclock = clk_get_rate(dev->sys_clock);
  151. /* IRB input pins are inverted internally from high to low. */
  152. writel(1, dev->rx_base + IRB_RX_POLARITY_INV);
  153. rx_sampling_freq_div = baseclock / IRB_SAMPLE_FREQ;
  154. writel(rx_sampling_freq_div, dev->base + IRB_SAMPLE_RATE_COMM);
  155. freqdiff = baseclock - (rx_sampling_freq_div * IRB_SAMPLE_FREQ);
  156. if (freqdiff) { /* over clocking, workout the adjustment factors */
  157. dev->overclocking = true;
  158. dev->sample_mult = 1000;
  159. dev->sample_div = baseclock / (10000 * rx_sampling_freq_div);
  160. rx_max_symbol_per = (rx_max_symbol_per * 1000)/dev->sample_div;
  161. }
  162. writel(rx_max_symbol_per, dev->rx_base + IRB_MAX_SYM_PERIOD);
  163. }
  164. static int st_rc_remove(struct platform_device *pdev)
  165. {
  166. struct st_rc_device *rc_dev = platform_get_drvdata(pdev);
  167. dev_pm_clear_wake_irq(&pdev->dev);
  168. device_init_wakeup(&pdev->dev, false);
  169. clk_disable_unprepare(rc_dev->sys_clock);
  170. rc_unregister_device(rc_dev->rdev);
  171. return 0;
  172. }
  173. static int st_rc_open(struct rc_dev *rdev)
  174. {
  175. struct st_rc_device *dev = rdev->priv;
  176. unsigned long flags;
  177. local_irq_save(flags);
  178. /* enable interrupts and receiver */
  179. writel(IRB_RX_INTS, dev->rx_base + IRB_RX_INT_EN);
  180. writel(0x01, dev->rx_base + IRB_RX_EN);
  181. local_irq_restore(flags);
  182. return 0;
  183. }
  184. static void st_rc_close(struct rc_dev *rdev)
  185. {
  186. struct st_rc_device *dev = rdev->priv;
  187. /* disable interrupts and receiver */
  188. writel(0x00, dev->rx_base + IRB_RX_EN);
  189. writel(0x00, dev->rx_base + IRB_RX_INT_EN);
  190. }
  191. static int st_rc_probe(struct platform_device *pdev)
  192. {
  193. int ret = -EINVAL;
  194. struct rc_dev *rdev;
  195. struct device *dev = &pdev->dev;
  196. struct resource *res;
  197. struct st_rc_device *rc_dev;
  198. struct device_node *np = pdev->dev.of_node;
  199. const char *rx_mode;
  200. rc_dev = devm_kzalloc(dev, sizeof(struct st_rc_device), GFP_KERNEL);
  201. if (!rc_dev)
  202. return -ENOMEM;
  203. rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
  204. if (!rdev)
  205. return -ENOMEM;
  206. if (np && !of_property_read_string(np, "rx-mode", &rx_mode)) {
  207. if (!strcmp(rx_mode, "uhf")) {
  208. rc_dev->rxuhfmode = true;
  209. } else if (!strcmp(rx_mode, "infrared")) {
  210. rc_dev->rxuhfmode = false;
  211. } else {
  212. dev_err(dev, "Unsupported rx mode [%s]\n", rx_mode);
  213. goto err;
  214. }
  215. } else {
  216. goto err;
  217. }
  218. rc_dev->sys_clock = devm_clk_get(dev, NULL);
  219. if (IS_ERR(rc_dev->sys_clock)) {
  220. dev_err(dev, "System clock not found\n");
  221. ret = PTR_ERR(rc_dev->sys_clock);
  222. goto err;
  223. }
  224. rc_dev->irq = platform_get_irq(pdev, 0);
  225. if (rc_dev->irq < 0) {
  226. ret = rc_dev->irq;
  227. goto err;
  228. }
  229. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  230. rc_dev->base = devm_ioremap_resource(dev, res);
  231. if (IS_ERR(rc_dev->base)) {
  232. ret = PTR_ERR(rc_dev->base);
  233. goto err;
  234. }
  235. if (rc_dev->rxuhfmode)
  236. rc_dev->rx_base = rc_dev->base + 0x40;
  237. else
  238. rc_dev->rx_base = rc_dev->base;
  239. rc_dev->rstc = reset_control_get_optional_exclusive(dev, NULL);
  240. if (IS_ERR(rc_dev->rstc)) {
  241. ret = PTR_ERR(rc_dev->rstc);
  242. goto err;
  243. }
  244. rc_dev->dev = dev;
  245. platform_set_drvdata(pdev, rc_dev);
  246. st_rc_hardware_init(rc_dev);
  247. rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
  248. /* rx sampling rate is 10Mhz */
  249. rdev->rx_resolution = 100;
  250. rdev->timeout = MAX_SYMB_TIME;
  251. rdev->priv = rc_dev;
  252. rdev->open = st_rc_open;
  253. rdev->close = st_rc_close;
  254. rdev->driver_name = IR_ST_NAME;
  255. rdev->map_name = RC_MAP_EMPTY;
  256. rdev->device_name = "ST Remote Control Receiver";
  257. ret = rc_register_device(rdev);
  258. if (ret < 0)
  259. goto clkerr;
  260. rc_dev->rdev = rdev;
  261. if (devm_request_irq(dev, rc_dev->irq, st_rc_rx_interrupt,
  262. 0, IR_ST_NAME, rc_dev) < 0) {
  263. dev_err(dev, "IRQ %d register failed\n", rc_dev->irq);
  264. ret = -EINVAL;
  265. goto rcerr;
  266. }
  267. /* enable wake via this device */
  268. device_init_wakeup(dev, true);
  269. dev_pm_set_wake_irq(dev, rc_dev->irq);
  270. /*
  271. * for LIRC_MODE_MODE2 or LIRC_MODE_PULSE or LIRC_MODE_RAW
  272. * lircd expects a long space first before a signal train to sync.
  273. */
  274. st_rc_send_lirc_timeout(rdev);
  275. dev_info(dev, "setup in %s mode\n", rc_dev->rxuhfmode ? "UHF" : "IR");
  276. return ret;
  277. rcerr:
  278. rc_unregister_device(rdev);
  279. rdev = NULL;
  280. clkerr:
  281. clk_disable_unprepare(rc_dev->sys_clock);
  282. err:
  283. rc_free_device(rdev);
  284. dev_err(dev, "Unable to register device (%d)\n", ret);
  285. return ret;
  286. }
  287. #ifdef CONFIG_PM_SLEEP
  288. static int st_rc_suspend(struct device *dev)
  289. {
  290. struct st_rc_device *rc_dev = dev_get_drvdata(dev);
  291. if (device_may_wakeup(dev)) {
  292. if (!enable_irq_wake(rc_dev->irq))
  293. rc_dev->irq_wake = 1;
  294. else
  295. return -EINVAL;
  296. } else {
  297. pinctrl_pm_select_sleep_state(dev);
  298. writel(0x00, rc_dev->rx_base + IRB_RX_EN);
  299. writel(0x00, rc_dev->rx_base + IRB_RX_INT_EN);
  300. clk_disable_unprepare(rc_dev->sys_clock);
  301. reset_control_assert(rc_dev->rstc);
  302. }
  303. return 0;
  304. }
  305. static int st_rc_resume(struct device *dev)
  306. {
  307. struct st_rc_device *rc_dev = dev_get_drvdata(dev);
  308. struct rc_dev *rdev = rc_dev->rdev;
  309. if (rc_dev->irq_wake) {
  310. disable_irq_wake(rc_dev->irq);
  311. rc_dev->irq_wake = 0;
  312. } else {
  313. pinctrl_pm_select_default_state(dev);
  314. st_rc_hardware_init(rc_dev);
  315. if (rdev->users) {
  316. writel(IRB_RX_INTS, rc_dev->rx_base + IRB_RX_INT_EN);
  317. writel(0x01, rc_dev->rx_base + IRB_RX_EN);
  318. }
  319. }
  320. return 0;
  321. }
  322. #endif
  323. static SIMPLE_DEV_PM_OPS(st_rc_pm_ops, st_rc_suspend, st_rc_resume);
  324. #ifdef CONFIG_OF
  325. static const struct of_device_id st_rc_match[] = {
  326. { .compatible = "st,comms-irb", },
  327. {},
  328. };
  329. MODULE_DEVICE_TABLE(of, st_rc_match);
  330. #endif
  331. static struct platform_driver st_rc_driver = {
  332. .driver = {
  333. .name = IR_ST_NAME,
  334. .of_match_table = of_match_ptr(st_rc_match),
  335. .pm = &st_rc_pm_ops,
  336. },
  337. .probe = st_rc_probe,
  338. .remove = st_rc_remove,
  339. };
  340. module_platform_driver(st_rc_driver);
  341. MODULE_DESCRIPTION("RC Transceiver driver for STMicroelectronics platforms");
  342. MODULE_AUTHOR("STMicroelectronics (R&D) Ltd");
  343. MODULE_LICENSE("GPL");