ite-cir.c 46 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Driver for ITE Tech Inc. IT8712F/IT8512 CIR
  4. *
  5. * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com>
  6. *
  7. * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the
  8. * skeleton provided by the nuvoton-cir driver.
  9. *
  10. * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues
  11. * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus
  12. * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards
  13. * <jimbo-lirc@edwardsclan.net>.
  14. *
  15. * The lirc_ite8709 driver was written by Grégory Lardière
  16. * <spmf2004-lirc@yahoo.fr> in 2008.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/pnp.h>
  21. #include <linux/io.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/input.h>
  27. #include <linux/bitops.h>
  28. #include <media/rc-core.h>
  29. #include <linux/pci_ids.h>
  30. #include "ite-cir.h"
  31. /* module parameters */
  32. /* debug level */
  33. static int debug;
  34. module_param(debug, int, S_IRUGO | S_IWUSR);
  35. MODULE_PARM_DESC(debug, "Enable debugging output");
  36. /* low limit for RX carrier freq, Hz, 0 for no RX demodulation */
  37. static int rx_low_carrier_freq;
  38. module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR);
  39. MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, 0 for no RX demodulation");
  40. /* high limit for RX carrier freq, Hz, 0 for no RX demodulation */
  41. static int rx_high_carrier_freq;
  42. module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR);
  43. MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, Hz, 0 for no RX demodulation");
  44. /* override tx carrier frequency */
  45. static int tx_carrier_freq;
  46. module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR);
  47. MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz");
  48. /* override tx duty cycle */
  49. static int tx_duty_cycle;
  50. module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR);
  51. MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100");
  52. /* override default sample period */
  53. static long sample_period;
  54. module_param(sample_period, long, S_IRUGO | S_IWUSR);
  55. MODULE_PARM_DESC(sample_period, "Override carrier sample period, us");
  56. /* override detected model id */
  57. static int model_number = -1;
  58. module_param(model_number, int, S_IRUGO | S_IWUSR);
  59. MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect");
  60. /* HW-independent code functions */
  61. /* check whether carrier frequency is high frequency */
  62. static inline bool ite_is_high_carrier_freq(unsigned int freq)
  63. {
  64. return freq >= ITE_HCF_MIN_CARRIER_FREQ;
  65. }
  66. /* get the bits required to program the carrier frequency in CFQ bits,
  67. * unshifted */
  68. static u8 ite_get_carrier_freq_bits(unsigned int freq)
  69. {
  70. if (ite_is_high_carrier_freq(freq)) {
  71. if (freq < 425000)
  72. return ITE_CFQ_400;
  73. else if (freq < 465000)
  74. return ITE_CFQ_450;
  75. else if (freq < 490000)
  76. return ITE_CFQ_480;
  77. else
  78. return ITE_CFQ_500;
  79. } else {
  80. /* trim to limits */
  81. if (freq < ITE_LCF_MIN_CARRIER_FREQ)
  82. freq = ITE_LCF_MIN_CARRIER_FREQ;
  83. if (freq > ITE_LCF_MAX_CARRIER_FREQ)
  84. freq = ITE_LCF_MAX_CARRIER_FREQ;
  85. /* convert to kHz and subtract the base freq */
  86. freq =
  87. DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ,
  88. 1000);
  89. return (u8) freq;
  90. }
  91. }
  92. /* get the bits required to program the pulse with in TXMPW */
  93. static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle)
  94. {
  95. unsigned long period_ns, on_ns;
  96. /* sanitize freq into range */
  97. if (freq < ITE_LCF_MIN_CARRIER_FREQ)
  98. freq = ITE_LCF_MIN_CARRIER_FREQ;
  99. if (freq > ITE_HCF_MAX_CARRIER_FREQ)
  100. freq = ITE_HCF_MAX_CARRIER_FREQ;
  101. period_ns = 1000000000UL / freq;
  102. on_ns = period_ns * duty_cycle / 100;
  103. if (ite_is_high_carrier_freq(freq)) {
  104. if (on_ns < 750)
  105. return ITE_TXMPW_A;
  106. else if (on_ns < 850)
  107. return ITE_TXMPW_B;
  108. else if (on_ns < 950)
  109. return ITE_TXMPW_C;
  110. else if (on_ns < 1080)
  111. return ITE_TXMPW_D;
  112. else
  113. return ITE_TXMPW_E;
  114. } else {
  115. if (on_ns < 6500)
  116. return ITE_TXMPW_A;
  117. else if (on_ns < 7850)
  118. return ITE_TXMPW_B;
  119. else if (on_ns < 9650)
  120. return ITE_TXMPW_C;
  121. else if (on_ns < 11950)
  122. return ITE_TXMPW_D;
  123. else
  124. return ITE_TXMPW_E;
  125. }
  126. }
  127. /* decode raw bytes as received by the hardware, and push them to the ir-core
  128. * layer */
  129. static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int
  130. length)
  131. {
  132. u32 sample_period;
  133. unsigned long *ldata;
  134. unsigned int next_one, next_zero, size;
  135. struct ir_raw_event ev = {};
  136. if (length == 0)
  137. return;
  138. sample_period = dev->params.sample_period;
  139. ldata = (unsigned long *)data;
  140. size = length << 3;
  141. next_one = find_next_bit_le(ldata, size, 0);
  142. if (next_one > 0) {
  143. ev.pulse = true;
  144. ev.duration =
  145. ITE_BITS_TO_US(next_one, sample_period);
  146. ir_raw_event_store_with_filter(dev->rdev, &ev);
  147. }
  148. while (next_one < size) {
  149. next_zero = find_next_zero_bit_le(ldata, size, next_one + 1);
  150. ev.pulse = false;
  151. ev.duration = ITE_BITS_TO_US(next_zero - next_one, sample_period);
  152. ir_raw_event_store_with_filter(dev->rdev, &ev);
  153. if (next_zero < size) {
  154. next_one =
  155. find_next_bit_le(ldata,
  156. size,
  157. next_zero + 1);
  158. ev.pulse = true;
  159. ev.duration =
  160. ITE_BITS_TO_US(next_one - next_zero,
  161. sample_period);
  162. ir_raw_event_store_with_filter
  163. (dev->rdev, &ev);
  164. } else
  165. next_one = size;
  166. }
  167. ir_raw_event_handle(dev->rdev);
  168. ite_dbg_verbose("decoded %d bytes.", length);
  169. }
  170. /* set all the rx/tx carrier parameters; this must be called with the device
  171. * spinlock held */
  172. static void ite_set_carrier_params(struct ite_dev *dev)
  173. {
  174. unsigned int freq, low_freq, high_freq;
  175. int allowance;
  176. bool use_demodulator;
  177. bool for_tx = dev->transmitting;
  178. ite_dbg("%s called", __func__);
  179. if (for_tx) {
  180. /* we don't need no stinking calculations */
  181. freq = dev->params.tx_carrier_freq;
  182. allowance = ITE_RXDCR_DEFAULT;
  183. use_demodulator = false;
  184. } else {
  185. low_freq = dev->params.rx_low_carrier_freq;
  186. high_freq = dev->params.rx_high_carrier_freq;
  187. if (low_freq == 0) {
  188. /* don't demodulate */
  189. freq =
  190. ITE_DEFAULT_CARRIER_FREQ;
  191. allowance = ITE_RXDCR_DEFAULT;
  192. use_demodulator = false;
  193. } else {
  194. /* calculate the middle freq */
  195. freq = (low_freq + high_freq) / 2;
  196. /* calculate the allowance */
  197. allowance =
  198. DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq),
  199. ITE_RXDCR_PER_10000_STEP
  200. * (high_freq + low_freq));
  201. if (allowance < 1)
  202. allowance = 1;
  203. if (allowance > ITE_RXDCR_MAX)
  204. allowance = ITE_RXDCR_MAX;
  205. use_demodulator = true;
  206. }
  207. }
  208. /* set the carrier parameters in a device-dependent way */
  209. dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq),
  210. use_demodulator, ite_get_carrier_freq_bits(freq), allowance,
  211. ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle));
  212. }
  213. /* interrupt service routine for incoming and outgoing CIR data */
  214. static irqreturn_t ite_cir_isr(int irq, void *data)
  215. {
  216. struct ite_dev *dev = data;
  217. unsigned long flags;
  218. irqreturn_t ret = IRQ_RETVAL(IRQ_NONE);
  219. u8 rx_buf[ITE_RX_FIFO_LEN];
  220. int rx_bytes;
  221. int iflags;
  222. ite_dbg_verbose("%s firing", __func__);
  223. /* grab the spinlock */
  224. spin_lock_irqsave(&dev->lock, flags);
  225. /* read the interrupt flags */
  226. iflags = dev->params.get_irq_causes(dev);
  227. /* Check for RX overflow */
  228. if (iflags & ITE_IRQ_RX_FIFO_OVERRUN) {
  229. dev_warn(&dev->rdev->dev, "receive overflow\n");
  230. ir_raw_event_reset(dev->rdev);
  231. }
  232. /* check for the receive interrupt */
  233. if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) {
  234. /* read the FIFO bytes */
  235. rx_bytes =
  236. dev->params.get_rx_bytes(dev, rx_buf,
  237. ITE_RX_FIFO_LEN);
  238. if (rx_bytes > 0) {
  239. /* drop the spinlock, since the ir-core layer
  240. * may call us back again through
  241. * ite_s_idle() */
  242. spin_unlock_irqrestore(&dev->
  243. lock,
  244. flags);
  245. /* decode the data we've just received */
  246. ite_decode_bytes(dev, rx_buf,
  247. rx_bytes);
  248. /* reacquire the spinlock */
  249. spin_lock_irqsave(&dev->lock,
  250. flags);
  251. /* mark the interrupt as serviced */
  252. ret = IRQ_RETVAL(IRQ_HANDLED);
  253. }
  254. } else if (iflags & ITE_IRQ_TX_FIFO) {
  255. /* FIFO space available interrupt */
  256. ite_dbg_verbose("got interrupt for TX FIFO");
  257. /* wake any sleeping transmitter */
  258. wake_up_interruptible(&dev->tx_queue);
  259. /* mark the interrupt as serviced */
  260. ret = IRQ_RETVAL(IRQ_HANDLED);
  261. }
  262. /* drop the spinlock */
  263. spin_unlock_irqrestore(&dev->lock, flags);
  264. ite_dbg_verbose("%s done returning %d", __func__, (int)ret);
  265. return ret;
  266. }
  267. /* set the rx carrier freq range, guess it's in Hz... */
  268. static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32
  269. carrier_high)
  270. {
  271. unsigned long flags;
  272. struct ite_dev *dev = rcdev->priv;
  273. spin_lock_irqsave(&dev->lock, flags);
  274. dev->params.rx_low_carrier_freq = carrier_low;
  275. dev->params.rx_high_carrier_freq = carrier_high;
  276. ite_set_carrier_params(dev);
  277. spin_unlock_irqrestore(&dev->lock, flags);
  278. return 0;
  279. }
  280. /* set the tx carrier freq, guess it's in Hz... */
  281. static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
  282. {
  283. unsigned long flags;
  284. struct ite_dev *dev = rcdev->priv;
  285. spin_lock_irqsave(&dev->lock, flags);
  286. dev->params.tx_carrier_freq = carrier;
  287. ite_set_carrier_params(dev);
  288. spin_unlock_irqrestore(&dev->lock, flags);
  289. return 0;
  290. }
  291. /* set the tx duty cycle by controlling the pulse width */
  292. static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle)
  293. {
  294. unsigned long flags;
  295. struct ite_dev *dev = rcdev->priv;
  296. spin_lock_irqsave(&dev->lock, flags);
  297. dev->params.tx_duty_cycle = duty_cycle;
  298. ite_set_carrier_params(dev);
  299. spin_unlock_irqrestore(&dev->lock, flags);
  300. return 0;
  301. }
  302. /* transmit out IR pulses; what you get here is a batch of alternating
  303. * pulse/space/pulse/space lengths that we should write out completely through
  304. * the FIFO, blocking on a full FIFO */
  305. static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n)
  306. {
  307. unsigned long flags;
  308. struct ite_dev *dev = rcdev->priv;
  309. bool is_pulse = false;
  310. int remaining_us, fifo_avail, fifo_remaining, last_idx = 0;
  311. int max_rle_us, next_rle_us;
  312. int ret = n;
  313. u8 last_sent[ITE_TX_FIFO_LEN];
  314. u8 val;
  315. ite_dbg("%s called", __func__);
  316. /* clear the array just in case */
  317. memset(last_sent, 0, sizeof(last_sent));
  318. spin_lock_irqsave(&dev->lock, flags);
  319. /* let everybody know we're now transmitting */
  320. dev->transmitting = true;
  321. /* and set the carrier values for transmission */
  322. ite_set_carrier_params(dev);
  323. /* calculate how much time we can send in one byte */
  324. max_rle_us =
  325. (ITE_BAUDRATE_DIVISOR * dev->params.sample_period *
  326. ITE_TX_MAX_RLE) / 1000;
  327. /* disable the receiver */
  328. dev->params.disable_rx(dev);
  329. /* this is where we'll begin filling in the FIFO, until it's full.
  330. * then we'll just activate the interrupt, wait for it to wake us up
  331. * again, disable it, continue filling the FIFO... until everything
  332. * has been pushed out */
  333. fifo_avail =
  334. ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
  335. while (n > 0 && dev->in_use) {
  336. /* transmit the next sample */
  337. is_pulse = !is_pulse;
  338. remaining_us = *(txbuf++);
  339. n--;
  340. ite_dbg("%s: %ld",
  341. ((is_pulse) ? "pulse" : "space"),
  342. (long int)
  343. remaining_us);
  344. /* repeat while the pulse is non-zero length */
  345. while (remaining_us > 0 && dev->in_use) {
  346. if (remaining_us > max_rle_us)
  347. next_rle_us = max_rle_us;
  348. else
  349. next_rle_us = remaining_us;
  350. remaining_us -= next_rle_us;
  351. /* check what's the length we have to pump out */
  352. val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us;
  353. /* put it into the sent buffer */
  354. last_sent[last_idx++] = val;
  355. last_idx &= (ITE_TX_FIFO_LEN);
  356. /* encode it for 7 bits */
  357. val = (val - 1) & ITE_TX_RLE_MASK;
  358. /* take into account pulse/space prefix */
  359. if (is_pulse)
  360. val |= ITE_TX_PULSE;
  361. else
  362. val |= ITE_TX_SPACE;
  363. /*
  364. * if we get to 0 available, read again, just in case
  365. * some other slot got freed
  366. */
  367. if (fifo_avail <= 0)
  368. fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
  369. /* if it's still full */
  370. if (fifo_avail <= 0) {
  371. /* enable the tx interrupt */
  372. dev->params.
  373. enable_tx_interrupt(dev);
  374. /* drop the spinlock */
  375. spin_unlock_irqrestore(&dev->lock, flags);
  376. /* wait for the FIFO to empty enough */
  377. wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8);
  378. /* get the spinlock again */
  379. spin_lock_irqsave(&dev->lock, flags);
  380. /* disable the tx interrupt again. */
  381. dev->params.
  382. disable_tx_interrupt(dev);
  383. }
  384. /* now send the byte through the FIFO */
  385. dev->params.put_tx_byte(dev, val);
  386. fifo_avail--;
  387. }
  388. }
  389. /* wait and don't return until the whole FIFO has been sent out;
  390. * otherwise we could configure the RX carrier params instead of the
  391. * TX ones while the transmission is still being performed! */
  392. fifo_remaining = dev->params.get_tx_used_slots(dev);
  393. remaining_us = 0;
  394. while (fifo_remaining > 0) {
  395. fifo_remaining--;
  396. last_idx--;
  397. last_idx &= (ITE_TX_FIFO_LEN - 1);
  398. remaining_us += last_sent[last_idx];
  399. }
  400. remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE);
  401. /* drop the spinlock while we sleep */
  402. spin_unlock_irqrestore(&dev->lock, flags);
  403. /* sleep remaining_us microseconds */
  404. mdelay(DIV_ROUND_UP(remaining_us, 1000));
  405. /* reacquire the spinlock */
  406. spin_lock_irqsave(&dev->lock, flags);
  407. /* now we're not transmitting anymore */
  408. dev->transmitting = false;
  409. /* and set the carrier values for reception */
  410. ite_set_carrier_params(dev);
  411. /* re-enable the receiver */
  412. if (dev->in_use)
  413. dev->params.enable_rx(dev);
  414. /* notify transmission end */
  415. wake_up_interruptible(&dev->tx_ended);
  416. spin_unlock_irqrestore(&dev->lock, flags);
  417. return ret;
  418. }
  419. /* idle the receiver if needed */
  420. static void ite_s_idle(struct rc_dev *rcdev, bool enable)
  421. {
  422. unsigned long flags;
  423. struct ite_dev *dev = rcdev->priv;
  424. ite_dbg("%s called", __func__);
  425. if (enable) {
  426. spin_lock_irqsave(&dev->lock, flags);
  427. dev->params.idle_rx(dev);
  428. spin_unlock_irqrestore(&dev->lock, flags);
  429. }
  430. }
  431. /* IT8712F HW-specific functions */
  432. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  433. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  434. * */
  435. static int it87_get_irq_causes(struct ite_dev *dev)
  436. {
  437. u8 iflags;
  438. int ret = 0;
  439. ite_dbg("%s called", __func__);
  440. /* read the interrupt flags */
  441. iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II;
  442. switch (iflags) {
  443. case IT87_II_RXDS:
  444. ret = ITE_IRQ_RX_FIFO;
  445. break;
  446. case IT87_II_RXFO:
  447. ret = ITE_IRQ_RX_FIFO_OVERRUN;
  448. break;
  449. case IT87_II_TXLDL:
  450. ret = ITE_IRQ_TX_FIFO;
  451. break;
  452. }
  453. return ret;
  454. }
  455. /* set the carrier parameters; to be called with the spinlock held */
  456. static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq,
  457. bool use_demodulator,
  458. u8 carrier_freq_bits, u8 allowance_bits,
  459. u8 pulse_width_bits)
  460. {
  461. u8 val;
  462. ite_dbg("%s called", __func__);
  463. /* program the RCR register */
  464. val = inb(dev->cir_addr + IT87_RCR)
  465. & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR);
  466. if (high_freq)
  467. val |= IT87_HCFS;
  468. if (use_demodulator)
  469. val |= IT87_RXEND;
  470. val |= allowance_bits;
  471. outb(val, dev->cir_addr + IT87_RCR);
  472. /* program the TCR2 register */
  473. outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits,
  474. dev->cir_addr + IT87_TCR2);
  475. }
  476. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  477. * held */
  478. static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  479. {
  480. int fifo, read = 0;
  481. ite_dbg("%s called", __func__);
  482. /* read how many bytes are still in the FIFO */
  483. fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC;
  484. while (fifo > 0 && buf_size > 0) {
  485. *(buf++) = inb(dev->cir_addr + IT87_DR);
  486. fifo--;
  487. read++;
  488. buf_size--;
  489. }
  490. return read;
  491. }
  492. /* return how many bytes are still in the FIFO; this will be called
  493. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  494. * empty; let's expect this won't be a problem */
  495. static int it87_get_tx_used_slots(struct ite_dev *dev)
  496. {
  497. ite_dbg("%s called", __func__);
  498. return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC;
  499. }
  500. /* put a byte to the TX fifo; this should be called with the spinlock held */
  501. static void it87_put_tx_byte(struct ite_dev *dev, u8 value)
  502. {
  503. outb(value, dev->cir_addr + IT87_DR);
  504. }
  505. /* idle the receiver so that we won't receive samples until another
  506. pulse is detected; this must be called with the device spinlock held */
  507. static void it87_idle_rx(struct ite_dev *dev)
  508. {
  509. ite_dbg("%s called", __func__);
  510. /* disable streaming by clearing RXACT writing it as 1 */
  511. outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,
  512. dev->cir_addr + IT87_RCR);
  513. /* clear the FIFO */
  514. outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,
  515. dev->cir_addr + IT87_TCR1);
  516. }
  517. /* disable the receiver; this must be called with the device spinlock held */
  518. static void it87_disable_rx(struct ite_dev *dev)
  519. {
  520. ite_dbg("%s called", __func__);
  521. /* disable the receiver interrupts */
  522. outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),
  523. dev->cir_addr + IT87_IER);
  524. /* disable the receiver */
  525. outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,
  526. dev->cir_addr + IT87_RCR);
  527. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  528. * in the previous outb() call) */
  529. it87_idle_rx(dev);
  530. }
  531. /* enable the receiver; this must be called with the device spinlock held */
  532. static void it87_enable_rx(struct ite_dev *dev)
  533. {
  534. ite_dbg("%s called", __func__);
  535. /* enable the receiver by setting RXEN */
  536. outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,
  537. dev->cir_addr + IT87_RCR);
  538. /* just prepare it to idle for the next reception */
  539. it87_idle_rx(dev);
  540. /* enable the receiver interrupts and master enable flag */
  541. outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,
  542. dev->cir_addr + IT87_IER);
  543. }
  544. /* disable the transmitter interrupt; this must be called with the device
  545. * spinlock held */
  546. static void it87_disable_tx_interrupt(struct ite_dev *dev)
  547. {
  548. ite_dbg("%s called", __func__);
  549. /* disable the transmitter interrupts */
  550. outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,
  551. dev->cir_addr + IT87_IER);
  552. }
  553. /* enable the transmitter interrupt; this must be called with the device
  554. * spinlock held */
  555. static void it87_enable_tx_interrupt(struct ite_dev *dev)
  556. {
  557. ite_dbg("%s called", __func__);
  558. /* enable the transmitter interrupts and master enable flag */
  559. outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,
  560. dev->cir_addr + IT87_IER);
  561. }
  562. /* disable the device; this must be called with the device spinlock held */
  563. static void it87_disable(struct ite_dev *dev)
  564. {
  565. ite_dbg("%s called", __func__);
  566. /* clear out all interrupt enable flags */
  567. outb(inb(dev->cir_addr + IT87_IER) &
  568. ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE),
  569. dev->cir_addr + IT87_IER);
  570. /* disable the receiver */
  571. it87_disable_rx(dev);
  572. /* erase the FIFO */
  573. outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),
  574. dev->cir_addr + IT87_TCR1);
  575. }
  576. /* initialize the hardware */
  577. static void it87_init_hardware(struct ite_dev *dev)
  578. {
  579. ite_dbg("%s called", __func__);
  580. /* enable just the baud rate divisor register,
  581. disabling all the interrupts at the same time */
  582. outb((inb(dev->cir_addr + IT87_IER) &
  583. ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR,
  584. dev->cir_addr + IT87_IER);
  585. /* write out the baud rate divisor */
  586. outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);
  587. outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);
  588. /* disable the baud rate divisor register again */
  589. outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,
  590. dev->cir_addr + IT87_IER);
  591. /* program the RCR register defaults */
  592. outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);
  593. /* program the TCR1 register */
  594. outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE
  595. | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR,
  596. dev->cir_addr + IT87_TCR1);
  597. /* program the carrier parameters */
  598. ite_set_carrier_params(dev);
  599. }
  600. /* IT8512F on ITE8708 HW-specific functions */
  601. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  602. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  603. * */
  604. static int it8708_get_irq_causes(struct ite_dev *dev)
  605. {
  606. u8 iflags;
  607. int ret = 0;
  608. ite_dbg("%s called", __func__);
  609. /* read the interrupt flags */
  610. iflags = inb(dev->cir_addr + IT8708_C0IIR);
  611. if (iflags & IT85_TLDLI)
  612. ret |= ITE_IRQ_TX_FIFO;
  613. if (iflags & IT85_RDAI)
  614. ret |= ITE_IRQ_RX_FIFO;
  615. if (iflags & IT85_RFOI)
  616. ret |= ITE_IRQ_RX_FIFO_OVERRUN;
  617. return ret;
  618. }
  619. /* set the carrier parameters; to be called with the spinlock held */
  620. static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq,
  621. bool use_demodulator,
  622. u8 carrier_freq_bits, u8 allowance_bits,
  623. u8 pulse_width_bits)
  624. {
  625. u8 val;
  626. ite_dbg("%s called", __func__);
  627. /* program the C0CFR register, with HRAE=1 */
  628. outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
  629. dev->cir_addr + IT8708_BANKSEL);
  630. val = (inb(dev->cir_addr + IT8708_C0CFR)
  631. & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits;
  632. if (high_freq)
  633. val |= IT85_HCFS;
  634. outb(val, dev->cir_addr + IT8708_C0CFR);
  635. outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
  636. dev->cir_addr + IT8708_BANKSEL);
  637. /* program the C0RCR register */
  638. val = inb(dev->cir_addr + IT8708_C0RCR)
  639. & ~(IT85_RXEND | IT85_RXDCR);
  640. if (use_demodulator)
  641. val |= IT85_RXEND;
  642. val |= allowance_bits;
  643. outb(val, dev->cir_addr + IT8708_C0RCR);
  644. /* program the C0TCR register */
  645. val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW;
  646. val |= pulse_width_bits;
  647. outb(val, dev->cir_addr + IT8708_C0TCR);
  648. }
  649. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  650. * held */
  651. static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  652. {
  653. int fifo, read = 0;
  654. ite_dbg("%s called", __func__);
  655. /* read how many bytes are still in the FIFO */
  656. fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC;
  657. while (fifo > 0 && buf_size > 0) {
  658. *(buf++) = inb(dev->cir_addr + IT8708_C0DR);
  659. fifo--;
  660. read++;
  661. buf_size--;
  662. }
  663. return read;
  664. }
  665. /* return how many bytes are still in the FIFO; this will be called
  666. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  667. * empty; let's expect this won't be a problem */
  668. static int it8708_get_tx_used_slots(struct ite_dev *dev)
  669. {
  670. ite_dbg("%s called", __func__);
  671. return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC;
  672. }
  673. /* put a byte to the TX fifo; this should be called with the spinlock held */
  674. static void it8708_put_tx_byte(struct ite_dev *dev, u8 value)
  675. {
  676. outb(value, dev->cir_addr + IT8708_C0DR);
  677. }
  678. /* idle the receiver so that we won't receive samples until another
  679. pulse is detected; this must be called with the device spinlock held */
  680. static void it8708_idle_rx(struct ite_dev *dev)
  681. {
  682. ite_dbg("%s called", __func__);
  683. /* disable streaming by clearing RXACT writing it as 1 */
  684. outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,
  685. dev->cir_addr + IT8708_C0RCR);
  686. /* clear the FIFO */
  687. outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,
  688. dev->cir_addr + IT8708_C0MSTCR);
  689. }
  690. /* disable the receiver; this must be called with the device spinlock held */
  691. static void it8708_disable_rx(struct ite_dev *dev)
  692. {
  693. ite_dbg("%s called", __func__);
  694. /* disable the receiver interrupts */
  695. outb(inb(dev->cir_addr + IT8708_C0IER) &
  696. ~(IT85_RDAIE | IT85_RFOIE),
  697. dev->cir_addr + IT8708_C0IER);
  698. /* disable the receiver */
  699. outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,
  700. dev->cir_addr + IT8708_C0RCR);
  701. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  702. * in the previous outb() call) */
  703. it8708_idle_rx(dev);
  704. }
  705. /* enable the receiver; this must be called with the device spinlock held */
  706. static void it8708_enable_rx(struct ite_dev *dev)
  707. {
  708. ite_dbg("%s called", __func__);
  709. /* enable the receiver by setting RXEN */
  710. outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,
  711. dev->cir_addr + IT8708_C0RCR);
  712. /* just prepare it to idle for the next reception */
  713. it8708_idle_rx(dev);
  714. /* enable the receiver interrupts and master enable flag */
  715. outb(inb(dev->cir_addr + IT8708_C0IER)
  716. |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
  717. dev->cir_addr + IT8708_C0IER);
  718. }
  719. /* disable the transmitter interrupt; this must be called with the device
  720. * spinlock held */
  721. static void it8708_disable_tx_interrupt(struct ite_dev *dev)
  722. {
  723. ite_dbg("%s called", __func__);
  724. /* disable the transmitter interrupts */
  725. outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,
  726. dev->cir_addr + IT8708_C0IER);
  727. }
  728. /* enable the transmitter interrupt; this must be called with the device
  729. * spinlock held */
  730. static void it8708_enable_tx_interrupt(struct ite_dev *dev)
  731. {
  732. ite_dbg("%s called", __func__);
  733. /* enable the transmitter interrupts and master enable flag */
  734. outb(inb(dev->cir_addr + IT8708_C0IER)
  735. |IT85_TLDLIE | IT85_IEC,
  736. dev->cir_addr + IT8708_C0IER);
  737. }
  738. /* disable the device; this must be called with the device spinlock held */
  739. static void it8708_disable(struct ite_dev *dev)
  740. {
  741. ite_dbg("%s called", __func__);
  742. /* clear out all interrupt enable flags */
  743. outb(inb(dev->cir_addr + IT8708_C0IER) &
  744. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  745. dev->cir_addr + IT8708_C0IER);
  746. /* disable the receiver */
  747. it8708_disable_rx(dev);
  748. /* erase the FIFO */
  749. outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),
  750. dev->cir_addr + IT8708_C0MSTCR);
  751. }
  752. /* initialize the hardware */
  753. static void it8708_init_hardware(struct ite_dev *dev)
  754. {
  755. ite_dbg("%s called", __func__);
  756. /* disable all the interrupts */
  757. outb(inb(dev->cir_addr + IT8708_C0IER) &
  758. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  759. dev->cir_addr + IT8708_C0IER);
  760. /* program the baud rate divisor */
  761. outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
  762. dev->cir_addr + IT8708_BANKSEL);
  763. outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);
  764. outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
  765. dev->cir_addr + IT8708_C0BDHR);
  766. outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
  767. dev->cir_addr + IT8708_BANKSEL);
  768. /* program the C0MSTCR register defaults */
  769. outb((inb(dev->cir_addr + IT8708_C0MSTCR) &
  770. ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL |
  771. IT85_FIFOCLR | IT85_RESET)) |
  772. IT85_FIFOTL_DEFAULT,
  773. dev->cir_addr + IT8708_C0MSTCR);
  774. /* program the C0RCR register defaults */
  775. outb((inb(dev->cir_addr + IT8708_C0RCR) &
  776. ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND |
  777. IT85_RXACT | IT85_RXDCR)) |
  778. ITE_RXDCR_DEFAULT,
  779. dev->cir_addr + IT8708_C0RCR);
  780. /* program the C0TCR register defaults */
  781. outb((inb(dev->cir_addr + IT8708_C0TCR) &
  782. ~(IT85_TXMPM | IT85_TXMPW))
  783. |IT85_TXRLE | IT85_TXENDF |
  784. IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT,
  785. dev->cir_addr + IT8708_C0TCR);
  786. /* program the carrier parameters */
  787. ite_set_carrier_params(dev);
  788. }
  789. /* IT8512F on ITE8709 HW-specific functions */
  790. /* read a byte from the SRAM module */
  791. static inline u8 it8709_rm(struct ite_dev *dev, int index)
  792. {
  793. outb(index, dev->cir_addr + IT8709_RAM_IDX);
  794. return inb(dev->cir_addr + IT8709_RAM_VAL);
  795. }
  796. /* write a byte to the SRAM module */
  797. static inline void it8709_wm(struct ite_dev *dev, u8 val, int index)
  798. {
  799. outb(index, dev->cir_addr + IT8709_RAM_IDX);
  800. outb(val, dev->cir_addr + IT8709_RAM_VAL);
  801. }
  802. static void it8709_wait(struct ite_dev *dev)
  803. {
  804. int i = 0;
  805. /*
  806. * loop until device tells it's ready to continue
  807. * iterations count is usually ~750 but can sometimes achieve 13000
  808. */
  809. for (i = 0; i < 15000; i++) {
  810. udelay(2);
  811. if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE)
  812. break;
  813. }
  814. }
  815. /* read the value of a CIR register */
  816. static u8 it8709_rr(struct ite_dev *dev, int index)
  817. {
  818. /* just wait in case the previous access was a write */
  819. it8709_wait(dev);
  820. it8709_wm(dev, index, IT8709_REG_IDX);
  821. it8709_wm(dev, IT8709_READ, IT8709_MODE);
  822. /* wait for the read data to be available */
  823. it8709_wait(dev);
  824. /* return the read value */
  825. return it8709_rm(dev, IT8709_REG_VAL);
  826. }
  827. /* write the value of a CIR register */
  828. static void it8709_wr(struct ite_dev *dev, u8 val, int index)
  829. {
  830. /* we wait before writing, and not afterwards, since this allows us to
  831. * pipeline the host CPU with the microcontroller */
  832. it8709_wait(dev);
  833. it8709_wm(dev, val, IT8709_REG_VAL);
  834. it8709_wm(dev, index, IT8709_REG_IDX);
  835. it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
  836. }
  837. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  838. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  839. * */
  840. static int it8709_get_irq_causes(struct ite_dev *dev)
  841. {
  842. u8 iflags;
  843. int ret = 0;
  844. ite_dbg("%s called", __func__);
  845. /* read the interrupt flags */
  846. iflags = it8709_rm(dev, IT8709_IIR);
  847. if (iflags & IT85_TLDLI)
  848. ret |= ITE_IRQ_TX_FIFO;
  849. if (iflags & IT85_RDAI)
  850. ret |= ITE_IRQ_RX_FIFO;
  851. if (iflags & IT85_RFOI)
  852. ret |= ITE_IRQ_RX_FIFO_OVERRUN;
  853. return ret;
  854. }
  855. /* set the carrier parameters; to be called with the spinlock held */
  856. static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq,
  857. bool use_demodulator,
  858. u8 carrier_freq_bits, u8 allowance_bits,
  859. u8 pulse_width_bits)
  860. {
  861. u8 val;
  862. ite_dbg("%s called", __func__);
  863. val = (it8709_rr(dev, IT85_C0CFR)
  864. &~(IT85_HCFS | IT85_CFQ)) |
  865. carrier_freq_bits;
  866. if (high_freq)
  867. val |= IT85_HCFS;
  868. it8709_wr(dev, val, IT85_C0CFR);
  869. /* program the C0RCR register */
  870. val = it8709_rr(dev, IT85_C0RCR)
  871. & ~(IT85_RXEND | IT85_RXDCR);
  872. if (use_demodulator)
  873. val |= IT85_RXEND;
  874. val |= allowance_bits;
  875. it8709_wr(dev, val, IT85_C0RCR);
  876. /* program the C0TCR register */
  877. val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW;
  878. val |= pulse_width_bits;
  879. it8709_wr(dev, val, IT85_C0TCR);
  880. }
  881. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  882. * held */
  883. static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  884. {
  885. int fifo, read = 0;
  886. ite_dbg("%s called", __func__);
  887. /* read how many bytes are still in the FIFO */
  888. fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC;
  889. while (fifo > 0 && buf_size > 0) {
  890. *(buf++) = it8709_rm(dev, IT8709_FIFO + read);
  891. fifo--;
  892. read++;
  893. buf_size--;
  894. }
  895. /* 'clear' the FIFO by setting the writing index to 0; this is
  896. * completely bound to be racy, but we can't help it, since it's a
  897. * limitation of the protocol */
  898. it8709_wm(dev, 0, IT8709_RFSR);
  899. return read;
  900. }
  901. /* return how many bytes are still in the FIFO; this will be called
  902. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  903. * empty; let's expect this won't be a problem */
  904. static int it8709_get_tx_used_slots(struct ite_dev *dev)
  905. {
  906. ite_dbg("%s called", __func__);
  907. return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC;
  908. }
  909. /* put a byte to the TX fifo; this should be called with the spinlock held */
  910. static void it8709_put_tx_byte(struct ite_dev *dev, u8 value)
  911. {
  912. it8709_wr(dev, value, IT85_C0DR);
  913. }
  914. /* idle the receiver so that we won't receive samples until another
  915. pulse is detected; this must be called with the device spinlock held */
  916. static void it8709_idle_rx(struct ite_dev *dev)
  917. {
  918. ite_dbg("%s called", __func__);
  919. /* disable streaming by clearing RXACT writing it as 1 */
  920. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT,
  921. IT85_C0RCR);
  922. /* clear the FIFO */
  923. it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR,
  924. IT85_C0MSTCR);
  925. }
  926. /* disable the receiver; this must be called with the device spinlock held */
  927. static void it8709_disable_rx(struct ite_dev *dev)
  928. {
  929. ite_dbg("%s called", __func__);
  930. /* disable the receiver interrupts */
  931. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  932. ~(IT85_RDAIE | IT85_RFOIE),
  933. IT85_C0IER);
  934. /* disable the receiver */
  935. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN,
  936. IT85_C0RCR);
  937. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  938. * in the previous it8709_wr(dev, ) call) */
  939. it8709_idle_rx(dev);
  940. }
  941. /* enable the receiver; this must be called with the device spinlock held */
  942. static void it8709_enable_rx(struct ite_dev *dev)
  943. {
  944. ite_dbg("%s called", __func__);
  945. /* enable the receiver by setting RXEN */
  946. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN,
  947. IT85_C0RCR);
  948. /* just prepare it to idle for the next reception */
  949. it8709_idle_rx(dev);
  950. /* enable the receiver interrupts and master enable flag */
  951. it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
  952. |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
  953. IT85_C0IER);
  954. }
  955. /* disable the transmitter interrupt; this must be called with the device
  956. * spinlock held */
  957. static void it8709_disable_tx_interrupt(struct ite_dev *dev)
  958. {
  959. ite_dbg("%s called", __func__);
  960. /* disable the transmitter interrupts */
  961. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE,
  962. IT85_C0IER);
  963. }
  964. /* enable the transmitter interrupt; this must be called with the device
  965. * spinlock held */
  966. static void it8709_enable_tx_interrupt(struct ite_dev *dev)
  967. {
  968. ite_dbg("%s called", __func__);
  969. /* enable the transmitter interrupts and master enable flag */
  970. it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
  971. |IT85_TLDLIE | IT85_IEC,
  972. IT85_C0IER);
  973. }
  974. /* disable the device; this must be called with the device spinlock held */
  975. static void it8709_disable(struct ite_dev *dev)
  976. {
  977. ite_dbg("%s called", __func__);
  978. /* clear out all interrupt enable flags */
  979. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  980. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  981. IT85_C0IER);
  982. /* disable the receiver */
  983. it8709_disable_rx(dev);
  984. /* erase the FIFO */
  985. it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR),
  986. IT85_C0MSTCR);
  987. }
  988. /* initialize the hardware */
  989. static void it8709_init_hardware(struct ite_dev *dev)
  990. {
  991. ite_dbg("%s called", __func__);
  992. /* disable all the interrupts */
  993. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  994. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  995. IT85_C0IER);
  996. /* program the baud rate divisor */
  997. it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR);
  998. it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
  999. IT85_C0BDHR);
  1000. /* program the C0MSTCR register defaults */
  1001. it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) &
  1002. ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL
  1003. | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT,
  1004. IT85_C0MSTCR);
  1005. /* program the C0RCR register defaults */
  1006. it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) &
  1007. ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT
  1008. | IT85_RXDCR)) | ITE_RXDCR_DEFAULT,
  1009. IT85_C0RCR);
  1010. /* program the C0TCR register defaults */
  1011. it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW))
  1012. | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT
  1013. | IT85_TXMPW_DEFAULT,
  1014. IT85_C0TCR);
  1015. /* program the carrier parameters */
  1016. ite_set_carrier_params(dev);
  1017. }
  1018. /* generic hardware setup/teardown code */
  1019. /* activate the device for use */
  1020. static int ite_open(struct rc_dev *rcdev)
  1021. {
  1022. struct ite_dev *dev = rcdev->priv;
  1023. unsigned long flags;
  1024. ite_dbg("%s called", __func__);
  1025. spin_lock_irqsave(&dev->lock, flags);
  1026. dev->in_use = true;
  1027. /* enable the receiver */
  1028. dev->params.enable_rx(dev);
  1029. spin_unlock_irqrestore(&dev->lock, flags);
  1030. return 0;
  1031. }
  1032. /* deactivate the device for use */
  1033. static void ite_close(struct rc_dev *rcdev)
  1034. {
  1035. struct ite_dev *dev = rcdev->priv;
  1036. unsigned long flags;
  1037. ite_dbg("%s called", __func__);
  1038. spin_lock_irqsave(&dev->lock, flags);
  1039. dev->in_use = false;
  1040. /* wait for any transmission to end */
  1041. spin_unlock_irqrestore(&dev->lock, flags);
  1042. wait_event_interruptible(dev->tx_ended, !dev->transmitting);
  1043. spin_lock_irqsave(&dev->lock, flags);
  1044. dev->params.disable(dev);
  1045. spin_unlock_irqrestore(&dev->lock, flags);
  1046. }
  1047. /* supported models and their parameters */
  1048. static const struct ite_dev_params ite_dev_descs[] = {
  1049. { /* 0: ITE8704 */
  1050. .model = "ITE8704 CIR transceiver",
  1051. .io_region_size = IT87_IOREG_LENGTH,
  1052. .io_rsrc_no = 0,
  1053. .hw_tx_capable = true,
  1054. .sample_period = (u32) (1000000000ULL / 115200),
  1055. .tx_carrier_freq = 38000,
  1056. .tx_duty_cycle = 33,
  1057. .rx_low_carrier_freq = 0,
  1058. .rx_high_carrier_freq = 0,
  1059. /* operations */
  1060. .get_irq_causes = it87_get_irq_causes,
  1061. .enable_rx = it87_enable_rx,
  1062. .idle_rx = it87_idle_rx,
  1063. .disable_rx = it87_idle_rx,
  1064. .get_rx_bytes = it87_get_rx_bytes,
  1065. .enable_tx_interrupt = it87_enable_tx_interrupt,
  1066. .disable_tx_interrupt = it87_disable_tx_interrupt,
  1067. .get_tx_used_slots = it87_get_tx_used_slots,
  1068. .put_tx_byte = it87_put_tx_byte,
  1069. .disable = it87_disable,
  1070. .init_hardware = it87_init_hardware,
  1071. .set_carrier_params = it87_set_carrier_params,
  1072. },
  1073. { /* 1: ITE8713 */
  1074. .model = "ITE8713 CIR transceiver",
  1075. .io_region_size = IT87_IOREG_LENGTH,
  1076. .io_rsrc_no = 0,
  1077. .hw_tx_capable = true,
  1078. .sample_period = (u32) (1000000000ULL / 115200),
  1079. .tx_carrier_freq = 38000,
  1080. .tx_duty_cycle = 33,
  1081. .rx_low_carrier_freq = 0,
  1082. .rx_high_carrier_freq = 0,
  1083. /* operations */
  1084. .get_irq_causes = it87_get_irq_causes,
  1085. .enable_rx = it87_enable_rx,
  1086. .idle_rx = it87_idle_rx,
  1087. .disable_rx = it87_idle_rx,
  1088. .get_rx_bytes = it87_get_rx_bytes,
  1089. .enable_tx_interrupt = it87_enable_tx_interrupt,
  1090. .disable_tx_interrupt = it87_disable_tx_interrupt,
  1091. .get_tx_used_slots = it87_get_tx_used_slots,
  1092. .put_tx_byte = it87_put_tx_byte,
  1093. .disable = it87_disable,
  1094. .init_hardware = it87_init_hardware,
  1095. .set_carrier_params = it87_set_carrier_params,
  1096. },
  1097. { /* 2: ITE8708 */
  1098. .model = "ITE8708 CIR transceiver",
  1099. .io_region_size = IT8708_IOREG_LENGTH,
  1100. .io_rsrc_no = 0,
  1101. .hw_tx_capable = true,
  1102. .sample_period = (u32) (1000000000ULL / 115200),
  1103. .tx_carrier_freq = 38000,
  1104. .tx_duty_cycle = 33,
  1105. .rx_low_carrier_freq = 0,
  1106. .rx_high_carrier_freq = 0,
  1107. /* operations */
  1108. .get_irq_causes = it8708_get_irq_causes,
  1109. .enable_rx = it8708_enable_rx,
  1110. .idle_rx = it8708_idle_rx,
  1111. .disable_rx = it8708_idle_rx,
  1112. .get_rx_bytes = it8708_get_rx_bytes,
  1113. .enable_tx_interrupt = it8708_enable_tx_interrupt,
  1114. .disable_tx_interrupt =
  1115. it8708_disable_tx_interrupt,
  1116. .get_tx_used_slots = it8708_get_tx_used_slots,
  1117. .put_tx_byte = it8708_put_tx_byte,
  1118. .disable = it8708_disable,
  1119. .init_hardware = it8708_init_hardware,
  1120. .set_carrier_params = it8708_set_carrier_params,
  1121. },
  1122. { /* 3: ITE8709 */
  1123. .model = "ITE8709 CIR transceiver",
  1124. .io_region_size = IT8709_IOREG_LENGTH,
  1125. .io_rsrc_no = 2,
  1126. .hw_tx_capable = true,
  1127. .sample_period = (u32) (1000000000ULL / 115200),
  1128. .tx_carrier_freq = 38000,
  1129. .tx_duty_cycle = 33,
  1130. .rx_low_carrier_freq = 0,
  1131. .rx_high_carrier_freq = 0,
  1132. /* operations */
  1133. .get_irq_causes = it8709_get_irq_causes,
  1134. .enable_rx = it8709_enable_rx,
  1135. .idle_rx = it8709_idle_rx,
  1136. .disable_rx = it8709_idle_rx,
  1137. .get_rx_bytes = it8709_get_rx_bytes,
  1138. .enable_tx_interrupt = it8709_enable_tx_interrupt,
  1139. .disable_tx_interrupt =
  1140. it8709_disable_tx_interrupt,
  1141. .get_tx_used_slots = it8709_get_tx_used_slots,
  1142. .put_tx_byte = it8709_put_tx_byte,
  1143. .disable = it8709_disable,
  1144. .init_hardware = it8709_init_hardware,
  1145. .set_carrier_params = it8709_set_carrier_params,
  1146. },
  1147. };
  1148. static const struct pnp_device_id ite_ids[] = {
  1149. {"ITE8704", 0}, /* Default model */
  1150. {"ITE8713", 1}, /* CIR found in EEEBox 1501U */
  1151. {"ITE8708", 2}, /* Bridged IT8512 */
  1152. {"ITE8709", 3}, /* SRAM-Bridged IT8512 */
  1153. {"", 0},
  1154. };
  1155. /* allocate memory, probe hardware, and initialize everything */
  1156. static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
  1157. *dev_id)
  1158. {
  1159. const struct ite_dev_params *dev_desc = NULL;
  1160. struct ite_dev *itdev = NULL;
  1161. struct rc_dev *rdev = NULL;
  1162. int ret = -ENOMEM;
  1163. int model_no;
  1164. int io_rsrc_no;
  1165. ite_dbg("%s called", __func__);
  1166. itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL);
  1167. if (!itdev)
  1168. return ret;
  1169. /* input device for IR remote (and tx) */
  1170. rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
  1171. if (!rdev)
  1172. goto exit_free_dev_rdev;
  1173. itdev->rdev = rdev;
  1174. ret = -ENODEV;
  1175. /* get the model number */
  1176. model_no = (int)dev_id->driver_data;
  1177. ite_pr(KERN_NOTICE, "Auto-detected model: %s\n",
  1178. ite_dev_descs[model_no].model);
  1179. if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) {
  1180. model_no = model_number;
  1181. ite_pr(KERN_NOTICE, "The model has been fixed by a module parameter.");
  1182. }
  1183. ite_pr(KERN_NOTICE, "Using model: %s\n", ite_dev_descs[model_no].model);
  1184. /* get the description for the device */
  1185. dev_desc = &ite_dev_descs[model_no];
  1186. io_rsrc_no = dev_desc->io_rsrc_no;
  1187. /* validate pnp resources */
  1188. if (!pnp_port_valid(pdev, io_rsrc_no) ||
  1189. pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) {
  1190. dev_err(&pdev->dev, "IR PNP Port not valid!\n");
  1191. goto exit_free_dev_rdev;
  1192. }
  1193. if (!pnp_irq_valid(pdev, 0)) {
  1194. dev_err(&pdev->dev, "PNP IRQ not valid!\n");
  1195. goto exit_free_dev_rdev;
  1196. }
  1197. /* store resource values */
  1198. itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no);
  1199. itdev->cir_irq = pnp_irq(pdev, 0);
  1200. /* initialize spinlocks */
  1201. spin_lock_init(&itdev->lock);
  1202. /* set driver data into the pnp device */
  1203. pnp_set_drvdata(pdev, itdev);
  1204. itdev->pdev = pdev;
  1205. /* initialize waitqueues for transmission */
  1206. init_waitqueue_head(&itdev->tx_queue);
  1207. init_waitqueue_head(&itdev->tx_ended);
  1208. /* copy model-specific parameters */
  1209. itdev->params = *dev_desc;
  1210. /* apply any overrides */
  1211. if (sample_period > 0)
  1212. itdev->params.sample_period = sample_period;
  1213. if (tx_carrier_freq > 0)
  1214. itdev->params.tx_carrier_freq = tx_carrier_freq;
  1215. if (tx_duty_cycle > 0 && tx_duty_cycle <= 100)
  1216. itdev->params.tx_duty_cycle = tx_duty_cycle;
  1217. if (rx_low_carrier_freq > 0)
  1218. itdev->params.rx_low_carrier_freq = rx_low_carrier_freq;
  1219. if (rx_high_carrier_freq > 0)
  1220. itdev->params.rx_high_carrier_freq = rx_high_carrier_freq;
  1221. /* print out parameters */
  1222. ite_pr(KERN_NOTICE, "TX-capable: %d\n", (int)
  1223. itdev->params.hw_tx_capable);
  1224. ite_pr(KERN_NOTICE, "Sample period (ns): %ld\n", (long)
  1225. itdev->params.sample_period);
  1226. ite_pr(KERN_NOTICE, "TX carrier frequency (Hz): %d\n", (int)
  1227. itdev->params.tx_carrier_freq);
  1228. ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int)
  1229. itdev->params.tx_duty_cycle);
  1230. ite_pr(KERN_NOTICE, "RX low carrier frequency (Hz): %d\n", (int)
  1231. itdev->params.rx_low_carrier_freq);
  1232. ite_pr(KERN_NOTICE, "RX high carrier frequency (Hz): %d\n", (int)
  1233. itdev->params.rx_high_carrier_freq);
  1234. /* set up hardware initial state */
  1235. itdev->params.init_hardware(itdev);
  1236. /* set up ir-core props */
  1237. rdev->priv = itdev;
  1238. rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
  1239. rdev->open = ite_open;
  1240. rdev->close = ite_close;
  1241. rdev->s_idle = ite_s_idle;
  1242. rdev->s_rx_carrier_range = ite_set_rx_carrier_range;
  1243. /* FIFO threshold is 17 bytes, so 17 * 8 samples minimum */
  1244. rdev->min_timeout = 17 * 8 * ITE_BAUDRATE_DIVISOR *
  1245. itdev->params.sample_period / 1000;
  1246. rdev->timeout = IR_DEFAULT_TIMEOUT;
  1247. rdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
  1248. rdev->rx_resolution = ITE_BAUDRATE_DIVISOR *
  1249. itdev->params.sample_period / 1000;
  1250. rdev->tx_resolution = ITE_BAUDRATE_DIVISOR *
  1251. itdev->params.sample_period / 1000;
  1252. /* set up transmitter related values if needed */
  1253. if (itdev->params.hw_tx_capable) {
  1254. rdev->tx_ir = ite_tx_ir;
  1255. rdev->s_tx_carrier = ite_set_tx_carrier;
  1256. rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle;
  1257. }
  1258. rdev->device_name = dev_desc->model;
  1259. rdev->input_id.bustype = BUS_HOST;
  1260. rdev->input_id.vendor = PCI_VENDOR_ID_ITE;
  1261. rdev->input_id.product = 0;
  1262. rdev->input_id.version = 0;
  1263. rdev->driver_name = ITE_DRIVER_NAME;
  1264. rdev->map_name = RC_MAP_RC6_MCE;
  1265. ret = rc_register_device(rdev);
  1266. if (ret)
  1267. goto exit_free_dev_rdev;
  1268. ret = -EBUSY;
  1269. /* now claim resources */
  1270. if (!request_region(itdev->cir_addr,
  1271. dev_desc->io_region_size, ITE_DRIVER_NAME))
  1272. goto exit_unregister_device;
  1273. if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED,
  1274. ITE_DRIVER_NAME, (void *)itdev))
  1275. goto exit_release_cir_addr;
  1276. ite_pr(KERN_NOTICE, "driver has been successfully loaded\n");
  1277. return 0;
  1278. exit_release_cir_addr:
  1279. release_region(itdev->cir_addr, itdev->params.io_region_size);
  1280. exit_unregister_device:
  1281. rc_unregister_device(rdev);
  1282. rdev = NULL;
  1283. exit_free_dev_rdev:
  1284. rc_free_device(rdev);
  1285. kfree(itdev);
  1286. return ret;
  1287. }
  1288. static void ite_remove(struct pnp_dev *pdev)
  1289. {
  1290. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1291. unsigned long flags;
  1292. ite_dbg("%s called", __func__);
  1293. spin_lock_irqsave(&dev->lock, flags);
  1294. /* disable hardware */
  1295. dev->params.disable(dev);
  1296. spin_unlock_irqrestore(&dev->lock, flags);
  1297. /* free resources */
  1298. free_irq(dev->cir_irq, dev);
  1299. release_region(dev->cir_addr, dev->params.io_region_size);
  1300. rc_unregister_device(dev->rdev);
  1301. kfree(dev);
  1302. }
  1303. static int ite_suspend(struct pnp_dev *pdev, pm_message_t state)
  1304. {
  1305. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1306. unsigned long flags;
  1307. ite_dbg("%s called", __func__);
  1308. /* wait for any transmission to end */
  1309. wait_event_interruptible(dev->tx_ended, !dev->transmitting);
  1310. spin_lock_irqsave(&dev->lock, flags);
  1311. /* disable all interrupts */
  1312. dev->params.disable(dev);
  1313. spin_unlock_irqrestore(&dev->lock, flags);
  1314. return 0;
  1315. }
  1316. static int ite_resume(struct pnp_dev *pdev)
  1317. {
  1318. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1319. unsigned long flags;
  1320. ite_dbg("%s called", __func__);
  1321. spin_lock_irqsave(&dev->lock, flags);
  1322. /* reinitialize hardware config registers */
  1323. dev->params.init_hardware(dev);
  1324. /* enable the receiver */
  1325. dev->params.enable_rx(dev);
  1326. spin_unlock_irqrestore(&dev->lock, flags);
  1327. return 0;
  1328. }
  1329. static void ite_shutdown(struct pnp_dev *pdev)
  1330. {
  1331. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1332. unsigned long flags;
  1333. ite_dbg("%s called", __func__);
  1334. spin_lock_irqsave(&dev->lock, flags);
  1335. /* disable all interrupts */
  1336. dev->params.disable(dev);
  1337. spin_unlock_irqrestore(&dev->lock, flags);
  1338. }
  1339. static struct pnp_driver ite_driver = {
  1340. .name = ITE_DRIVER_NAME,
  1341. .id_table = ite_ids,
  1342. .probe = ite_probe,
  1343. .remove = ite_remove,
  1344. .suspend = ite_suspend,
  1345. .resume = ite_resume,
  1346. .shutdown = ite_shutdown,
  1347. };
  1348. MODULE_DEVICE_TABLE(pnp, ite_ids);
  1349. MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver");
  1350. MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>");
  1351. MODULE_LICENSE("GPL");
  1352. module_pnp_driver(ite_driver);