saa717x.c 32 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * saa717x - Philips SAA717xHL video decoder driver
  4. *
  5. * Based on the saa7115 driver
  6. *
  7. * Changes by Ohta Kyuma <alpha292@bremen.or.jp>
  8. * - Apply to SAA717x,NEC uPD64031,uPD64083. (1/31/2004)
  9. *
  10. * Changes by T.Adachi (tadachi@tadachi-net.com)
  11. * - support audio, video scaler etc, and checked the initialize sequence.
  12. *
  13. * Cleaned up by Hans Verkuil <hverkuil@xs4all.nl>
  14. *
  15. * Note: this is a reversed engineered driver based on captures from
  16. * the I2C bus under Windows. This chip is very similar to the saa7134,
  17. * though. Unfortunately, this driver is currently only working for NTSC.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/slab.h>
  22. #include <linux/sched.h>
  23. #include <linux/videodev2.h>
  24. #include <linux/i2c.h>
  25. #include <media/v4l2-device.h>
  26. #include <media/v4l2-ctrls.h>
  27. MODULE_DESCRIPTION("Philips SAA717x audio/video decoder driver");
  28. MODULE_AUTHOR("K. Ohta, T. Adachi, Hans Verkuil");
  29. MODULE_LICENSE("GPL");
  30. static int debug;
  31. module_param(debug, int, 0644);
  32. MODULE_PARM_DESC(debug, "Debug level (0-1)");
  33. /*
  34. * Generic i2c probe
  35. * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
  36. */
  37. struct saa717x_state {
  38. struct v4l2_subdev sd;
  39. struct v4l2_ctrl_handler hdl;
  40. v4l2_std_id std;
  41. int input;
  42. int enable;
  43. int radio;
  44. int playback;
  45. int audio;
  46. int tuner_audio_mode;
  47. int audio_main_mute;
  48. int audio_main_vol_r;
  49. int audio_main_vol_l;
  50. u16 audio_main_bass;
  51. u16 audio_main_treble;
  52. u16 audio_main_volume;
  53. u16 audio_main_balance;
  54. int audio_input;
  55. };
  56. static inline struct saa717x_state *to_state(struct v4l2_subdev *sd)
  57. {
  58. return container_of(sd, struct saa717x_state, sd);
  59. }
  60. static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
  61. {
  62. return &container_of(ctrl->handler, struct saa717x_state, hdl)->sd;
  63. }
  64. /* ----------------------------------------------------------------------- */
  65. /* for audio mode */
  66. #define TUNER_AUDIO_MONO 0 /* LL */
  67. #define TUNER_AUDIO_STEREO 1 /* LR */
  68. #define TUNER_AUDIO_LANG1 2 /* LL */
  69. #define TUNER_AUDIO_LANG2 3 /* RR */
  70. #define SAA717X_NTSC_WIDTH (704)
  71. #define SAA717X_NTSC_HEIGHT (480)
  72. /* ----------------------------------------------------------------------- */
  73. static int saa717x_write(struct v4l2_subdev *sd, u32 reg, u32 value)
  74. {
  75. struct i2c_client *client = v4l2_get_subdevdata(sd);
  76. struct i2c_adapter *adap = client->adapter;
  77. int fw_addr = reg == 0x454 || (reg >= 0x464 && reg <= 0x478) || reg == 0x480 || reg == 0x488;
  78. unsigned char mm1[6];
  79. struct i2c_msg msg;
  80. msg.flags = 0;
  81. msg.addr = client->addr;
  82. mm1[0] = (reg >> 8) & 0xff;
  83. mm1[1] = reg & 0xff;
  84. if (fw_addr) {
  85. mm1[4] = (value >> 16) & 0xff;
  86. mm1[3] = (value >> 8) & 0xff;
  87. mm1[2] = value & 0xff;
  88. } else {
  89. mm1[2] = value & 0xff;
  90. }
  91. msg.len = fw_addr ? 5 : 3; /* Long Registers have *only* three bytes! */
  92. msg.buf = mm1;
  93. v4l2_dbg(2, debug, sd, "wrote: reg 0x%03x=%08x\n", reg, value);
  94. return i2c_transfer(adap, &msg, 1) == 1;
  95. }
  96. static void saa717x_write_regs(struct v4l2_subdev *sd, u32 *data)
  97. {
  98. while (data[0] || data[1]) {
  99. saa717x_write(sd, data[0], data[1]);
  100. data += 2;
  101. }
  102. }
  103. static u32 saa717x_read(struct v4l2_subdev *sd, u32 reg)
  104. {
  105. struct i2c_client *client = v4l2_get_subdevdata(sd);
  106. struct i2c_adapter *adap = client->adapter;
  107. int fw_addr = (reg >= 0x404 && reg <= 0x4b8) || reg == 0x528;
  108. unsigned char mm1[2];
  109. unsigned char mm2[4] = { 0, 0, 0, 0 };
  110. struct i2c_msg msgs[2];
  111. u32 value;
  112. msgs[0].flags = 0;
  113. msgs[1].flags = I2C_M_RD;
  114. msgs[0].addr = msgs[1].addr = client->addr;
  115. mm1[0] = (reg >> 8) & 0xff;
  116. mm1[1] = reg & 0xff;
  117. msgs[0].len = 2;
  118. msgs[0].buf = mm1;
  119. msgs[1].len = fw_addr ? 3 : 1; /* Multibyte Registers contains *only* 3 bytes */
  120. msgs[1].buf = mm2;
  121. i2c_transfer(adap, msgs, 2);
  122. if (fw_addr)
  123. value = (mm2[2] << 16) | (mm2[1] << 8) | mm2[0];
  124. else
  125. value = mm2[0];
  126. v4l2_dbg(2, debug, sd, "read: reg 0x%03x=0x%08x\n", reg, value);
  127. return value;
  128. }
  129. /* ----------------------------------------------------------------------- */
  130. static u32 reg_init_initialize[] =
  131. {
  132. /* from linux driver */
  133. 0x101, 0x008, /* Increment delay */
  134. 0x103, 0x000, /* Analog input control 2 */
  135. 0x104, 0x090, /* Analog input control 3 */
  136. 0x105, 0x090, /* Analog input control 4 */
  137. 0x106, 0x0eb, /* Horizontal sync start */
  138. 0x107, 0x0e0, /* Horizontal sync stop */
  139. 0x109, 0x055, /* Luminance control */
  140. 0x10f, 0x02a, /* Chroma gain control */
  141. 0x110, 0x000, /* Chroma control 2 */
  142. 0x114, 0x045, /* analog/ADC */
  143. 0x118, 0x040, /* RAW data gain */
  144. 0x119, 0x080, /* RAW data offset */
  145. 0x044, 0x000, /* VBI horizontal input window start (L) TASK A */
  146. 0x045, 0x000, /* VBI horizontal input window start (H) TASK A */
  147. 0x046, 0x0cf, /* VBI horizontal input window stop (L) TASK A */
  148. 0x047, 0x002, /* VBI horizontal input window stop (H) TASK A */
  149. 0x049, 0x000, /* VBI vertical input window start (H) TASK A */
  150. 0x04c, 0x0d0, /* VBI horizontal output length (L) TASK A */
  151. 0x04d, 0x002, /* VBI horizontal output length (H) TASK A */
  152. 0x064, 0x080, /* Lumina brightness TASK A */
  153. 0x065, 0x040, /* Luminance contrast TASK A */
  154. 0x066, 0x040, /* Chroma saturation TASK A */
  155. /* 067H: Reserved */
  156. 0x068, 0x000, /* VBI horizontal scaling increment (L) TASK A */
  157. 0x069, 0x004, /* VBI horizontal scaling increment (H) TASK A */
  158. 0x06a, 0x000, /* VBI phase offset TASK A */
  159. 0x06e, 0x000, /* Horizontal phase offset Luma TASK A */
  160. 0x06f, 0x000, /* Horizontal phase offset Chroma TASK A */
  161. 0x072, 0x000, /* Vertical filter mode TASK A */
  162. 0x084, 0x000, /* VBI horizontal input window start (L) TAKS B */
  163. 0x085, 0x000, /* VBI horizontal input window start (H) TAKS B */
  164. 0x086, 0x0cf, /* VBI horizontal input window stop (L) TAKS B */
  165. 0x087, 0x002, /* VBI horizontal input window stop (H) TAKS B */
  166. 0x089, 0x000, /* VBI vertical input window start (H) TAKS B */
  167. 0x08c, 0x0d0, /* VBI horizontal output length (L) TASK B */
  168. 0x08d, 0x002, /* VBI horizontal output length (H) TASK B */
  169. 0x0a4, 0x080, /* Lumina brightness TASK B */
  170. 0x0a5, 0x040, /* Luminance contrast TASK B */
  171. 0x0a6, 0x040, /* Chroma saturation TASK B */
  172. /* 0A7H reserved */
  173. 0x0a8, 0x000, /* VBI horizontal scaling increment (L) TASK B */
  174. 0x0a9, 0x004, /* VBI horizontal scaling increment (H) TASK B */
  175. 0x0aa, 0x000, /* VBI phase offset TASK B */
  176. 0x0ae, 0x000, /* Horizontal phase offset Luma TASK B */
  177. 0x0af, 0x000, /*Horizontal phase offset Chroma TASK B */
  178. 0x0b2, 0x000, /* Vertical filter mode TASK B */
  179. 0x00c, 0x000, /* Start point GREEN path */
  180. 0x00d, 0x000, /* Start point BLUE path */
  181. 0x00e, 0x000, /* Start point RED path */
  182. 0x010, 0x010, /* GREEN path gamma curve --- */
  183. 0x011, 0x020,
  184. 0x012, 0x030,
  185. 0x013, 0x040,
  186. 0x014, 0x050,
  187. 0x015, 0x060,
  188. 0x016, 0x070,
  189. 0x017, 0x080,
  190. 0x018, 0x090,
  191. 0x019, 0x0a0,
  192. 0x01a, 0x0b0,
  193. 0x01b, 0x0c0,
  194. 0x01c, 0x0d0,
  195. 0x01d, 0x0e0,
  196. 0x01e, 0x0f0,
  197. 0x01f, 0x0ff, /* --- GREEN path gamma curve */
  198. 0x020, 0x010, /* BLUE path gamma curve --- */
  199. 0x021, 0x020,
  200. 0x022, 0x030,
  201. 0x023, 0x040,
  202. 0x024, 0x050,
  203. 0x025, 0x060,
  204. 0x026, 0x070,
  205. 0x027, 0x080,
  206. 0x028, 0x090,
  207. 0x029, 0x0a0,
  208. 0x02a, 0x0b0,
  209. 0x02b, 0x0c0,
  210. 0x02c, 0x0d0,
  211. 0x02d, 0x0e0,
  212. 0x02e, 0x0f0,
  213. 0x02f, 0x0ff, /* --- BLUE path gamma curve */
  214. 0x030, 0x010, /* RED path gamma curve --- */
  215. 0x031, 0x020,
  216. 0x032, 0x030,
  217. 0x033, 0x040,
  218. 0x034, 0x050,
  219. 0x035, 0x060,
  220. 0x036, 0x070,
  221. 0x037, 0x080,
  222. 0x038, 0x090,
  223. 0x039, 0x0a0,
  224. 0x03a, 0x0b0,
  225. 0x03b, 0x0c0,
  226. 0x03c, 0x0d0,
  227. 0x03d, 0x0e0,
  228. 0x03e, 0x0f0,
  229. 0x03f, 0x0ff, /* --- RED path gamma curve */
  230. 0x109, 0x085, /* Luminance control */
  231. /**** from app start ****/
  232. 0x584, 0x000, /* AGC gain control */
  233. 0x585, 0x000, /* Program count */
  234. 0x586, 0x003, /* Status reset */
  235. 0x588, 0x0ff, /* Number of audio samples (L) */
  236. 0x589, 0x00f, /* Number of audio samples (M) */
  237. 0x58a, 0x000, /* Number of audio samples (H) */
  238. 0x58b, 0x000, /* Audio select */
  239. 0x58c, 0x010, /* Audio channel assign1 */
  240. 0x58d, 0x032, /* Audio channel assign2 */
  241. 0x58e, 0x054, /* Audio channel assign3 */
  242. 0x58f, 0x023, /* Audio format */
  243. 0x590, 0x000, /* SIF control */
  244. 0x595, 0x000, /* ?? */
  245. 0x596, 0x000, /* ?? */
  246. 0x597, 0x000, /* ?? */
  247. 0x464, 0x00, /* Digital input crossbar1 */
  248. 0x46c, 0xbbbb10, /* Digital output selection1-3 */
  249. 0x470, 0x101010, /* Digital output selection4-6 */
  250. 0x478, 0x00, /* Sound feature control */
  251. 0x474, 0x18, /* Softmute control */
  252. 0x454, 0x0425b9, /* Sound Easy programming(reset) */
  253. 0x454, 0x042539, /* Sound Easy programming(reset) */
  254. /**** common setting( of DVD play, including scaler commands) ****/
  255. 0x042, 0x003, /* Data path configuration for VBI (TASK A) */
  256. 0x082, 0x003, /* Data path configuration for VBI (TASK B) */
  257. 0x108, 0x0f8, /* Sync control */
  258. 0x2a9, 0x0fd, /* ??? */
  259. 0x102, 0x089, /* select video input "mode 9" */
  260. 0x111, 0x000, /* Mode/delay control */
  261. 0x10e, 0x00a, /* Chroma control 1 */
  262. 0x594, 0x002, /* SIF, analog I/O select */
  263. 0x454, 0x0425b9, /* Sound */
  264. 0x454, 0x042539,
  265. 0x111, 0x000,
  266. 0x10e, 0x00a,
  267. 0x464, 0x000,
  268. 0x300, 0x000,
  269. 0x301, 0x006,
  270. 0x302, 0x000,
  271. 0x303, 0x006,
  272. 0x308, 0x040,
  273. 0x309, 0x000,
  274. 0x30a, 0x000,
  275. 0x30b, 0x000,
  276. 0x000, 0x002,
  277. 0x001, 0x000,
  278. 0x002, 0x000,
  279. 0x003, 0x000,
  280. 0x004, 0x033,
  281. 0x040, 0x01d,
  282. 0x041, 0x001,
  283. 0x042, 0x004,
  284. 0x043, 0x000,
  285. 0x080, 0x01e,
  286. 0x081, 0x001,
  287. 0x082, 0x004,
  288. 0x083, 0x000,
  289. 0x190, 0x018,
  290. 0x115, 0x000,
  291. 0x116, 0x012,
  292. 0x117, 0x018,
  293. 0x04a, 0x011,
  294. 0x08a, 0x011,
  295. 0x04b, 0x000,
  296. 0x08b, 0x000,
  297. 0x048, 0x000,
  298. 0x088, 0x000,
  299. 0x04e, 0x012,
  300. 0x08e, 0x012,
  301. 0x058, 0x012,
  302. 0x098, 0x012,
  303. 0x059, 0x000,
  304. 0x099, 0x000,
  305. 0x05a, 0x003,
  306. 0x09a, 0x003,
  307. 0x05b, 0x001,
  308. 0x09b, 0x001,
  309. 0x054, 0x008,
  310. 0x094, 0x008,
  311. 0x055, 0x000,
  312. 0x095, 0x000,
  313. 0x056, 0x0c7,
  314. 0x096, 0x0c7,
  315. 0x057, 0x002,
  316. 0x097, 0x002,
  317. 0x0ff, 0x0ff,
  318. 0x060, 0x001,
  319. 0x0a0, 0x001,
  320. 0x061, 0x000,
  321. 0x0a1, 0x000,
  322. 0x062, 0x000,
  323. 0x0a2, 0x000,
  324. 0x063, 0x000,
  325. 0x0a3, 0x000,
  326. 0x070, 0x000,
  327. 0x0b0, 0x000,
  328. 0x071, 0x004,
  329. 0x0b1, 0x004,
  330. 0x06c, 0x0e9,
  331. 0x0ac, 0x0e9,
  332. 0x06d, 0x003,
  333. 0x0ad, 0x003,
  334. 0x05c, 0x0d0,
  335. 0x09c, 0x0d0,
  336. 0x05d, 0x002,
  337. 0x09d, 0x002,
  338. 0x05e, 0x0f2,
  339. 0x09e, 0x0f2,
  340. 0x05f, 0x000,
  341. 0x09f, 0x000,
  342. 0x074, 0x000,
  343. 0x0b4, 0x000,
  344. 0x075, 0x000,
  345. 0x0b5, 0x000,
  346. 0x076, 0x000,
  347. 0x0b6, 0x000,
  348. 0x077, 0x000,
  349. 0x0b7, 0x000,
  350. 0x195, 0x008,
  351. 0x0ff, 0x0ff,
  352. 0x108, 0x0f8,
  353. 0x111, 0x000,
  354. 0x10e, 0x00a,
  355. 0x2a9, 0x0fd,
  356. 0x464, 0x001,
  357. 0x454, 0x042135,
  358. 0x598, 0x0e7,
  359. 0x599, 0x07d,
  360. 0x59a, 0x018,
  361. 0x59c, 0x066,
  362. 0x59d, 0x090,
  363. 0x59e, 0x001,
  364. 0x584, 0x000,
  365. 0x585, 0x000,
  366. 0x586, 0x003,
  367. 0x588, 0x0ff,
  368. 0x589, 0x00f,
  369. 0x58a, 0x000,
  370. 0x58b, 0x000,
  371. 0x58c, 0x010,
  372. 0x58d, 0x032,
  373. 0x58e, 0x054,
  374. 0x58f, 0x023,
  375. 0x590, 0x000,
  376. 0x595, 0x000,
  377. 0x596, 0x000,
  378. 0x597, 0x000,
  379. 0x464, 0x000,
  380. 0x46c, 0xbbbb10,
  381. 0x470, 0x101010,
  382. 0x478, 0x000,
  383. 0x474, 0x018,
  384. 0x454, 0x042135,
  385. 0x598, 0x0e7,
  386. 0x599, 0x07d,
  387. 0x59a, 0x018,
  388. 0x59c, 0x066,
  389. 0x59d, 0x090,
  390. 0x59e, 0x001,
  391. 0x584, 0x000,
  392. 0x585, 0x000,
  393. 0x586, 0x003,
  394. 0x588, 0x0ff,
  395. 0x589, 0x00f,
  396. 0x58a, 0x000,
  397. 0x58b, 0x000,
  398. 0x58c, 0x010,
  399. 0x58d, 0x032,
  400. 0x58e, 0x054,
  401. 0x58f, 0x023,
  402. 0x590, 0x000,
  403. 0x595, 0x000,
  404. 0x596, 0x000,
  405. 0x597, 0x000,
  406. 0x464, 0x000,
  407. 0x46c, 0xbbbb10,
  408. 0x470, 0x101010,
  409. 0x478, 0x000,
  410. 0x474, 0x018,
  411. 0x454, 0x042135,
  412. 0x598, 0x0e7,
  413. 0x599, 0x07d,
  414. 0x59a, 0x018,
  415. 0x59c, 0x066,
  416. 0x59d, 0x090,
  417. 0x59e, 0x001,
  418. 0x584, 0x000,
  419. 0x585, 0x000,
  420. 0x586, 0x003,
  421. 0x588, 0x0ff,
  422. 0x589, 0x00f,
  423. 0x58a, 0x000,
  424. 0x58b, 0x000,
  425. 0x58c, 0x010,
  426. 0x58d, 0x032,
  427. 0x58e, 0x054,
  428. 0x58f, 0x023,
  429. 0x590, 0x000,
  430. 0x595, 0x000,
  431. 0x596, 0x000,
  432. 0x597, 0x000,
  433. 0x464, 0x000,
  434. 0x46c, 0xbbbb10,
  435. 0x470, 0x101010,
  436. 0x478, 0x000,
  437. 0x474, 0x018,
  438. 0x454, 0x042135,
  439. 0x193, 0x000,
  440. 0x300, 0x000,
  441. 0x301, 0x006,
  442. 0x302, 0x000,
  443. 0x303, 0x006,
  444. 0x308, 0x040,
  445. 0x309, 0x000,
  446. 0x30a, 0x000,
  447. 0x30b, 0x000,
  448. 0x000, 0x002,
  449. 0x001, 0x000,
  450. 0x002, 0x000,
  451. 0x003, 0x000,
  452. 0x004, 0x033,
  453. 0x040, 0x01d,
  454. 0x041, 0x001,
  455. 0x042, 0x004,
  456. 0x043, 0x000,
  457. 0x080, 0x01e,
  458. 0x081, 0x001,
  459. 0x082, 0x004,
  460. 0x083, 0x000,
  461. 0x190, 0x018,
  462. 0x115, 0x000,
  463. 0x116, 0x012,
  464. 0x117, 0x018,
  465. 0x04a, 0x011,
  466. 0x08a, 0x011,
  467. 0x04b, 0x000,
  468. 0x08b, 0x000,
  469. 0x048, 0x000,
  470. 0x088, 0x000,
  471. 0x04e, 0x012,
  472. 0x08e, 0x012,
  473. 0x058, 0x012,
  474. 0x098, 0x012,
  475. 0x059, 0x000,
  476. 0x099, 0x000,
  477. 0x05a, 0x003,
  478. 0x09a, 0x003,
  479. 0x05b, 0x001,
  480. 0x09b, 0x001,
  481. 0x054, 0x008,
  482. 0x094, 0x008,
  483. 0x055, 0x000,
  484. 0x095, 0x000,
  485. 0x056, 0x0c7,
  486. 0x096, 0x0c7,
  487. 0x057, 0x002,
  488. 0x097, 0x002,
  489. 0x060, 0x001,
  490. 0x0a0, 0x001,
  491. 0x061, 0x000,
  492. 0x0a1, 0x000,
  493. 0x062, 0x000,
  494. 0x0a2, 0x000,
  495. 0x063, 0x000,
  496. 0x0a3, 0x000,
  497. 0x070, 0x000,
  498. 0x0b0, 0x000,
  499. 0x071, 0x004,
  500. 0x0b1, 0x004,
  501. 0x06c, 0x0e9,
  502. 0x0ac, 0x0e9,
  503. 0x06d, 0x003,
  504. 0x0ad, 0x003,
  505. 0x05c, 0x0d0,
  506. 0x09c, 0x0d0,
  507. 0x05d, 0x002,
  508. 0x09d, 0x002,
  509. 0x05e, 0x0f2,
  510. 0x09e, 0x0f2,
  511. 0x05f, 0x000,
  512. 0x09f, 0x000,
  513. 0x074, 0x000,
  514. 0x0b4, 0x000,
  515. 0x075, 0x000,
  516. 0x0b5, 0x000,
  517. 0x076, 0x000,
  518. 0x0b6, 0x000,
  519. 0x077, 0x000,
  520. 0x0b7, 0x000,
  521. 0x195, 0x008,
  522. 0x598, 0x0e7,
  523. 0x599, 0x07d,
  524. 0x59a, 0x018,
  525. 0x59c, 0x066,
  526. 0x59d, 0x090,
  527. 0x59e, 0x001,
  528. 0x584, 0x000,
  529. 0x585, 0x000,
  530. 0x586, 0x003,
  531. 0x588, 0x0ff,
  532. 0x589, 0x00f,
  533. 0x58a, 0x000,
  534. 0x58b, 0x000,
  535. 0x58c, 0x010,
  536. 0x58d, 0x032,
  537. 0x58e, 0x054,
  538. 0x58f, 0x023,
  539. 0x590, 0x000,
  540. 0x595, 0x000,
  541. 0x596, 0x000,
  542. 0x597, 0x000,
  543. 0x464, 0x000,
  544. 0x46c, 0xbbbb10,
  545. 0x470, 0x101010,
  546. 0x478, 0x000,
  547. 0x474, 0x018,
  548. 0x454, 0x042135,
  549. 0x193, 0x0a6,
  550. 0x108, 0x0f8,
  551. 0x042, 0x003,
  552. 0x082, 0x003,
  553. 0x454, 0x0425b9,
  554. 0x454, 0x042539,
  555. 0x193, 0x000,
  556. 0x193, 0x0a6,
  557. 0x464, 0x000,
  558. 0, 0
  559. };
  560. /* Tuner */
  561. static u32 reg_init_tuner_input[] = {
  562. 0x108, 0x0f8, /* Sync control */
  563. 0x111, 0x000, /* Mode/delay control */
  564. 0x10e, 0x00a, /* Chroma control 1 */
  565. 0, 0
  566. };
  567. /* Composite */
  568. static u32 reg_init_composite_input[] = {
  569. 0x108, 0x0e8, /* Sync control */
  570. 0x111, 0x000, /* Mode/delay control */
  571. 0x10e, 0x04a, /* Chroma control 1 */
  572. 0, 0
  573. };
  574. /* S-Video */
  575. static u32 reg_init_svideo_input[] = {
  576. 0x108, 0x0e8, /* Sync control */
  577. 0x111, 0x000, /* Mode/delay control */
  578. 0x10e, 0x04a, /* Chroma control 1 */
  579. 0, 0
  580. };
  581. static u32 reg_set_audio_template[4][2] =
  582. {
  583. { /* for MONO
  584. tadachi 6/29 DMA audio output select?
  585. Register 0x46c
  586. 7-4: DMA2, 3-0: DMA1 ch. DMA4, DMA3 DMA2, DMA1
  587. 0: MAIN left, 1: MAIN right
  588. 2: AUX1 left, 3: AUX1 right
  589. 4: AUX2 left, 5: AUX2 right
  590. 6: DPL left, 7: DPL right
  591. 8: DPL center, 9: DPL surround
  592. A: monitor output, B: digital sense */
  593. 0xbbbb00,
  594. /* tadachi 6/29 DAC and I2S output select?
  595. Register 0x470
  596. 7-4:DAC right ch. 3-0:DAC left ch.
  597. I2S1 right,left I2S2 right,left */
  598. 0x00,
  599. },
  600. { /* for STEREO */
  601. 0xbbbb10, 0x101010,
  602. },
  603. { /* for LANG1 */
  604. 0xbbbb00, 0x00,
  605. },
  606. { /* for LANG2/SAP */
  607. 0xbbbb11, 0x111111,
  608. }
  609. };
  610. /* Get detected audio flags (from saa7134 driver) */
  611. static void get_inf_dev_status(struct v4l2_subdev *sd,
  612. int *dual_flag, int *stereo_flag)
  613. {
  614. u32 reg_data3;
  615. static char *stdres[0x20] = {
  616. [0x00] = "no standard detected",
  617. [0x01] = "B/G (in progress)",
  618. [0x02] = "D/K (in progress)",
  619. [0x03] = "M (in progress)",
  620. [0x04] = "B/G A2",
  621. [0x05] = "B/G NICAM",
  622. [0x06] = "D/K A2 (1)",
  623. [0x07] = "D/K A2 (2)",
  624. [0x08] = "D/K A2 (3)",
  625. [0x09] = "D/K NICAM",
  626. [0x0a] = "L NICAM",
  627. [0x0b] = "I NICAM",
  628. [0x0c] = "M Korea",
  629. [0x0d] = "M BTSC ",
  630. [0x0e] = "M EIAJ",
  631. [0x0f] = "FM radio / IF 10.7 / 50 deemp",
  632. [0x10] = "FM radio / IF 10.7 / 75 deemp",
  633. [0x11] = "FM radio / IF sel / 50 deemp",
  634. [0x12] = "FM radio / IF sel / 75 deemp",
  635. [0x13 ... 0x1e] = "unknown",
  636. [0x1f] = "??? [in progress]",
  637. };
  638. *dual_flag = *stereo_flag = 0;
  639. /* (demdec status: 0x528) */
  640. /* read current status */
  641. reg_data3 = saa717x_read(sd, 0x0528);
  642. v4l2_dbg(1, debug, sd, "tvaudio thread status: 0x%x [%s%s%s]\n",
  643. reg_data3, stdres[reg_data3 & 0x1f],
  644. (reg_data3 & 0x000020) ? ",stereo" : "",
  645. (reg_data3 & 0x000040) ? ",dual" : "");
  646. v4l2_dbg(1, debug, sd, "detailed status: "
  647. "%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s\n",
  648. (reg_data3 & 0x000080) ? " A2/EIAJ pilot tone " : "",
  649. (reg_data3 & 0x000100) ? " A2/EIAJ dual " : "",
  650. (reg_data3 & 0x000200) ? " A2/EIAJ stereo " : "",
  651. (reg_data3 & 0x000400) ? " A2/EIAJ noise mute " : "",
  652. (reg_data3 & 0x000800) ? " BTSC/FM radio pilot " : "",
  653. (reg_data3 & 0x001000) ? " SAP carrier " : "",
  654. (reg_data3 & 0x002000) ? " BTSC stereo noise mute " : "",
  655. (reg_data3 & 0x004000) ? " SAP noise mute " : "",
  656. (reg_data3 & 0x008000) ? " VDSP " : "",
  657. (reg_data3 & 0x010000) ? " NICST " : "",
  658. (reg_data3 & 0x020000) ? " NICDU " : "",
  659. (reg_data3 & 0x040000) ? " NICAM muted " : "",
  660. (reg_data3 & 0x080000) ? " NICAM reserve sound " : "",
  661. (reg_data3 & 0x100000) ? " init done " : "");
  662. if (reg_data3 & 0x000220) {
  663. v4l2_dbg(1, debug, sd, "ST!!!\n");
  664. *stereo_flag = 1;
  665. }
  666. if (reg_data3 & 0x000140) {
  667. v4l2_dbg(1, debug, sd, "DUAL!!!\n");
  668. *dual_flag = 1;
  669. }
  670. }
  671. /* regs write to set audio mode */
  672. static void set_audio_mode(struct v4l2_subdev *sd, int audio_mode)
  673. {
  674. v4l2_dbg(1, debug, sd, "writing registers to set audio mode by set %d\n",
  675. audio_mode);
  676. saa717x_write(sd, 0x46c, reg_set_audio_template[audio_mode][0]);
  677. saa717x_write(sd, 0x470, reg_set_audio_template[audio_mode][1]);
  678. }
  679. /* write regs to set audio volume, bass and treble */
  680. static int set_audio_regs(struct v4l2_subdev *sd,
  681. struct saa717x_state *decoder)
  682. {
  683. u8 mute = 0xac; /* -84 dB */
  684. u32 val;
  685. unsigned int work_l, work_r;
  686. /* set SIF analog I/O select */
  687. saa717x_write(sd, 0x0594, decoder->audio_input);
  688. v4l2_dbg(1, debug, sd, "set audio input %d\n",
  689. decoder->audio_input);
  690. /* normalize ( 65535 to 0 -> 24 to -40 (not -84)) */
  691. work_l = (min(65536 - decoder->audio_main_balance, 32768) * decoder->audio_main_volume) / 32768;
  692. work_r = (min(decoder->audio_main_balance, (u16)32768) * decoder->audio_main_volume) / 32768;
  693. decoder->audio_main_vol_l = (long)work_l * (24 - (-40)) / 65535 - 40;
  694. decoder->audio_main_vol_r = (long)work_r * (24 - (-40)) / 65535 - 40;
  695. /* set main volume */
  696. /* main volume L[7-0],R[7-0],0x00 24=24dB,-83dB, -84(mute) */
  697. /* def:0dB->6dB(MPG600GR) */
  698. /* if mute is on, set mute */
  699. if (decoder->audio_main_mute) {
  700. val = mute | (mute << 8);
  701. } else {
  702. val = (u8)decoder->audio_main_vol_l |
  703. ((u8)decoder->audio_main_vol_r << 8);
  704. }
  705. saa717x_write(sd, 0x480, val);
  706. /* set bass and treble */
  707. val = decoder->audio_main_bass & 0x1f;
  708. val |= (decoder->audio_main_treble & 0x1f) << 5;
  709. saa717x_write(sd, 0x488, val);
  710. return 0;
  711. }
  712. /********** scaling staff ***********/
  713. static void set_h_prescale(struct v4l2_subdev *sd,
  714. int task, int prescale)
  715. {
  716. static const struct {
  717. int xpsc;
  718. int xacl;
  719. int xc2_1;
  720. int xdcg;
  721. int vpfy;
  722. } vals[] = {
  723. /* XPSC XACL XC2_1 XDCG VPFY */
  724. { 1, 0, 0, 0, 0 },
  725. { 2, 2, 1, 2, 2 },
  726. { 3, 4, 1, 3, 2 },
  727. { 4, 8, 1, 4, 2 },
  728. { 5, 8, 1, 4, 2 },
  729. { 6, 8, 1, 4, 3 },
  730. { 7, 8, 1, 4, 3 },
  731. { 8, 15, 0, 4, 3 },
  732. { 9, 15, 0, 4, 3 },
  733. { 10, 16, 1, 5, 3 },
  734. };
  735. static const int count = ARRAY_SIZE(vals);
  736. int i, task_shift;
  737. task_shift = task * 0x40;
  738. for (i = 0; i < count; i++)
  739. if (vals[i].xpsc == prescale)
  740. break;
  741. if (i == count)
  742. return;
  743. /* horizontal prescaling */
  744. saa717x_write(sd, 0x60 + task_shift, vals[i].xpsc);
  745. /* accumulation length */
  746. saa717x_write(sd, 0x61 + task_shift, vals[i].xacl);
  747. /* level control */
  748. saa717x_write(sd, 0x62 + task_shift,
  749. (vals[i].xc2_1 << 3) | vals[i].xdcg);
  750. /*FIR prefilter control */
  751. saa717x_write(sd, 0x63 + task_shift,
  752. (vals[i].vpfy << 2) | vals[i].vpfy);
  753. }
  754. /********** scaling staff ***********/
  755. static void set_v_scale(struct v4l2_subdev *sd, int task, int yscale)
  756. {
  757. int task_shift;
  758. task_shift = task * 0x40;
  759. /* Vertical scaling ratio (LOW) */
  760. saa717x_write(sd, 0x70 + task_shift, yscale & 0xff);
  761. /* Vertical scaling ratio (HI) */
  762. saa717x_write(sd, 0x71 + task_shift, yscale >> 8);
  763. }
  764. static int saa717x_s_ctrl(struct v4l2_ctrl *ctrl)
  765. {
  766. struct v4l2_subdev *sd = to_sd(ctrl);
  767. struct saa717x_state *state = to_state(sd);
  768. switch (ctrl->id) {
  769. case V4L2_CID_BRIGHTNESS:
  770. saa717x_write(sd, 0x10a, ctrl->val);
  771. return 0;
  772. case V4L2_CID_CONTRAST:
  773. saa717x_write(sd, 0x10b, ctrl->val);
  774. return 0;
  775. case V4L2_CID_SATURATION:
  776. saa717x_write(sd, 0x10c, ctrl->val);
  777. return 0;
  778. case V4L2_CID_HUE:
  779. saa717x_write(sd, 0x10d, ctrl->val);
  780. return 0;
  781. case V4L2_CID_AUDIO_MUTE:
  782. state->audio_main_mute = ctrl->val;
  783. break;
  784. case V4L2_CID_AUDIO_VOLUME:
  785. state->audio_main_volume = ctrl->val;
  786. break;
  787. case V4L2_CID_AUDIO_BALANCE:
  788. state->audio_main_balance = ctrl->val;
  789. break;
  790. case V4L2_CID_AUDIO_TREBLE:
  791. state->audio_main_treble = ctrl->val;
  792. break;
  793. case V4L2_CID_AUDIO_BASS:
  794. state->audio_main_bass = ctrl->val;
  795. break;
  796. default:
  797. return 0;
  798. }
  799. set_audio_regs(sd, state);
  800. return 0;
  801. }
  802. static int saa717x_s_video_routing(struct v4l2_subdev *sd,
  803. u32 input, u32 output, u32 config)
  804. {
  805. struct saa717x_state *decoder = to_state(sd);
  806. int is_tuner = input & 0x80; /* tuner input flag */
  807. input &= 0x7f;
  808. v4l2_dbg(1, debug, sd, "decoder set input (%d)\n", input);
  809. /* inputs from 0-9 are available*/
  810. /* saa717x have mode0-mode9 but mode5 is reserved. */
  811. if (input > 9 || input == 5)
  812. return -EINVAL;
  813. if (decoder->input != input) {
  814. int input_line = input;
  815. decoder->input = input_line;
  816. v4l2_dbg(1, debug, sd, "now setting %s input %d\n",
  817. input_line >= 6 ? "S-Video" : "Composite",
  818. input_line);
  819. /* select mode */
  820. saa717x_write(sd, 0x102,
  821. (saa717x_read(sd, 0x102) & 0xf0) |
  822. input_line);
  823. /* bypass chrominance trap for modes 6..9 */
  824. saa717x_write(sd, 0x109,
  825. (saa717x_read(sd, 0x109) & 0x7f) |
  826. (input_line < 6 ? 0x0 : 0x80));
  827. /* change audio_mode */
  828. if (is_tuner) {
  829. /* tuner */
  830. set_audio_mode(sd, decoder->tuner_audio_mode);
  831. } else {
  832. /* Force to STEREO mode if Composite or
  833. * S-Video were chosen */
  834. set_audio_mode(sd, TUNER_AUDIO_STEREO);
  835. }
  836. /* change initialize procedure (Composite/S-Video) */
  837. if (is_tuner)
  838. saa717x_write_regs(sd, reg_init_tuner_input);
  839. else if (input_line >= 6)
  840. saa717x_write_regs(sd, reg_init_svideo_input);
  841. else
  842. saa717x_write_regs(sd, reg_init_composite_input);
  843. }
  844. return 0;
  845. }
  846. #ifdef CONFIG_VIDEO_ADV_DEBUG
  847. static int saa717x_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
  848. {
  849. reg->val = saa717x_read(sd, reg->reg);
  850. reg->size = 1;
  851. return 0;
  852. }
  853. static int saa717x_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
  854. {
  855. u16 addr = reg->reg & 0xffff;
  856. u8 val = reg->val & 0xff;
  857. saa717x_write(sd, addr, val);
  858. return 0;
  859. }
  860. #endif
  861. static int saa717x_set_fmt(struct v4l2_subdev *sd,
  862. struct v4l2_subdev_pad_config *cfg,
  863. struct v4l2_subdev_format *format)
  864. {
  865. struct v4l2_mbus_framefmt *fmt = &format->format;
  866. int prescale, h_scale, v_scale;
  867. v4l2_dbg(1, debug, sd, "decoder set size\n");
  868. if (format->pad || fmt->code != MEDIA_BUS_FMT_FIXED)
  869. return -EINVAL;
  870. /* FIXME need better bounds checking here */
  871. if (fmt->width < 1 || fmt->width > 1440)
  872. return -EINVAL;
  873. if (fmt->height < 1 || fmt->height > 960)
  874. return -EINVAL;
  875. fmt->field = V4L2_FIELD_INTERLACED;
  876. fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
  877. if (format->which == V4L2_SUBDEV_FORMAT_TRY)
  878. return 0;
  879. /* scaling setting */
  880. /* NTSC and interlace only */
  881. prescale = SAA717X_NTSC_WIDTH / fmt->width;
  882. if (prescale == 0)
  883. prescale = 1;
  884. h_scale = 1024 * SAA717X_NTSC_WIDTH / prescale / fmt->width;
  885. /* interlace */
  886. v_scale = 512 * 2 * SAA717X_NTSC_HEIGHT / fmt->height;
  887. /* Horizontal prescaling etc */
  888. set_h_prescale(sd, 0, prescale);
  889. set_h_prescale(sd, 1, prescale);
  890. /* Horizontal scaling increment */
  891. /* TASK A */
  892. saa717x_write(sd, 0x6C, (u8)(h_scale & 0xFF));
  893. saa717x_write(sd, 0x6D, (u8)((h_scale >> 8) & 0xFF));
  894. /* TASK B */
  895. saa717x_write(sd, 0xAC, (u8)(h_scale & 0xFF));
  896. saa717x_write(sd, 0xAD, (u8)((h_scale >> 8) & 0xFF));
  897. /* Vertical prescaling etc */
  898. set_v_scale(sd, 0, v_scale);
  899. set_v_scale(sd, 1, v_scale);
  900. /* set video output size */
  901. /* video number of pixels at output */
  902. /* TASK A */
  903. saa717x_write(sd, 0x5C, (u8)(fmt->width & 0xFF));
  904. saa717x_write(sd, 0x5D, (u8)((fmt->width >> 8) & 0xFF));
  905. /* TASK B */
  906. saa717x_write(sd, 0x9C, (u8)(fmt->width & 0xFF));
  907. saa717x_write(sd, 0x9D, (u8)((fmt->width >> 8) & 0xFF));
  908. /* video number of lines at output */
  909. /* TASK A */
  910. saa717x_write(sd, 0x5E, (u8)(fmt->height & 0xFF));
  911. saa717x_write(sd, 0x5F, (u8)((fmt->height >> 8) & 0xFF));
  912. /* TASK B */
  913. saa717x_write(sd, 0x9E, (u8)(fmt->height & 0xFF));
  914. saa717x_write(sd, 0x9F, (u8)((fmt->height >> 8) & 0xFF));
  915. return 0;
  916. }
  917. static int saa717x_s_radio(struct v4l2_subdev *sd)
  918. {
  919. struct saa717x_state *decoder = to_state(sd);
  920. decoder->radio = 1;
  921. return 0;
  922. }
  923. static int saa717x_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
  924. {
  925. struct saa717x_state *decoder = to_state(sd);
  926. v4l2_dbg(1, debug, sd, "decoder set norm ");
  927. v4l2_dbg(1, debug, sd, "(not yet implemented)\n");
  928. decoder->radio = 0;
  929. decoder->std = std;
  930. return 0;
  931. }
  932. static int saa717x_s_audio_routing(struct v4l2_subdev *sd,
  933. u32 input, u32 output, u32 config)
  934. {
  935. struct saa717x_state *decoder = to_state(sd);
  936. if (input < 3) { /* FIXME! --tadachi */
  937. decoder->audio_input = input;
  938. v4l2_dbg(1, debug, sd,
  939. "set decoder audio input to %d\n",
  940. decoder->audio_input);
  941. set_audio_regs(sd, decoder);
  942. return 0;
  943. }
  944. return -ERANGE;
  945. }
  946. static int saa717x_s_stream(struct v4l2_subdev *sd, int enable)
  947. {
  948. struct saa717x_state *decoder = to_state(sd);
  949. v4l2_dbg(1, debug, sd, "decoder %s output\n",
  950. enable ? "enable" : "disable");
  951. decoder->enable = enable;
  952. saa717x_write(sd, 0x193, enable ? 0xa6 : 0x26);
  953. return 0;
  954. }
  955. /* change audio mode */
  956. static int saa717x_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *vt)
  957. {
  958. struct saa717x_state *decoder = to_state(sd);
  959. int audio_mode;
  960. char *mes[4] = {
  961. "MONO", "STEREO", "LANG1", "LANG2/SAP"
  962. };
  963. audio_mode = TUNER_AUDIO_STEREO;
  964. switch (vt->audmode) {
  965. case V4L2_TUNER_MODE_MONO:
  966. audio_mode = TUNER_AUDIO_MONO;
  967. break;
  968. case V4L2_TUNER_MODE_STEREO:
  969. audio_mode = TUNER_AUDIO_STEREO;
  970. break;
  971. case V4L2_TUNER_MODE_LANG2:
  972. audio_mode = TUNER_AUDIO_LANG2;
  973. break;
  974. case V4L2_TUNER_MODE_LANG1:
  975. audio_mode = TUNER_AUDIO_LANG1;
  976. break;
  977. }
  978. v4l2_dbg(1, debug, sd, "change audio mode to %s\n",
  979. mes[audio_mode]);
  980. decoder->tuner_audio_mode = audio_mode;
  981. /* The registers are not changed here. */
  982. /* See DECODER_ENABLE_OUTPUT section. */
  983. set_audio_mode(sd, decoder->tuner_audio_mode);
  984. return 0;
  985. }
  986. static int saa717x_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
  987. {
  988. struct saa717x_state *decoder = to_state(sd);
  989. int dual_f, stereo_f;
  990. if (decoder->radio)
  991. return 0;
  992. get_inf_dev_status(sd, &dual_f, &stereo_f);
  993. v4l2_dbg(1, debug, sd, "DETECT==st:%d dual:%d\n",
  994. stereo_f, dual_f);
  995. /* mono */
  996. if ((dual_f == 0) && (stereo_f == 0)) {
  997. vt->rxsubchans = V4L2_TUNER_SUB_MONO;
  998. v4l2_dbg(1, debug, sd, "DETECT==MONO\n");
  999. }
  1000. /* stereo */
  1001. if (stereo_f == 1) {
  1002. if (vt->audmode == V4L2_TUNER_MODE_STEREO ||
  1003. vt->audmode == V4L2_TUNER_MODE_LANG1) {
  1004. vt->rxsubchans = V4L2_TUNER_SUB_STEREO;
  1005. v4l2_dbg(1, debug, sd, "DETECT==ST(ST)\n");
  1006. } else {
  1007. vt->rxsubchans = V4L2_TUNER_SUB_MONO;
  1008. v4l2_dbg(1, debug, sd, "DETECT==ST(MONO)\n");
  1009. }
  1010. }
  1011. /* dual */
  1012. if (dual_f == 1) {
  1013. if (vt->audmode == V4L2_TUNER_MODE_LANG2) {
  1014. vt->rxsubchans = V4L2_TUNER_SUB_LANG2 | V4L2_TUNER_SUB_MONO;
  1015. v4l2_dbg(1, debug, sd, "DETECT==DUAL1\n");
  1016. } else {
  1017. vt->rxsubchans = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_MONO;
  1018. v4l2_dbg(1, debug, sd, "DETECT==DUAL2\n");
  1019. }
  1020. }
  1021. return 0;
  1022. }
  1023. static int saa717x_log_status(struct v4l2_subdev *sd)
  1024. {
  1025. struct saa717x_state *state = to_state(sd);
  1026. v4l2_ctrl_handler_log_status(&state->hdl, sd->name);
  1027. return 0;
  1028. }
  1029. /* ----------------------------------------------------------------------- */
  1030. static const struct v4l2_ctrl_ops saa717x_ctrl_ops = {
  1031. .s_ctrl = saa717x_s_ctrl,
  1032. };
  1033. static const struct v4l2_subdev_core_ops saa717x_core_ops = {
  1034. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1035. .g_register = saa717x_g_register,
  1036. .s_register = saa717x_s_register,
  1037. #endif
  1038. .log_status = saa717x_log_status,
  1039. };
  1040. static const struct v4l2_subdev_tuner_ops saa717x_tuner_ops = {
  1041. .g_tuner = saa717x_g_tuner,
  1042. .s_tuner = saa717x_s_tuner,
  1043. .s_radio = saa717x_s_radio,
  1044. };
  1045. static const struct v4l2_subdev_video_ops saa717x_video_ops = {
  1046. .s_std = saa717x_s_std,
  1047. .s_routing = saa717x_s_video_routing,
  1048. .s_stream = saa717x_s_stream,
  1049. };
  1050. static const struct v4l2_subdev_audio_ops saa717x_audio_ops = {
  1051. .s_routing = saa717x_s_audio_routing,
  1052. };
  1053. static const struct v4l2_subdev_pad_ops saa717x_pad_ops = {
  1054. .set_fmt = saa717x_set_fmt,
  1055. };
  1056. static const struct v4l2_subdev_ops saa717x_ops = {
  1057. .core = &saa717x_core_ops,
  1058. .tuner = &saa717x_tuner_ops,
  1059. .audio = &saa717x_audio_ops,
  1060. .video = &saa717x_video_ops,
  1061. .pad = &saa717x_pad_ops,
  1062. };
  1063. /* ----------------------------------------------------------------------- */
  1064. /* i2c implementation */
  1065. /* ----------------------------------------------------------------------- */
  1066. static int saa717x_probe(struct i2c_client *client,
  1067. const struct i2c_device_id *did)
  1068. {
  1069. struct saa717x_state *decoder;
  1070. struct v4l2_ctrl_handler *hdl;
  1071. struct v4l2_subdev *sd;
  1072. u8 id = 0;
  1073. char *p = "";
  1074. /* Check if the adapter supports the needed features */
  1075. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  1076. return -EIO;
  1077. decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
  1078. if (decoder == NULL)
  1079. return -ENOMEM;
  1080. sd = &decoder->sd;
  1081. v4l2_i2c_subdev_init(sd, client, &saa717x_ops);
  1082. if (saa717x_write(sd, 0x5a4, 0xfe) &&
  1083. saa717x_write(sd, 0x5a5, 0x0f) &&
  1084. saa717x_write(sd, 0x5a6, 0x00) &&
  1085. saa717x_write(sd, 0x5a7, 0x01))
  1086. id = saa717x_read(sd, 0x5a0);
  1087. if (id != 0xc2 && id != 0x32 && id != 0xf2 && id != 0x6c) {
  1088. v4l2_dbg(1, debug, sd, "saa717x not found (id=%02x)\n", id);
  1089. return -ENODEV;
  1090. }
  1091. if (id == 0xc2)
  1092. p = "saa7173";
  1093. else if (id == 0x32)
  1094. p = "saa7174A";
  1095. else if (id == 0x6c)
  1096. p = "saa7174HL";
  1097. else
  1098. p = "saa7171";
  1099. v4l2_info(sd, "%s found @ 0x%x (%s)\n", p,
  1100. client->addr << 1, client->adapter->name);
  1101. hdl = &decoder->hdl;
  1102. v4l2_ctrl_handler_init(hdl, 9);
  1103. /* add in ascending ID order */
  1104. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1105. V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
  1106. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1107. V4L2_CID_CONTRAST, 0, 255, 1, 68);
  1108. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1109. V4L2_CID_SATURATION, 0, 255, 1, 64);
  1110. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1111. V4L2_CID_HUE, -128, 127, 1, 0);
  1112. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1113. V4L2_CID_AUDIO_VOLUME, 0, 65535, 65535 / 100, 42000);
  1114. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1115. V4L2_CID_AUDIO_BALANCE, 0, 65535, 65535 / 100, 32768);
  1116. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1117. V4L2_CID_AUDIO_BASS, -16, 15, 1, 0);
  1118. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1119. V4L2_CID_AUDIO_TREBLE, -16, 15, 1, 0);
  1120. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1121. V4L2_CID_AUDIO_MUTE, 0, 1, 1, 0);
  1122. sd->ctrl_handler = hdl;
  1123. if (hdl->error) {
  1124. int err = hdl->error;
  1125. v4l2_ctrl_handler_free(hdl);
  1126. return err;
  1127. }
  1128. decoder->std = V4L2_STD_NTSC;
  1129. decoder->input = -1;
  1130. decoder->enable = 1;
  1131. /* FIXME!! */
  1132. decoder->playback = 0; /* initially capture mode used */
  1133. decoder->audio = 1; /* DECODER_AUDIO_48_KHZ */
  1134. decoder->audio_input = 2; /* FIXME!! */
  1135. decoder->tuner_audio_mode = TUNER_AUDIO_STEREO;
  1136. /* set volume, bass and treble */
  1137. decoder->audio_main_vol_l = 6;
  1138. decoder->audio_main_vol_r = 6;
  1139. v4l2_dbg(1, debug, sd, "writing init values\n");
  1140. /* FIXME!! */
  1141. saa717x_write_regs(sd, reg_init_initialize);
  1142. v4l2_ctrl_handler_setup(hdl);
  1143. set_current_state(TASK_INTERRUPTIBLE);
  1144. schedule_timeout(2*HZ);
  1145. return 0;
  1146. }
  1147. static int saa717x_remove(struct i2c_client *client)
  1148. {
  1149. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1150. v4l2_device_unregister_subdev(sd);
  1151. v4l2_ctrl_handler_free(sd->ctrl_handler);
  1152. return 0;
  1153. }
  1154. /* ----------------------------------------------------------------------- */
  1155. static const struct i2c_device_id saa717x_id[] = {
  1156. { "saa717x", 0 },
  1157. { }
  1158. };
  1159. MODULE_DEVICE_TABLE(i2c, saa717x_id);
  1160. static struct i2c_driver saa717x_driver = {
  1161. .driver = {
  1162. .name = "saa717x",
  1163. },
  1164. .probe = saa717x_probe,
  1165. .remove = saa717x_remove,
  1166. .id_table = saa717x_id,
  1167. };
  1168. module_i2c_driver(saa717x_driver);