max9286.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Maxim MAX9286 GMSL Deserializer Driver
  4. *
  5. * Copyright (C) 2017-2019 Jacopo Mondi
  6. * Copyright (C) 2017-2019 Kieran Bingham
  7. * Copyright (C) 2017-2019 Laurent Pinchart
  8. * Copyright (C) 2017-2019 Niklas Söderlund
  9. * Copyright (C) 2016 Renesas Electronics Corporation
  10. * Copyright (C) 2015 Cogent Embedded, Inc.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/fwnode.h>
  15. #include <linux/gpio/consumer.h>
  16. #include <linux/gpio/driver.h>
  17. #include <linux/i2c.h>
  18. #include <linux/i2c-mux.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/of_graph.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/slab.h>
  24. #include <media/v4l2-async.h>
  25. #include <media/v4l2-ctrls.h>
  26. #include <media/v4l2-device.h>
  27. #include <media/v4l2-fwnode.h>
  28. #include <media/v4l2-subdev.h>
  29. /* Register 0x00 */
  30. #define MAX9286_MSTLINKSEL_AUTO (7 << 5)
  31. #define MAX9286_MSTLINKSEL(n) ((n) << 5)
  32. #define MAX9286_EN_VS_GEN BIT(4)
  33. #define MAX9286_LINKEN(n) (1 << (n))
  34. /* Register 0x01 */
  35. #define MAX9286_FSYNCMODE_ECU (3 << 6)
  36. #define MAX9286_FSYNCMODE_EXT (2 << 6)
  37. #define MAX9286_FSYNCMODE_INT_OUT (1 << 6)
  38. #define MAX9286_FSYNCMODE_INT_HIZ (0 << 6)
  39. #define MAX9286_GPIEN BIT(5)
  40. #define MAX9286_ENLMO_RSTFSYNC BIT(2)
  41. #define MAX9286_FSYNCMETH_AUTO (2 << 0)
  42. #define MAX9286_FSYNCMETH_SEMI_AUTO (1 << 0)
  43. #define MAX9286_FSYNCMETH_MANUAL (0 << 0)
  44. #define MAX9286_REG_FSYNC_PERIOD_L 0x06
  45. #define MAX9286_REG_FSYNC_PERIOD_M 0x07
  46. #define MAX9286_REG_FSYNC_PERIOD_H 0x08
  47. /* Register 0x0a */
  48. #define MAX9286_FWDCCEN(n) (1 << ((n) + 4))
  49. #define MAX9286_REVCCEN(n) (1 << (n))
  50. /* Register 0x0c */
  51. #define MAX9286_HVEN BIT(7)
  52. #define MAX9286_EDC_6BIT_HAMMING (2 << 5)
  53. #define MAX9286_EDC_6BIT_CRC (1 << 5)
  54. #define MAX9286_EDC_1BIT_PARITY (0 << 5)
  55. #define MAX9286_DESEL BIT(4)
  56. #define MAX9286_INVVS BIT(3)
  57. #define MAX9286_INVHS BIT(2)
  58. #define MAX9286_HVSRC_D0 (2 << 0)
  59. #define MAX9286_HVSRC_D14 (1 << 0)
  60. #define MAX9286_HVSRC_D18 (0 << 0)
  61. /* Register 0x0f */
  62. #define MAX9286_0X0F_RESERVED BIT(3)
  63. /* Register 0x12 */
  64. #define MAX9286_CSILANECNT(n) (((n) - 1) << 6)
  65. #define MAX9286_CSIDBL BIT(5)
  66. #define MAX9286_DBL BIT(4)
  67. #define MAX9286_DATATYPE_USER_8BIT (11 << 0)
  68. #define MAX9286_DATATYPE_USER_YUV_12BIT (10 << 0)
  69. #define MAX9286_DATATYPE_USER_24BIT (9 << 0)
  70. #define MAX9286_DATATYPE_RAW14 (8 << 0)
  71. #define MAX9286_DATATYPE_RAW11 (7 << 0)
  72. #define MAX9286_DATATYPE_RAW10 (6 << 0)
  73. #define MAX9286_DATATYPE_RAW8 (5 << 0)
  74. #define MAX9286_DATATYPE_YUV422_10BIT (4 << 0)
  75. #define MAX9286_DATATYPE_YUV422_8BIT (3 << 0)
  76. #define MAX9286_DATATYPE_RGB555 (2 << 0)
  77. #define MAX9286_DATATYPE_RGB565 (1 << 0)
  78. #define MAX9286_DATATYPE_RGB888 (0 << 0)
  79. /* Register 0x15 */
  80. #define MAX9286_VC(n) ((n) << 5)
  81. #define MAX9286_VCTYPE BIT(4)
  82. #define MAX9286_CSIOUTEN BIT(3)
  83. #define MAX9286_0X15_RESV (3 << 0)
  84. /* Register 0x1b */
  85. #define MAX9286_SWITCHIN(n) (1 << ((n) + 4))
  86. #define MAX9286_ENEQ(n) (1 << (n))
  87. /* Register 0x27 */
  88. #define MAX9286_LOCKED BIT(7)
  89. /* Register 0x31 */
  90. #define MAX9286_FSYNC_LOCKED BIT(6)
  91. /* Register 0x34 */
  92. #define MAX9286_I2CLOCACK BIT(7)
  93. #define MAX9286_I2CSLVSH_1046NS_469NS (3 << 5)
  94. #define MAX9286_I2CSLVSH_938NS_352NS (2 << 5)
  95. #define MAX9286_I2CSLVSH_469NS_234NS (1 << 5)
  96. #define MAX9286_I2CSLVSH_352NS_117NS (0 << 5)
  97. #define MAX9286_I2CMSTBT_837KBPS (7 << 2)
  98. #define MAX9286_I2CMSTBT_533KBPS (6 << 2)
  99. #define MAX9286_I2CMSTBT_339KBPS (5 << 2)
  100. #define MAX9286_I2CMSTBT_173KBPS (4 << 2)
  101. #define MAX9286_I2CMSTBT_105KBPS (3 << 2)
  102. #define MAX9286_I2CMSTBT_84KBPS (2 << 2)
  103. #define MAX9286_I2CMSTBT_28KBPS (1 << 2)
  104. #define MAX9286_I2CMSTBT_8KBPS (0 << 2)
  105. #define MAX9286_I2CSLVTO_NONE (3 << 0)
  106. #define MAX9286_I2CSLVTO_1024US (2 << 0)
  107. #define MAX9286_I2CSLVTO_256US (1 << 0)
  108. #define MAX9286_I2CSLVTO_64US (0 << 0)
  109. /* Register 0x3b */
  110. #define MAX9286_REV_TRF(n) ((n) << 4)
  111. #define MAX9286_REV_AMP(n) ((((n) - 30) / 10) << 1) /* in mV */
  112. #define MAX9286_REV_AMP_X BIT(0)
  113. /* Register 0x3f */
  114. #define MAX9286_EN_REV_CFG BIT(6)
  115. #define MAX9286_REV_FLEN(n) ((n) - 20)
  116. /* Register 0x49 */
  117. #define MAX9286_VIDEO_DETECT_MASK 0x0f
  118. /* Register 0x69 */
  119. #define MAX9286_LFLTBMONMASKED BIT(7)
  120. #define MAX9286_LOCKMONMASKED BIT(6)
  121. #define MAX9286_AUTOCOMBACKEN BIT(5)
  122. #define MAX9286_AUTOMASKEN BIT(4)
  123. #define MAX9286_MASKLINK(n) ((n) << 0)
  124. /*
  125. * The sink and source pads are created to match the OF graph port numbers so
  126. * that their indexes can be used interchangeably.
  127. */
  128. #define MAX9286_NUM_GMSL 4
  129. #define MAX9286_N_SINKS 4
  130. #define MAX9286_N_PADS 5
  131. #define MAX9286_SRC_PAD 4
  132. struct max9286_source {
  133. struct v4l2_subdev *sd;
  134. struct fwnode_handle *fwnode;
  135. };
  136. struct max9286_asd {
  137. struct v4l2_async_subdev base;
  138. struct max9286_source *source;
  139. };
  140. static inline struct max9286_asd *to_max9286_asd(struct v4l2_async_subdev *asd)
  141. {
  142. return container_of(asd, struct max9286_asd, base);
  143. }
  144. struct max9286_priv {
  145. struct i2c_client *client;
  146. struct gpio_desc *gpiod_pwdn;
  147. struct v4l2_subdev sd;
  148. struct media_pad pads[MAX9286_N_PADS];
  149. struct regulator *regulator;
  150. struct gpio_chip gpio;
  151. u8 gpio_state;
  152. struct i2c_mux_core *mux;
  153. unsigned int mux_channel;
  154. bool mux_open;
  155. struct v4l2_ctrl_handler ctrls;
  156. struct v4l2_ctrl *pixelrate;
  157. struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS];
  158. /* Protects controls and fmt structures */
  159. struct mutex mutex;
  160. unsigned int nsources;
  161. unsigned int source_mask;
  162. unsigned int route_mask;
  163. unsigned int bound_sources;
  164. unsigned int csi2_data_lanes;
  165. struct max9286_source sources[MAX9286_NUM_GMSL];
  166. struct v4l2_async_notifier notifier;
  167. };
  168. static struct max9286_source *next_source(struct max9286_priv *priv,
  169. struct max9286_source *source)
  170. {
  171. if (!source)
  172. source = &priv->sources[0];
  173. else
  174. source++;
  175. for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) {
  176. if (source->fwnode)
  177. return source;
  178. }
  179. return NULL;
  180. }
  181. #define for_each_source(priv, source) \
  182. for ((source) = NULL; ((source) = next_source((priv), (source))); )
  183. #define to_index(priv, source) ((source) - &(priv)->sources[0])
  184. static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd)
  185. {
  186. return container_of(sd, struct max9286_priv, sd);
  187. }
  188. /* -----------------------------------------------------------------------------
  189. * I2C IO
  190. */
  191. static int max9286_read(struct max9286_priv *priv, u8 reg)
  192. {
  193. int ret;
  194. ret = i2c_smbus_read_byte_data(priv->client, reg);
  195. if (ret < 0)
  196. dev_err(&priv->client->dev,
  197. "%s: register 0x%02x read failed (%d)\n",
  198. __func__, reg, ret);
  199. return ret;
  200. }
  201. static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val)
  202. {
  203. int ret;
  204. ret = i2c_smbus_write_byte_data(priv->client, reg, val);
  205. if (ret < 0)
  206. dev_err(&priv->client->dev,
  207. "%s: register 0x%02x write failed (%d)\n",
  208. __func__, reg, ret);
  209. return ret;
  210. }
  211. /* -----------------------------------------------------------------------------
  212. * I2C Multiplexer
  213. */
  214. static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf)
  215. {
  216. max9286_write(priv, 0x0a, conf);
  217. /*
  218. * We must sleep after any change to the forward or reverse channel
  219. * configuration.
  220. */
  221. usleep_range(3000, 5000);
  222. }
  223. static void max9286_i2c_mux_open(struct max9286_priv *priv)
  224. {
  225. /* Open all channels on the MAX9286 */
  226. max9286_i2c_mux_configure(priv, 0xff);
  227. priv->mux_open = true;
  228. }
  229. static void max9286_i2c_mux_close(struct max9286_priv *priv)
  230. {
  231. /*
  232. * Ensure that both the forward and reverse channel are disabled on the
  233. * mux, and that the channel ID is invalidated to ensure we reconfigure
  234. * on the next max9286_i2c_mux_select() call.
  235. */
  236. max9286_i2c_mux_configure(priv, 0x00);
  237. priv->mux_open = false;
  238. priv->mux_channel = -1;
  239. }
  240. static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
  241. {
  242. struct max9286_priv *priv = i2c_mux_priv(muxc);
  243. /* Channel select is disabled when configured in the opened state. */
  244. if (priv->mux_open)
  245. return 0;
  246. if (priv->mux_channel == chan)
  247. return 0;
  248. priv->mux_channel = chan;
  249. max9286_i2c_mux_configure(priv,
  250. MAX9286_FWDCCEN(chan) |
  251. MAX9286_REVCCEN(chan));
  252. return 0;
  253. }
  254. static int max9286_i2c_mux_init(struct max9286_priv *priv)
  255. {
  256. struct max9286_source *source;
  257. int ret;
  258. if (!i2c_check_functionality(priv->client->adapter,
  259. I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  260. return -ENODEV;
  261. priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
  262. priv->nsources, 0, I2C_MUX_LOCKED,
  263. max9286_i2c_mux_select, NULL);
  264. if (!priv->mux)
  265. return -ENOMEM;
  266. priv->mux->priv = priv;
  267. for_each_source(priv, source) {
  268. unsigned int index = to_index(priv, source);
  269. ret = i2c_mux_add_adapter(priv->mux, 0, index, 0);
  270. if (ret < 0)
  271. goto error;
  272. }
  273. return 0;
  274. error:
  275. i2c_mux_del_adapters(priv->mux);
  276. return ret;
  277. }
  278. static void max9286_configure_i2c(struct max9286_priv *priv, bool localack)
  279. {
  280. u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US |
  281. MAX9286_I2CMSTBT_105KBPS;
  282. if (localack)
  283. config |= MAX9286_I2CLOCACK;
  284. max9286_write(priv, 0x34, config);
  285. usleep_range(3000, 5000);
  286. }
  287. /*
  288. * max9286_check_video_links() - Make sure video links are detected and locked
  289. *
  290. * Performs safety checks on video link status. Make sure they are detected
  291. * and all enabled links are locked.
  292. *
  293. * Returns 0 for success, -EIO for errors.
  294. */
  295. static int max9286_check_video_links(struct max9286_priv *priv)
  296. {
  297. unsigned int i;
  298. int ret;
  299. /*
  300. * Make sure valid video links are detected.
  301. * The delay is not characterized in de-serializer manual, wait up
  302. * to 5 ms.
  303. */
  304. for (i = 0; i < 10; i++) {
  305. ret = max9286_read(priv, 0x49);
  306. if (ret < 0)
  307. return -EIO;
  308. if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask)
  309. break;
  310. usleep_range(350, 500);
  311. }
  312. if (i == 10) {
  313. dev_err(&priv->client->dev,
  314. "Unable to detect video links: 0x%02x\n", ret);
  315. return -EIO;
  316. }
  317. /* Make sure all enabled links are locked (4ms max). */
  318. for (i = 0; i < 10; i++) {
  319. ret = max9286_read(priv, 0x27);
  320. if (ret < 0)
  321. return -EIO;
  322. if (ret & MAX9286_LOCKED)
  323. break;
  324. usleep_range(350, 450);
  325. }
  326. if (i == 10) {
  327. dev_err(&priv->client->dev, "Not all enabled links locked\n");
  328. return -EIO;
  329. }
  330. return 0;
  331. }
  332. /*
  333. * max9286_check_config_link() - Detect and wait for configuration links
  334. *
  335. * Determine if the configuration channel is up and settled for a link.
  336. *
  337. * Returns 0 for success, -EIO for errors.
  338. */
  339. static int max9286_check_config_link(struct max9286_priv *priv,
  340. unsigned int source_mask)
  341. {
  342. unsigned int conflink_mask = (source_mask & 0x0f) << 4;
  343. unsigned int i;
  344. int ret;
  345. /*
  346. * Make sure requested configuration links are detected.
  347. * The delay is not characterized in the chip manual: wait up
  348. * to 5 milliseconds.
  349. */
  350. for (i = 0; i < 10; i++) {
  351. ret = max9286_read(priv, 0x49);
  352. if (ret < 0)
  353. return -EIO;
  354. ret &= 0xf0;
  355. if (ret == conflink_mask)
  356. break;
  357. usleep_range(350, 500);
  358. }
  359. if (ret != conflink_mask) {
  360. dev_err(&priv->client->dev,
  361. "Unable to detect configuration links: 0x%02x expected 0x%02x\n",
  362. ret, conflink_mask);
  363. return -EIO;
  364. }
  365. dev_info(&priv->client->dev,
  366. "Successfully detected configuration links after %u loops: 0x%02x\n",
  367. i, conflink_mask);
  368. return 0;
  369. }
  370. /* -----------------------------------------------------------------------------
  371. * V4L2 Subdev
  372. */
  373. static int max9286_set_pixelrate(struct max9286_priv *priv)
  374. {
  375. struct max9286_source *source = NULL;
  376. u64 pixelrate = 0;
  377. for_each_source(priv, source) {
  378. struct v4l2_ctrl *ctrl;
  379. u64 source_rate = 0;
  380. /* Pixel rate is mandatory to be reported by sources. */
  381. ctrl = v4l2_ctrl_find(source->sd->ctrl_handler,
  382. V4L2_CID_PIXEL_RATE);
  383. if (!ctrl) {
  384. pixelrate = 0;
  385. break;
  386. }
  387. /* All source must report the same pixel rate. */
  388. source_rate = v4l2_ctrl_g_ctrl_int64(ctrl);
  389. if (!pixelrate) {
  390. pixelrate = source_rate;
  391. } else if (pixelrate != source_rate) {
  392. dev_err(&priv->client->dev,
  393. "Unable to calculate pixel rate\n");
  394. return -EINVAL;
  395. }
  396. }
  397. if (!pixelrate) {
  398. dev_err(&priv->client->dev,
  399. "No pixel rate control available in sources\n");
  400. return -EINVAL;
  401. }
  402. /*
  403. * The CSI-2 transmitter pixel rate is the single source rate multiplied
  404. * by the number of available sources.
  405. */
  406. return v4l2_ctrl_s_ctrl_int64(priv->pixelrate,
  407. pixelrate * priv->nsources);
  408. }
  409. static int max9286_notify_bound(struct v4l2_async_notifier *notifier,
  410. struct v4l2_subdev *subdev,
  411. struct v4l2_async_subdev *asd)
  412. {
  413. struct max9286_priv *priv = sd_to_max9286(notifier->sd);
  414. struct max9286_source *source = to_max9286_asd(asd)->source;
  415. unsigned int index = to_index(priv, source);
  416. unsigned int src_pad;
  417. int ret;
  418. ret = media_entity_get_fwnode_pad(&subdev->entity,
  419. source->fwnode,
  420. MEDIA_PAD_FL_SOURCE);
  421. if (ret < 0) {
  422. dev_err(&priv->client->dev,
  423. "Failed to find pad for %s\n", subdev->name);
  424. return ret;
  425. }
  426. priv->bound_sources |= BIT(index);
  427. source->sd = subdev;
  428. src_pad = ret;
  429. ret = media_create_pad_link(&source->sd->entity, src_pad,
  430. &priv->sd.entity, index,
  431. MEDIA_LNK_FL_ENABLED |
  432. MEDIA_LNK_FL_IMMUTABLE);
  433. if (ret) {
  434. dev_err(&priv->client->dev,
  435. "Unable to link %s:%u -> %s:%u\n",
  436. source->sd->name, src_pad, priv->sd.name, index);
  437. return ret;
  438. }
  439. dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n",
  440. subdev->name, src_pad, index);
  441. /*
  442. * We can only register v4l2_async_notifiers, which do not provide a
  443. * means to register a complete callback. bound_sources allows us to
  444. * identify when all remote serializers have completed their probe.
  445. */
  446. if (priv->bound_sources != priv->source_mask)
  447. return 0;
  448. /*
  449. * All enabled sources have probed and enabled their reverse control
  450. * channels:
  451. *
  452. * - Verify all configuration links are properly detected
  453. * - Disable auto-ack as communication on the control channel are now
  454. * stable.
  455. */
  456. max9286_check_config_link(priv, priv->source_mask);
  457. /*
  458. * Re-configure I2C with local acknowledge disabled after cameras have
  459. * probed.
  460. */
  461. max9286_configure_i2c(priv, false);
  462. return max9286_set_pixelrate(priv);
  463. }
  464. static void max9286_notify_unbind(struct v4l2_async_notifier *notifier,
  465. struct v4l2_subdev *subdev,
  466. struct v4l2_async_subdev *asd)
  467. {
  468. struct max9286_priv *priv = sd_to_max9286(notifier->sd);
  469. struct max9286_source *source = to_max9286_asd(asd)->source;
  470. unsigned int index = to_index(priv, source);
  471. source->sd = NULL;
  472. priv->bound_sources &= ~BIT(index);
  473. }
  474. static const struct v4l2_async_notifier_operations max9286_notify_ops = {
  475. .bound = max9286_notify_bound,
  476. .unbind = max9286_notify_unbind,
  477. };
  478. static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
  479. {
  480. struct device *dev = &priv->client->dev;
  481. struct max9286_source *source = NULL;
  482. int ret;
  483. if (!priv->nsources)
  484. return 0;
  485. v4l2_async_notifier_init(&priv->notifier);
  486. for_each_source(priv, source) {
  487. unsigned int i = to_index(priv, source);
  488. struct v4l2_async_subdev *asd;
  489. asd = v4l2_async_notifier_add_fwnode_subdev(&priv->notifier,
  490. source->fwnode,
  491. sizeof(struct max9286_asd));
  492. if (IS_ERR(asd)) {
  493. dev_err(dev, "Failed to add subdev for source %u: %ld",
  494. i, PTR_ERR(asd));
  495. v4l2_async_notifier_cleanup(&priv->notifier);
  496. return PTR_ERR(asd);
  497. }
  498. to_max9286_asd(asd)->source = source;
  499. }
  500. priv->notifier.ops = &max9286_notify_ops;
  501. ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
  502. if (ret) {
  503. dev_err(dev, "Failed to register subdev_notifier");
  504. v4l2_async_notifier_cleanup(&priv->notifier);
  505. return ret;
  506. }
  507. return 0;
  508. }
  509. static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
  510. {
  511. if (!priv->nsources)
  512. return;
  513. v4l2_async_notifier_unregister(&priv->notifier);
  514. v4l2_async_notifier_cleanup(&priv->notifier);
  515. }
  516. static int max9286_s_stream(struct v4l2_subdev *sd, int enable)
  517. {
  518. struct max9286_priv *priv = sd_to_max9286(sd);
  519. struct max9286_source *source;
  520. unsigned int i;
  521. bool sync = false;
  522. int ret;
  523. if (enable) {
  524. /*
  525. * The frame sync between cameras is transmitted across the
  526. * reverse channel as GPIO. We must open all channels while
  527. * streaming to allow this synchronisation signal to be shared.
  528. */
  529. max9286_i2c_mux_open(priv);
  530. /* Start all cameras. */
  531. for_each_source(priv, source) {
  532. ret = v4l2_subdev_call(source->sd, video, s_stream, 1);
  533. if (ret)
  534. return ret;
  535. }
  536. ret = max9286_check_video_links(priv);
  537. if (ret)
  538. return ret;
  539. /*
  540. * Wait until frame synchronization is locked.
  541. *
  542. * Manual says frame sync locking should take ~6 VTS.
  543. * From practical experience at least 8 are required. Give
  544. * 12 complete frames time (~400ms at 30 fps) to achieve frame
  545. * locking before returning error.
  546. */
  547. for (i = 0; i < 40; i++) {
  548. if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) {
  549. sync = true;
  550. break;
  551. }
  552. usleep_range(9000, 11000);
  553. }
  554. if (!sync) {
  555. dev_err(&priv->client->dev,
  556. "Failed to get frame synchronization\n");
  557. return -EXDEV; /* Invalid cross-device link */
  558. }
  559. /*
  560. * Enable CSI output, VC set according to link number.
  561. * Bit 7 must be set (chip manual says it's 0 and reserved).
  562. */
  563. max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE |
  564. MAX9286_CSIOUTEN | MAX9286_0X15_RESV);
  565. } else {
  566. max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
  567. /* Stop all cameras. */
  568. for_each_source(priv, source)
  569. v4l2_subdev_call(source->sd, video, s_stream, 0);
  570. max9286_i2c_mux_close(priv);
  571. }
  572. return 0;
  573. }
  574. static int max9286_enum_mbus_code(struct v4l2_subdev *sd,
  575. struct v4l2_subdev_pad_config *cfg,
  576. struct v4l2_subdev_mbus_code_enum *code)
  577. {
  578. if (code->pad || code->index > 0)
  579. return -EINVAL;
  580. code->code = MEDIA_BUS_FMT_UYVY8_1X16;
  581. return 0;
  582. }
  583. static struct v4l2_mbus_framefmt *
  584. max9286_get_pad_format(struct max9286_priv *priv,
  585. struct v4l2_subdev_pad_config *cfg,
  586. unsigned int pad, u32 which)
  587. {
  588. switch (which) {
  589. case V4L2_SUBDEV_FORMAT_TRY:
  590. return v4l2_subdev_get_try_format(&priv->sd, cfg, pad);
  591. case V4L2_SUBDEV_FORMAT_ACTIVE:
  592. return &priv->fmt[pad];
  593. default:
  594. return NULL;
  595. }
  596. }
  597. static int max9286_set_fmt(struct v4l2_subdev *sd,
  598. struct v4l2_subdev_pad_config *cfg,
  599. struct v4l2_subdev_format *format)
  600. {
  601. struct max9286_priv *priv = sd_to_max9286(sd);
  602. struct v4l2_mbus_framefmt *cfg_fmt;
  603. if (format->pad == MAX9286_SRC_PAD)
  604. return -EINVAL;
  605. /* Refuse non YUV422 formats as we hardcode DT to 8 bit YUV422 */
  606. switch (format->format.code) {
  607. case MEDIA_BUS_FMT_UYVY8_1X16:
  608. case MEDIA_BUS_FMT_VYUY8_1X16:
  609. case MEDIA_BUS_FMT_YUYV8_1X16:
  610. case MEDIA_BUS_FMT_YVYU8_1X16:
  611. break;
  612. default:
  613. format->format.code = MEDIA_BUS_FMT_UYVY8_1X16;
  614. break;
  615. }
  616. cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
  617. if (!cfg_fmt)
  618. return -EINVAL;
  619. mutex_lock(&priv->mutex);
  620. *cfg_fmt = format->format;
  621. mutex_unlock(&priv->mutex);
  622. return 0;
  623. }
  624. static int max9286_get_fmt(struct v4l2_subdev *sd,
  625. struct v4l2_subdev_pad_config *cfg,
  626. struct v4l2_subdev_format *format)
  627. {
  628. struct max9286_priv *priv = sd_to_max9286(sd);
  629. struct v4l2_mbus_framefmt *cfg_fmt;
  630. unsigned int pad = format->pad;
  631. /*
  632. * Multiplexed Stream Support: Support link validation by returning the
  633. * format of the first bound link. All links must have the same format,
  634. * as we do not support mixing and matching of cameras connected to the
  635. * max9286.
  636. */
  637. if (pad == MAX9286_SRC_PAD)
  638. pad = __ffs(priv->bound_sources);
  639. cfg_fmt = max9286_get_pad_format(priv, cfg, pad, format->which);
  640. if (!cfg_fmt)
  641. return -EINVAL;
  642. mutex_lock(&priv->mutex);
  643. format->format = *cfg_fmt;
  644. mutex_unlock(&priv->mutex);
  645. return 0;
  646. }
  647. static const struct v4l2_subdev_video_ops max9286_video_ops = {
  648. .s_stream = max9286_s_stream,
  649. };
  650. static const struct v4l2_subdev_pad_ops max9286_pad_ops = {
  651. .enum_mbus_code = max9286_enum_mbus_code,
  652. .get_fmt = max9286_get_fmt,
  653. .set_fmt = max9286_set_fmt,
  654. };
  655. static const struct v4l2_subdev_ops max9286_subdev_ops = {
  656. .video = &max9286_video_ops,
  657. .pad = &max9286_pad_ops,
  658. };
  659. static void max9286_init_format(struct v4l2_mbus_framefmt *fmt)
  660. {
  661. fmt->width = 1280;
  662. fmt->height = 800;
  663. fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
  664. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  665. fmt->field = V4L2_FIELD_NONE;
  666. fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
  667. fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
  668. fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT;
  669. }
  670. static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
  671. {
  672. struct v4l2_mbus_framefmt *format;
  673. unsigned int i;
  674. for (i = 0; i < MAX9286_N_SINKS; i++) {
  675. format = v4l2_subdev_get_try_format(subdev, fh->pad, i);
  676. max9286_init_format(format);
  677. }
  678. return 0;
  679. }
  680. static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = {
  681. .open = max9286_open,
  682. };
  683. static int max9286_s_ctrl(struct v4l2_ctrl *ctrl)
  684. {
  685. switch (ctrl->id) {
  686. case V4L2_CID_PIXEL_RATE:
  687. return 0;
  688. default:
  689. return -EINVAL;
  690. }
  691. }
  692. static const struct v4l2_ctrl_ops max9286_ctrl_ops = {
  693. .s_ctrl = max9286_s_ctrl,
  694. };
  695. static int max9286_v4l2_register(struct max9286_priv *priv)
  696. {
  697. struct device *dev = &priv->client->dev;
  698. struct fwnode_handle *ep;
  699. int ret;
  700. int i;
  701. /* Register v4l2 async notifiers for connected Camera subdevices */
  702. ret = max9286_v4l2_notifier_register(priv);
  703. if (ret) {
  704. dev_err(dev, "Unable to register V4L2 async notifiers\n");
  705. return ret;
  706. }
  707. /* Configure V4L2 for the MAX9286 itself */
  708. for (i = 0; i < MAX9286_N_SINKS; i++)
  709. max9286_init_format(&priv->fmt[i]);
  710. v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
  711. priv->sd.internal_ops = &max9286_subdev_internal_ops;
  712. priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  713. v4l2_ctrl_handler_init(&priv->ctrls, 1);
  714. priv->pixelrate = v4l2_ctrl_new_std(&priv->ctrls,
  715. &max9286_ctrl_ops,
  716. V4L2_CID_PIXEL_RATE,
  717. 1, INT_MAX, 1, 50000000);
  718. priv->sd.ctrl_handler = &priv->ctrls;
  719. ret = priv->ctrls.error;
  720. if (ret)
  721. goto err_async;
  722. priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
  723. priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
  724. for (i = 0; i < MAX9286_SRC_PAD; i++)
  725. priv->pads[i].flags = MEDIA_PAD_FL_SINK;
  726. ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
  727. priv->pads);
  728. if (ret)
  729. goto err_async;
  730. ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
  731. 0, 0);
  732. if (!ep) {
  733. dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
  734. ret = -ENOENT;
  735. goto err_async;
  736. }
  737. priv->sd.fwnode = ep;
  738. ret = v4l2_async_register_subdev(&priv->sd);
  739. if (ret < 0) {
  740. dev_err(dev, "Unable to register subdevice\n");
  741. goto err_put_node;
  742. }
  743. return 0;
  744. err_put_node:
  745. fwnode_handle_put(ep);
  746. err_async:
  747. max9286_v4l2_notifier_unregister(priv);
  748. return ret;
  749. }
  750. static void max9286_v4l2_unregister(struct max9286_priv *priv)
  751. {
  752. fwnode_handle_put(priv->sd.fwnode);
  753. v4l2_async_unregister_subdev(&priv->sd);
  754. max9286_v4l2_notifier_unregister(priv);
  755. }
  756. /* -----------------------------------------------------------------------------
  757. * Probe/Remove
  758. */
  759. static int max9286_setup(struct max9286_priv *priv)
  760. {
  761. /*
  762. * Link ordering values for all enabled links combinations. Orders must
  763. * be assigned sequentially from 0 to the number of enabled links
  764. * without leaving any hole for disabled links. We thus assign orders to
  765. * enabled links first, and use the remaining order values for disabled
  766. * links are all links must have a different order value;
  767. */
  768. static const u8 link_order[] = {
  769. (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
  770. (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
  771. (3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
  772. (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
  773. (3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
  774. (3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
  775. (3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
  776. (3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
  777. (0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
  778. (1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
  779. (1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
  780. (2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
  781. (1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
  782. (2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
  783. (2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
  784. (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
  785. };
  786. /*
  787. * Set the I2C bus speed.
  788. *
  789. * Enable I2C Local Acknowledge during the probe sequences of the camera
  790. * only. This should be disabled after the mux is initialised.
  791. */
  792. max9286_configure_i2c(priv, true);
  793. /*
  794. * Reverse channel setup.
  795. *
  796. * - Enable custom reverse channel configuration (through register 0x3f)
  797. * and set the first pulse length to 35 clock cycles.
  798. * - Increase the reverse channel amplitude to 170mV to accommodate the
  799. * high threshold enabled by the serializer driver.
  800. */
  801. max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
  802. max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
  803. MAX9286_REV_AMP_X);
  804. usleep_range(2000, 2500);
  805. /*
  806. * Enable GMSL links, mask unused ones and autodetect link
  807. * used as CSI clock source.
  808. */
  809. max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
  810. max9286_write(priv, 0x0b, link_order[priv->route_mask]);
  811. max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
  812. /*
  813. * Video format setup:
  814. * Disable CSI output, VC is set according to Link number.
  815. */
  816. max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
  817. /* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
  818. max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
  819. MAX9286_CSILANECNT(priv->csi2_data_lanes) |
  820. MAX9286_DATATYPE_YUV422_8BIT);
  821. /* Automatic: FRAMESYNC taken from the slowest Link. */
  822. max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
  823. MAX9286_FSYNCMETH_AUTO);
  824. /* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
  825. max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
  826. MAX9286_HVSRC_D14);
  827. /*
  828. * The overlap window seems to provide additional validation by tracking
  829. * the delay between vsync and frame sync, generating an error if the
  830. * delay is bigger than the programmed window, though it's not yet clear
  831. * what value should be set.
  832. *
  833. * As it's an optional value and can be disabled, we do so by setting
  834. * a 0 overlap value.
  835. */
  836. max9286_write(priv, 0x63, 0);
  837. max9286_write(priv, 0x64, 0);
  838. /*
  839. * Wait for 2ms to allow the link to resynchronize after the
  840. * configuration change.
  841. */
  842. usleep_range(2000, 5000);
  843. return 0;
  844. }
  845. static void max9286_gpio_set(struct gpio_chip *chip,
  846. unsigned int offset, int value)
  847. {
  848. struct max9286_priv *priv = gpiochip_get_data(chip);
  849. if (value)
  850. priv->gpio_state |= BIT(offset);
  851. else
  852. priv->gpio_state &= ~BIT(offset);
  853. max9286_write(priv, 0x0f, MAX9286_0X0F_RESERVED | priv->gpio_state);
  854. }
  855. static int max9286_gpio_get(struct gpio_chip *chip, unsigned int offset)
  856. {
  857. struct max9286_priv *priv = gpiochip_get_data(chip);
  858. return priv->gpio_state & BIT(offset);
  859. }
  860. static int max9286_register_gpio(struct max9286_priv *priv)
  861. {
  862. struct device *dev = &priv->client->dev;
  863. struct gpio_chip *gpio = &priv->gpio;
  864. int ret;
  865. /* Configure the GPIO */
  866. gpio->label = dev_name(dev);
  867. gpio->parent = dev;
  868. gpio->owner = THIS_MODULE;
  869. gpio->of_node = dev->of_node;
  870. gpio->ngpio = 2;
  871. gpio->base = -1;
  872. gpio->set = max9286_gpio_set;
  873. gpio->get = max9286_gpio_get;
  874. gpio->can_sleep = true;
  875. /* GPIO values default to high */
  876. priv->gpio_state = BIT(0) | BIT(1);
  877. ret = devm_gpiochip_add_data(dev, gpio, priv);
  878. if (ret)
  879. dev_err(dev, "Unable to create gpio_chip\n");
  880. return ret;
  881. }
  882. static int max9286_init(struct device *dev)
  883. {
  884. struct max9286_priv *priv;
  885. struct i2c_client *client;
  886. int ret;
  887. client = to_i2c_client(dev);
  888. priv = i2c_get_clientdata(client);
  889. /* Enable the bus power. */
  890. ret = regulator_enable(priv->regulator);
  891. if (ret < 0) {
  892. dev_err(&client->dev, "Unable to turn PoC on\n");
  893. return ret;
  894. }
  895. ret = max9286_setup(priv);
  896. if (ret) {
  897. dev_err(dev, "Unable to setup max9286\n");
  898. goto err_regulator;
  899. }
  900. /*
  901. * Register all V4L2 interactions for the MAX9286 and notifiers for
  902. * any subdevices connected.
  903. */
  904. ret = max9286_v4l2_register(priv);
  905. if (ret) {
  906. dev_err(dev, "Failed to register with V4L2\n");
  907. goto err_regulator;
  908. }
  909. ret = max9286_i2c_mux_init(priv);
  910. if (ret) {
  911. dev_err(dev, "Unable to initialize I2C multiplexer\n");
  912. goto err_v4l2_register;
  913. }
  914. /* Leave the mux channels disabled until they are selected. */
  915. max9286_i2c_mux_close(priv);
  916. return 0;
  917. err_v4l2_register:
  918. max9286_v4l2_unregister(priv);
  919. err_regulator:
  920. regulator_disable(priv->regulator);
  921. return ret;
  922. }
  923. static void max9286_cleanup_dt(struct max9286_priv *priv)
  924. {
  925. struct max9286_source *source;
  926. for_each_source(priv, source) {
  927. fwnode_handle_put(source->fwnode);
  928. source->fwnode = NULL;
  929. }
  930. }
  931. static int max9286_parse_dt(struct max9286_priv *priv)
  932. {
  933. struct device *dev = &priv->client->dev;
  934. struct device_node *i2c_mux;
  935. struct device_node *node = NULL;
  936. unsigned int i2c_mux_mask = 0;
  937. /* Balance the of_node_put() performed by of_find_node_by_name(). */
  938. of_node_get(dev->of_node);
  939. i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux");
  940. if (!i2c_mux) {
  941. dev_err(dev, "Failed to find i2c-mux node\n");
  942. return -EINVAL;
  943. }
  944. /* Identify which i2c-mux channels are enabled */
  945. for_each_child_of_node(i2c_mux, node) {
  946. u32 id = 0;
  947. of_property_read_u32(node, "reg", &id);
  948. if (id >= MAX9286_NUM_GMSL)
  949. continue;
  950. if (!of_device_is_available(node)) {
  951. dev_dbg(dev, "Skipping disabled I2C bus port %u\n", id);
  952. continue;
  953. }
  954. i2c_mux_mask |= BIT(id);
  955. }
  956. of_node_put(node);
  957. of_node_put(i2c_mux);
  958. /* Parse the endpoints */
  959. for_each_endpoint_of_node(dev->of_node, node) {
  960. struct max9286_source *source;
  961. struct of_endpoint ep;
  962. of_graph_parse_endpoint(node, &ep);
  963. dev_dbg(dev, "Endpoint %pOF on port %d",
  964. ep.local_node, ep.port);
  965. if (ep.port > MAX9286_NUM_GMSL) {
  966. dev_err(dev, "Invalid endpoint %s on port %d",
  967. of_node_full_name(ep.local_node), ep.port);
  968. continue;
  969. }
  970. /* For the source endpoint just parse the bus configuration. */
  971. if (ep.port == MAX9286_SRC_PAD) {
  972. struct v4l2_fwnode_endpoint vep = {
  973. .bus_type = V4L2_MBUS_CSI2_DPHY
  974. };
  975. int ret;
  976. ret = v4l2_fwnode_endpoint_parse(
  977. of_fwnode_handle(node), &vep);
  978. if (ret) {
  979. of_node_put(node);
  980. return ret;
  981. }
  982. priv->csi2_data_lanes =
  983. vep.bus.mipi_csi2.num_data_lanes;
  984. continue;
  985. }
  986. /* Skip if the corresponding GMSL link is unavailable. */
  987. if (!(i2c_mux_mask & BIT(ep.port)))
  988. continue;
  989. if (priv->sources[ep.port].fwnode) {
  990. dev_err(dev,
  991. "Multiple port endpoints are not supported: %d",
  992. ep.port);
  993. continue;
  994. }
  995. source = &priv->sources[ep.port];
  996. source->fwnode = fwnode_graph_get_remote_endpoint(
  997. of_fwnode_handle(node));
  998. if (!source->fwnode) {
  999. dev_err(dev,
  1000. "Endpoint %pOF has no remote endpoint connection\n",
  1001. ep.local_node);
  1002. continue;
  1003. }
  1004. priv->source_mask |= BIT(ep.port);
  1005. priv->nsources++;
  1006. }
  1007. of_node_put(node);
  1008. priv->route_mask = priv->source_mask;
  1009. return 0;
  1010. }
  1011. static int max9286_probe(struct i2c_client *client)
  1012. {
  1013. struct max9286_priv *priv;
  1014. int ret;
  1015. priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
  1016. if (!priv)
  1017. return -ENOMEM;
  1018. mutex_init(&priv->mutex);
  1019. priv->client = client;
  1020. i2c_set_clientdata(client, priv);
  1021. priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable",
  1022. GPIOD_OUT_HIGH);
  1023. if (IS_ERR(priv->gpiod_pwdn))
  1024. return PTR_ERR(priv->gpiod_pwdn);
  1025. gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn");
  1026. gpiod_set_value_cansleep(priv->gpiod_pwdn, 1);
  1027. /* Wait at least 4ms before the I2C lines latch to the address */
  1028. if (priv->gpiod_pwdn)
  1029. usleep_range(4000, 5000);
  1030. /*
  1031. * The MAX9286 starts by default with all ports enabled, we disable all
  1032. * ports early to ensure that all channels are disabled if we error out
  1033. * and keep the bus consistent.
  1034. */
  1035. max9286_i2c_mux_close(priv);
  1036. /*
  1037. * The MAX9286 initialises with auto-acknowledge enabled by default.
  1038. * This can be invasive to other transactions on the same bus, so
  1039. * disable it early. It will be enabled only as and when needed.
  1040. */
  1041. max9286_configure_i2c(priv, false);
  1042. ret = max9286_register_gpio(priv);
  1043. if (ret)
  1044. goto err_powerdown;
  1045. priv->regulator = devm_regulator_get(&client->dev, "poc");
  1046. if (IS_ERR(priv->regulator)) {
  1047. if (PTR_ERR(priv->regulator) != -EPROBE_DEFER)
  1048. dev_err(&client->dev,
  1049. "Unable to get PoC regulator (%ld)\n",
  1050. PTR_ERR(priv->regulator));
  1051. ret = PTR_ERR(priv->regulator);
  1052. goto err_powerdown;
  1053. }
  1054. ret = max9286_parse_dt(priv);
  1055. if (ret)
  1056. goto err_powerdown;
  1057. ret = max9286_init(&client->dev);
  1058. if (ret < 0)
  1059. goto err_cleanup_dt;
  1060. return 0;
  1061. err_cleanup_dt:
  1062. max9286_cleanup_dt(priv);
  1063. err_powerdown:
  1064. gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
  1065. return ret;
  1066. }
  1067. static int max9286_remove(struct i2c_client *client)
  1068. {
  1069. struct max9286_priv *priv = i2c_get_clientdata(client);
  1070. i2c_mux_del_adapters(priv->mux);
  1071. max9286_v4l2_unregister(priv);
  1072. regulator_disable(priv->regulator);
  1073. gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
  1074. max9286_cleanup_dt(priv);
  1075. return 0;
  1076. }
  1077. static const struct of_device_id max9286_dt_ids[] = {
  1078. { .compatible = "maxim,max9286" },
  1079. {},
  1080. };
  1081. MODULE_DEVICE_TABLE(of, max9286_dt_ids);
  1082. static struct i2c_driver max9286_i2c_driver = {
  1083. .driver = {
  1084. .name = "max9286",
  1085. .of_match_table = of_match_ptr(max9286_dt_ids),
  1086. },
  1087. .probe_new = max9286_probe,
  1088. .remove = max9286_remove,
  1089. };
  1090. module_i2c_driver(max9286_i2c_driver);
  1091. MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver");
  1092. MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov");
  1093. MODULE_LICENSE("GPL");