arm_mhu.c 3.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2013-2015 Fujitsu Semiconductor Ltd.
  4. * Copyright (C) 2015 Linaro Ltd.
  5. * Author: Jassi Brar <jaswinder.singh@linaro.org>
  6. */
  7. #include <linux/amba/bus.h>
  8. #include <linux/device.h>
  9. #include <linux/err.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/io.h>
  12. #include <linux/mailbox_controller.h>
  13. #include <linux/module.h>
  14. #define INTR_STAT_OFS 0x0
  15. #define INTR_SET_OFS 0x8
  16. #define INTR_CLR_OFS 0x10
  17. #define MHU_LP_OFFSET 0x0
  18. #define MHU_HP_OFFSET 0x20
  19. #define MHU_SEC_OFFSET 0x200
  20. #define TX_REG_OFFSET 0x100
  21. #define MHU_CHANS 3
  22. struct mhu_link {
  23. unsigned irq;
  24. void __iomem *tx_reg;
  25. void __iomem *rx_reg;
  26. };
  27. struct arm_mhu {
  28. void __iomem *base;
  29. struct mhu_link mlink[MHU_CHANS];
  30. struct mbox_chan chan[MHU_CHANS];
  31. struct mbox_controller mbox;
  32. };
  33. static irqreturn_t mhu_rx_interrupt(int irq, void *p)
  34. {
  35. struct mbox_chan *chan = p;
  36. struct mhu_link *mlink = chan->con_priv;
  37. u32 val;
  38. val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
  39. if (!val)
  40. return IRQ_NONE;
  41. mbox_chan_received_data(chan, (void *)&val);
  42. writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS);
  43. return IRQ_HANDLED;
  44. }
  45. static bool mhu_last_tx_done(struct mbox_chan *chan)
  46. {
  47. struct mhu_link *mlink = chan->con_priv;
  48. u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
  49. return (val == 0);
  50. }
  51. static int mhu_send_data(struct mbox_chan *chan, void *data)
  52. {
  53. struct mhu_link *mlink = chan->con_priv;
  54. u32 *arg = data;
  55. writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS);
  56. return 0;
  57. }
  58. static int mhu_startup(struct mbox_chan *chan)
  59. {
  60. struct mhu_link *mlink = chan->con_priv;
  61. u32 val;
  62. int ret;
  63. val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
  64. writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS);
  65. ret = request_irq(mlink->irq, mhu_rx_interrupt,
  66. IRQF_SHARED, "mhu_link", chan);
  67. if (ret) {
  68. dev_err(chan->mbox->dev,
  69. "Unable to acquire IRQ %d\n", mlink->irq);
  70. return ret;
  71. }
  72. return 0;
  73. }
  74. static void mhu_shutdown(struct mbox_chan *chan)
  75. {
  76. struct mhu_link *mlink = chan->con_priv;
  77. free_irq(mlink->irq, chan);
  78. }
  79. static const struct mbox_chan_ops mhu_ops = {
  80. .send_data = mhu_send_data,
  81. .startup = mhu_startup,
  82. .shutdown = mhu_shutdown,
  83. .last_tx_done = mhu_last_tx_done,
  84. };
  85. static int mhu_probe(struct amba_device *adev, const struct amba_id *id)
  86. {
  87. int i, err;
  88. struct arm_mhu *mhu;
  89. struct device *dev = &adev->dev;
  90. int mhu_reg[MHU_CHANS] = {MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET};
  91. if (!of_device_is_compatible(dev->of_node, "arm,mhu"))
  92. return -ENODEV;
  93. /* Allocate memory for device */
  94. mhu = devm_kzalloc(dev, sizeof(*mhu), GFP_KERNEL);
  95. if (!mhu)
  96. return -ENOMEM;
  97. mhu->base = devm_ioremap_resource(dev, &adev->res);
  98. if (IS_ERR(mhu->base)) {
  99. dev_err(dev, "ioremap failed\n");
  100. return PTR_ERR(mhu->base);
  101. }
  102. for (i = 0; i < MHU_CHANS; i++) {
  103. mhu->chan[i].con_priv = &mhu->mlink[i];
  104. mhu->mlink[i].irq = adev->irq[i];
  105. mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
  106. mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
  107. }
  108. mhu->mbox.dev = dev;
  109. mhu->mbox.chans = &mhu->chan[0];
  110. mhu->mbox.num_chans = MHU_CHANS;
  111. mhu->mbox.ops = &mhu_ops;
  112. mhu->mbox.txdone_irq = false;
  113. mhu->mbox.txdone_poll = true;
  114. mhu->mbox.txpoll_period = 1;
  115. amba_set_drvdata(adev, mhu);
  116. err = devm_mbox_controller_register(dev, &mhu->mbox);
  117. if (err) {
  118. dev_err(dev, "Failed to register mailboxes %d\n", err);
  119. return err;
  120. }
  121. dev_info(dev, "ARM MHU Mailbox registered\n");
  122. return 0;
  123. }
  124. static struct amba_id mhu_ids[] = {
  125. {
  126. .id = 0x1bb098,
  127. .mask = 0xffffff,
  128. },
  129. { 0, 0 },
  130. };
  131. MODULE_DEVICE_TABLE(amba, mhu_ids);
  132. static struct amba_driver arm_mhu_driver = {
  133. .drv = {
  134. .name = "mhu",
  135. },
  136. .id_table = mhu_ids,
  137. .probe = mhu_probe,
  138. };
  139. module_amba_driver(arm_mhu_driver);
  140. MODULE_LICENSE("GPL v2");
  141. MODULE_DESCRIPTION("ARM MHU Driver");
  142. MODULE_AUTHOR("Jassi Brar <jassisinghbrar@gmail.com>");