via-macii.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device driver for the via ADB on (many) Mac II-class machines
  4. *
  5. * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
  6. * Also derived from code Copyright (C) 1996 Paul Mackerras.
  7. *
  8. * With various updates provided over the years by Michael Schmitz,
  9. * Guideo Koerber and others.
  10. *
  11. * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
  12. *
  13. * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
  14. * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
  15. * - Big overhaul, should actually work now.
  16. * 2006-12-31 Finn Thain - Another overhaul.
  17. *
  18. * Suggested reading:
  19. * Inside Macintosh, ch. 5 ADB Manager
  20. * Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
  21. * Rockwell R6522 VIA datasheet
  22. *
  23. * Apple's "ADB Analyzer" bus sniffer is invaluable:
  24. * ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
  25. */
  26. #include <stdarg.h>
  27. #include <linux/types.h>
  28. #include <linux/errno.h>
  29. #include <linux/kernel.h>
  30. #include <linux/delay.h>
  31. #include <linux/adb.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/init.h>
  34. #include <asm/macintosh.h>
  35. #include <asm/macints.h>
  36. #include <asm/mac_via.h>
  37. static volatile unsigned char *via;
  38. /* VIA registers - spaced 0x200 bytes apart */
  39. #define RS 0x200 /* skip between registers */
  40. #define B 0 /* B-side data */
  41. #define A RS /* A-side data */
  42. #define DIRB (2*RS) /* B-side direction (1=output) */
  43. #define DIRA (3*RS) /* A-side direction (1=output) */
  44. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  45. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  46. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  47. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  48. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  49. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  50. #define SR (10*RS) /* Shift register */
  51. #define ACR (11*RS) /* Auxiliary control register */
  52. #define PCR (12*RS) /* Peripheral control register */
  53. #define IFR (13*RS) /* Interrupt flag register */
  54. #define IER (14*RS) /* Interrupt enable register */
  55. #define ANH (15*RS) /* A-side data, no handshake */
  56. /* Bits in B data register: all active low */
  57. #define CTLR_IRQ 0x08 /* Controller rcv status (input) */
  58. #define ST_MASK 0x30 /* mask for selecting ADB state bits */
  59. /* Bits in ACR */
  60. #define SR_CTRL 0x1c /* Shift register control bits */
  61. #define SR_EXT 0x0c /* Shift on external clock */
  62. #define SR_OUT 0x10 /* Shift out if 1 */
  63. /* Bits in IFR and IER */
  64. #define IER_SET 0x80 /* set bits in IER */
  65. #define IER_CLR 0 /* clear bits in IER */
  66. #define SR_INT 0x04 /* Shift register full/empty */
  67. /* ADB transaction states according to GMHW */
  68. #define ST_CMD 0x00 /* ADB state: command byte */
  69. #define ST_EVEN 0x10 /* ADB state: even data byte */
  70. #define ST_ODD 0x20 /* ADB state: odd data byte */
  71. #define ST_IDLE 0x30 /* ADB state: idle, nothing to send */
  72. /* ADB command byte structure */
  73. #define ADDR_MASK 0xF0
  74. #define CMD_MASK 0x0F
  75. #define OP_MASK 0x0C
  76. #define TALK 0x0C
  77. static int macii_init_via(void);
  78. static void macii_start(void);
  79. static irqreturn_t macii_interrupt(int irq, void *arg);
  80. static void macii_queue_poll(void);
  81. static int macii_probe(void);
  82. static int macii_init(void);
  83. static int macii_send_request(struct adb_request *req, int sync);
  84. static int macii_write(struct adb_request *req);
  85. static int macii_autopoll(int devs);
  86. static void macii_poll(void);
  87. static int macii_reset_bus(void);
  88. struct adb_driver via_macii_driver = {
  89. .name = "Mac II",
  90. .probe = macii_probe,
  91. .init = macii_init,
  92. .send_request = macii_send_request,
  93. .autopoll = macii_autopoll,
  94. .poll = macii_poll,
  95. .reset_bus = macii_reset_bus,
  96. };
  97. static enum macii_state {
  98. idle,
  99. sending,
  100. reading,
  101. } macii_state;
  102. static struct adb_request *current_req; /* first request struct in the queue */
  103. static struct adb_request *last_req; /* last request struct in the queue */
  104. static unsigned char reply_buf[16]; /* storage for autopolled replies */
  105. static unsigned char *reply_ptr; /* next byte in reply_buf or req->reply */
  106. static bool reading_reply; /* store reply in reply_buf else req->reply */
  107. static int data_index; /* index of the next byte to send from req->data */
  108. static int reply_len; /* number of bytes received in reply_buf or req->reply */
  109. static int status; /* VIA's ADB status bits captured upon interrupt */
  110. static bool bus_timeout; /* no data was sent by the device */
  111. static bool srq_asserted; /* have to poll for the device that asserted it */
  112. static u8 last_cmd; /* the most recent command byte transmitted */
  113. static u8 last_talk_cmd; /* the most recent Talk command byte transmitted */
  114. static u8 last_poll_cmd; /* the most recent Talk R0 command byte transmitted */
  115. static unsigned int autopoll_devs; /* bits set are device addresses to poll */
  116. /* Check for MacII style ADB */
  117. static int macii_probe(void)
  118. {
  119. if (macintosh_config->adb_type != MAC_ADB_II)
  120. return -ENODEV;
  121. via = via1;
  122. pr_info("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
  123. return 0;
  124. }
  125. /* Initialize the driver */
  126. static int macii_init(void)
  127. {
  128. unsigned long flags;
  129. int err;
  130. local_irq_save(flags);
  131. err = macii_init_via();
  132. if (err)
  133. goto out;
  134. err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB",
  135. macii_interrupt);
  136. if (err)
  137. goto out;
  138. macii_state = idle;
  139. out:
  140. local_irq_restore(flags);
  141. return err;
  142. }
  143. /* initialize the hardware */
  144. static int macii_init_via(void)
  145. {
  146. unsigned char x;
  147. /* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
  148. via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;
  149. /* Set up state: idle */
  150. via[B] |= ST_IDLE;
  151. /* Shift register on input */
  152. via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
  153. /* Wipe any pending data and int */
  154. x = via[SR];
  155. return 0;
  156. }
  157. /* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
  158. static void macii_queue_poll(void)
  159. {
  160. static struct adb_request req;
  161. unsigned char poll_command;
  162. unsigned int poll_addr;
  163. /* This only polls devices in the autopoll list, which assumes that
  164. * unprobed devices never assert SRQ. That could happen if a device was
  165. * plugged in after the adb bus scan. Unplugging it again will resolve
  166. * the problem. This behaviour is similar to MacOS.
  167. */
  168. if (!autopoll_devs)
  169. return;
  170. /* The device most recently polled may not be the best device to poll
  171. * right now. Some other device(s) may have signalled SRQ (the active
  172. * device won't do that). Or the autopoll list may have been changed.
  173. * Try polling the next higher address.
  174. */
  175. poll_addr = (last_poll_cmd & ADDR_MASK) >> 4;
  176. if ((srq_asserted && last_cmd == last_poll_cmd) ||
  177. !(autopoll_devs & (1 << poll_addr))) {
  178. unsigned int higher_devs;
  179. higher_devs = autopoll_devs & -(1 << (poll_addr + 1));
  180. poll_addr = ffs(higher_devs ? higher_devs : autopoll_devs) - 1;
  181. }
  182. /* Send a Talk Register 0 command */
  183. poll_command = ADB_READREG(poll_addr, 0);
  184. /* No need to repeat this Talk command. The transceiver will do that
  185. * as long as it is idle.
  186. */
  187. if (poll_command == last_cmd)
  188. return;
  189. adb_request(&req, NULL, ADBREQ_NOSEND, 1, poll_command);
  190. req.sent = 0;
  191. req.complete = 0;
  192. req.reply_len = 0;
  193. req.next = current_req;
  194. if (WARN_ON(current_req)) {
  195. current_req = &req;
  196. } else {
  197. current_req = &req;
  198. last_req = &req;
  199. }
  200. }
  201. /* Send an ADB request; if sync, poll out the reply 'till it's done */
  202. static int macii_send_request(struct adb_request *req, int sync)
  203. {
  204. int err;
  205. err = macii_write(req);
  206. if (err)
  207. return err;
  208. if (sync)
  209. while (!req->complete)
  210. macii_poll();
  211. return 0;
  212. }
  213. /* Send an ADB request (append to request queue) */
  214. static int macii_write(struct adb_request *req)
  215. {
  216. unsigned long flags;
  217. if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {
  218. req->complete = 1;
  219. return -EINVAL;
  220. }
  221. req->next = NULL;
  222. req->sent = 0;
  223. req->complete = 0;
  224. req->reply_len = 0;
  225. local_irq_save(flags);
  226. if (current_req != NULL) {
  227. last_req->next = req;
  228. last_req = req;
  229. } else {
  230. current_req = req;
  231. last_req = req;
  232. if (macii_state == idle)
  233. macii_start();
  234. }
  235. local_irq_restore(flags);
  236. return 0;
  237. }
  238. /* Start auto-polling */
  239. static int macii_autopoll(int devs)
  240. {
  241. unsigned long flags;
  242. local_irq_save(flags);
  243. /* bit 1 == device 1, and so on. */
  244. autopoll_devs = (unsigned int)devs & 0xFFFE;
  245. if (!current_req) {
  246. macii_queue_poll();
  247. if (current_req && macii_state == idle)
  248. macii_start();
  249. }
  250. local_irq_restore(flags);
  251. return 0;
  252. }
  253. /* Prod the chip without interrupts */
  254. static void macii_poll(void)
  255. {
  256. macii_interrupt(0, NULL);
  257. }
  258. /* Reset the bus */
  259. static int macii_reset_bus(void)
  260. {
  261. struct adb_request req;
  262. /* Command = 0, Address = ignored */
  263. adb_request(&req, NULL, ADBREQ_NOSEND, 1, ADB_BUSRESET);
  264. macii_send_request(&req, 1);
  265. /* Don't want any more requests during the Global Reset low time. */
  266. udelay(3000);
  267. return 0;
  268. }
  269. /* Start sending ADB packet */
  270. static void macii_start(void)
  271. {
  272. struct adb_request *req;
  273. req = current_req;
  274. /* Now send it. Be careful though, that first byte of the request
  275. * is actually ADB_PACKET; the real data begins at index 1!
  276. * And req->nbytes is the number of bytes of real data plus one.
  277. */
  278. /* Output mode */
  279. via[ACR] |= SR_OUT;
  280. /* Load data */
  281. via[SR] = req->data[1];
  282. /* set ADB state to 'command' */
  283. via[B] = (via[B] & ~ST_MASK) | ST_CMD;
  284. macii_state = sending;
  285. data_index = 2;
  286. bus_timeout = false;
  287. srq_asserted = false;
  288. }
  289. /*
  290. * The notorious ADB interrupt handler - does all of the protocol handling.
  291. * Relies on the ADB controller sending and receiving data, thereby
  292. * generating shift register interrupts (SR_INT) for us. This means there has
  293. * to be activity on the ADB bus. The chip will poll to achieve this.
  294. *
  295. * The VIA Port B output signalling works as follows. After the ADB transceiver
  296. * sees a transition on the PB4 and PB5 lines it will crank over the VIA shift
  297. * register which eventually raises the SR_INT interrupt. The PB4/PB5 outputs
  298. * are toggled with each byte as the ADB transaction progresses.
  299. *
  300. * Request with no reply expected (and empty transceiver buffer):
  301. * CMD -> IDLE
  302. * Request with expected reply packet (or with buffered autopoll packet):
  303. * CMD -> EVEN -> ODD -> EVEN -> ... -> IDLE
  304. * Unsolicited packet:
  305. * IDLE -> EVEN -> ODD -> EVEN -> ... -> IDLE
  306. */
  307. static irqreturn_t macii_interrupt(int irq, void *arg)
  308. {
  309. int x;
  310. struct adb_request *req;
  311. unsigned long flags;
  312. local_irq_save(flags);
  313. if (!arg) {
  314. /* Clear the SR IRQ flag when polling. */
  315. if (via[IFR] & SR_INT)
  316. via[IFR] = SR_INT;
  317. else {
  318. local_irq_restore(flags);
  319. return IRQ_NONE;
  320. }
  321. }
  322. status = via[B] & (ST_MASK | CTLR_IRQ);
  323. switch (macii_state) {
  324. case idle:
  325. WARN_ON((status & ST_MASK) != ST_IDLE);
  326. reply_ptr = reply_buf;
  327. reading_reply = false;
  328. bus_timeout = false;
  329. srq_asserted = false;
  330. x = via[SR];
  331. if (!(status & CTLR_IRQ)) {
  332. /* /CTLR_IRQ asserted in idle state means we must
  333. * read an autopoll reply from the transceiver buffer.
  334. */
  335. macii_state = reading;
  336. *reply_ptr = x;
  337. reply_len = 1;
  338. } else {
  339. /* bus timeout */
  340. reply_len = 0;
  341. break;
  342. }
  343. /* set ADB state = even for first data byte */
  344. via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
  345. break;
  346. case sending:
  347. req = current_req;
  348. if (status == (ST_CMD | CTLR_IRQ)) {
  349. /* /CTLR_IRQ de-asserted after the command byte means
  350. * the host can continue with the transaction.
  351. */
  352. /* Store command byte */
  353. last_cmd = req->data[1];
  354. if ((last_cmd & OP_MASK) == TALK) {
  355. last_talk_cmd = last_cmd;
  356. if ((last_cmd & CMD_MASK) == ADB_READREG(0, 0))
  357. last_poll_cmd = last_cmd;
  358. }
  359. }
  360. if (status == ST_CMD) {
  361. /* /CTLR_IRQ asserted after the command byte means we
  362. * must read an autopoll reply. The first byte was
  363. * lost because the shift register was an output.
  364. */
  365. macii_state = reading;
  366. reading_reply = false;
  367. reply_ptr = reply_buf;
  368. *reply_ptr = last_talk_cmd;
  369. reply_len = 1;
  370. /* reset to shift in */
  371. via[ACR] &= ~SR_OUT;
  372. x = via[SR];
  373. } else if (data_index >= req->nbytes) {
  374. req->sent = 1;
  375. if (req->reply_expected) {
  376. macii_state = reading;
  377. reading_reply = true;
  378. reply_ptr = req->reply;
  379. *reply_ptr = req->data[1];
  380. reply_len = 1;
  381. via[ACR] &= ~SR_OUT;
  382. x = via[SR];
  383. } else if ((req->data[1] & OP_MASK) == TALK) {
  384. macii_state = reading;
  385. reading_reply = false;
  386. reply_ptr = reply_buf;
  387. *reply_ptr = req->data[1];
  388. reply_len = 1;
  389. via[ACR] &= ~SR_OUT;
  390. x = via[SR];
  391. req->complete = 1;
  392. current_req = req->next;
  393. if (req->done)
  394. (*req->done)(req);
  395. } else {
  396. macii_state = idle;
  397. req->complete = 1;
  398. current_req = req->next;
  399. if (req->done)
  400. (*req->done)(req);
  401. break;
  402. }
  403. } else {
  404. via[SR] = req->data[data_index++];
  405. }
  406. if ((via[B] & ST_MASK) == ST_CMD) {
  407. /* just sent the command byte, set to EVEN */
  408. via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
  409. } else {
  410. /* invert state bits, toggle ODD/EVEN */
  411. via[B] ^= ST_MASK;
  412. }
  413. break;
  414. case reading:
  415. x = via[SR];
  416. WARN_ON((status & ST_MASK) == ST_CMD ||
  417. (status & ST_MASK) == ST_IDLE);
  418. if (!(status & CTLR_IRQ)) {
  419. if (status == ST_EVEN && reply_len == 1) {
  420. bus_timeout = true;
  421. } else if (status == ST_ODD && reply_len == 2) {
  422. srq_asserted = true;
  423. } else {
  424. macii_state = idle;
  425. if (bus_timeout)
  426. reply_len = 0;
  427. if (reading_reply) {
  428. struct adb_request *req = current_req;
  429. req->reply_len = reply_len;
  430. req->complete = 1;
  431. current_req = req->next;
  432. if (req->done)
  433. (*req->done)(req);
  434. } else if (reply_len && autopoll_devs &&
  435. reply_buf[0] == last_poll_cmd) {
  436. adb_input(reply_buf, reply_len, 1);
  437. }
  438. break;
  439. }
  440. }
  441. if (reply_len < ARRAY_SIZE(reply_buf)) {
  442. reply_ptr++;
  443. *reply_ptr = x;
  444. reply_len++;
  445. }
  446. /* invert state bits, toggle ODD/EVEN */
  447. via[B] ^= ST_MASK;
  448. break;
  449. default:
  450. break;
  451. }
  452. if (macii_state == idle) {
  453. if (!current_req)
  454. macii_queue_poll();
  455. if (current_req)
  456. macii_start();
  457. if (macii_state == idle) {
  458. via[ACR] &= ~SR_OUT;
  459. x = via[SR];
  460. via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
  461. }
  462. }
  463. local_irq_restore(flags);
  464. return IRQ_HANDLED;
  465. }