irq-mtk-sysirq.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2014 MediaTek Inc.
  4. * Author: Joe.C <yingjoe.chen@mediatek.com>
  5. */
  6. #include <linux/irq.h>
  7. #include <linux/irqchip.h>
  8. #include <linux/irqdomain.h>
  9. #include <linux/of.h>
  10. #include <linux/of_irq.h>
  11. #include <linux/of_address.h>
  12. #include <linux/io.h>
  13. #include <linux/slab.h>
  14. #include <linux/spinlock.h>
  15. struct mtk_sysirq_chip_data {
  16. raw_spinlock_t lock;
  17. u32 nr_intpol_bases;
  18. void __iomem **intpol_bases;
  19. u32 *intpol_words;
  20. u8 *intpol_idx;
  21. u16 *which_word;
  22. };
  23. static int mtk_sysirq_set_type(struct irq_data *data, unsigned int type)
  24. {
  25. irq_hw_number_t hwirq = data->hwirq;
  26. struct mtk_sysirq_chip_data *chip_data = data->chip_data;
  27. u8 intpol_idx = chip_data->intpol_idx[hwirq];
  28. void __iomem *base;
  29. u32 offset, reg_index, value;
  30. unsigned long flags;
  31. int ret;
  32. base = chip_data->intpol_bases[intpol_idx];
  33. reg_index = chip_data->which_word[hwirq];
  34. offset = hwirq & 0x1f;
  35. raw_spin_lock_irqsave(&chip_data->lock, flags);
  36. value = readl_relaxed(base + reg_index * 4);
  37. if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) {
  38. if (type == IRQ_TYPE_LEVEL_LOW)
  39. type = IRQ_TYPE_LEVEL_HIGH;
  40. else
  41. type = IRQ_TYPE_EDGE_RISING;
  42. value |= (1 << offset);
  43. } else {
  44. value &= ~(1 << offset);
  45. }
  46. writel_relaxed(value, base + reg_index * 4);
  47. data = data->parent_data;
  48. ret = data->chip->irq_set_type(data, type);
  49. raw_spin_unlock_irqrestore(&chip_data->lock, flags);
  50. return ret;
  51. }
  52. static struct irq_chip mtk_sysirq_chip = {
  53. .name = "MT_SYSIRQ",
  54. .irq_mask = irq_chip_mask_parent,
  55. .irq_unmask = irq_chip_unmask_parent,
  56. .irq_eoi = irq_chip_eoi_parent,
  57. .irq_set_type = mtk_sysirq_set_type,
  58. .irq_retrigger = irq_chip_retrigger_hierarchy,
  59. .irq_set_affinity = irq_chip_set_affinity_parent,
  60. };
  61. static int mtk_sysirq_domain_translate(struct irq_domain *d,
  62. struct irq_fwspec *fwspec,
  63. unsigned long *hwirq,
  64. unsigned int *type)
  65. {
  66. if (is_of_node(fwspec->fwnode)) {
  67. if (fwspec->param_count != 3)
  68. return -EINVAL;
  69. /* No PPI should point to this domain */
  70. if (fwspec->param[0] != 0)
  71. return -EINVAL;
  72. *hwirq = fwspec->param[1];
  73. *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
  74. return 0;
  75. }
  76. return -EINVAL;
  77. }
  78. static int mtk_sysirq_domain_alloc(struct irq_domain *domain, unsigned int virq,
  79. unsigned int nr_irqs, void *arg)
  80. {
  81. int i;
  82. irq_hw_number_t hwirq;
  83. struct irq_fwspec *fwspec = arg;
  84. struct irq_fwspec gic_fwspec = *fwspec;
  85. if (fwspec->param_count != 3)
  86. return -EINVAL;
  87. /* sysirq doesn't support PPI */
  88. if (fwspec->param[0])
  89. return -EINVAL;
  90. hwirq = fwspec->param[1];
  91. for (i = 0; i < nr_irqs; i++)
  92. irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
  93. &mtk_sysirq_chip,
  94. domain->host_data);
  95. gic_fwspec.fwnode = domain->parent->fwnode;
  96. return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_fwspec);
  97. }
  98. static const struct irq_domain_ops sysirq_domain_ops = {
  99. .translate = mtk_sysirq_domain_translate,
  100. .alloc = mtk_sysirq_domain_alloc,
  101. .free = irq_domain_free_irqs_common,
  102. };
  103. static int __init mtk_sysirq_of_init(struct device_node *node,
  104. struct device_node *parent)
  105. {
  106. struct irq_domain *domain, *domain_parent;
  107. struct mtk_sysirq_chip_data *chip_data;
  108. int ret, size, intpol_num = 0, nr_intpol_bases = 0, i = 0;
  109. domain_parent = irq_find_host(parent);
  110. if (!domain_parent) {
  111. pr_err("mtk_sysirq: interrupt-parent not found\n");
  112. return -EINVAL;
  113. }
  114. chip_data = kzalloc(sizeof(*chip_data), GFP_KERNEL);
  115. if (!chip_data)
  116. return -ENOMEM;
  117. while (of_get_address(node, i++, NULL, NULL))
  118. nr_intpol_bases++;
  119. if (nr_intpol_bases == 0) {
  120. pr_err("mtk_sysirq: base address not specified\n");
  121. ret = -EINVAL;
  122. goto out_free_chip;
  123. }
  124. chip_data->intpol_words = kcalloc(nr_intpol_bases,
  125. sizeof(*chip_data->intpol_words),
  126. GFP_KERNEL);
  127. if (!chip_data->intpol_words) {
  128. ret = -ENOMEM;
  129. goto out_free_chip;
  130. }
  131. chip_data->intpol_bases = kcalloc(nr_intpol_bases,
  132. sizeof(*chip_data->intpol_bases),
  133. GFP_KERNEL);
  134. if (!chip_data->intpol_bases) {
  135. ret = -ENOMEM;
  136. goto out_free_intpol_words;
  137. }
  138. for (i = 0; i < nr_intpol_bases; i++) {
  139. struct resource res;
  140. ret = of_address_to_resource(node, i, &res);
  141. size = resource_size(&res);
  142. intpol_num += size * 8;
  143. chip_data->intpol_words[i] = size / 4;
  144. chip_data->intpol_bases[i] = of_iomap(node, i);
  145. if (ret || !chip_data->intpol_bases[i]) {
  146. pr_err("%pOF: couldn't map region %d\n", node, i);
  147. ret = -ENODEV;
  148. goto out_free_intpol;
  149. }
  150. }
  151. chip_data->intpol_idx = kcalloc(intpol_num,
  152. sizeof(*chip_data->intpol_idx),
  153. GFP_KERNEL);
  154. if (!chip_data->intpol_idx) {
  155. ret = -ENOMEM;
  156. goto out_free_intpol;
  157. }
  158. chip_data->which_word = kcalloc(intpol_num,
  159. sizeof(*chip_data->which_word),
  160. GFP_KERNEL);
  161. if (!chip_data->which_word) {
  162. ret = -ENOMEM;
  163. goto out_free_intpol_idx;
  164. }
  165. /*
  166. * assign an index of the intpol_bases for each irq
  167. * to set it fast later
  168. */
  169. for (i = 0; i < intpol_num ; i++) {
  170. u32 word = i / 32, j;
  171. for (j = 0; word >= chip_data->intpol_words[j] ; j++)
  172. word -= chip_data->intpol_words[j];
  173. chip_data->intpol_idx[i] = j;
  174. chip_data->which_word[i] = word;
  175. }
  176. domain = irq_domain_add_hierarchy(domain_parent, 0, intpol_num, node,
  177. &sysirq_domain_ops, chip_data);
  178. if (!domain) {
  179. ret = -ENOMEM;
  180. goto out_free_which_word;
  181. }
  182. raw_spin_lock_init(&chip_data->lock);
  183. return 0;
  184. out_free_which_word:
  185. kfree(chip_data->which_word);
  186. out_free_intpol_idx:
  187. kfree(chip_data->intpol_idx);
  188. out_free_intpol:
  189. for (i = 0; i < nr_intpol_bases; i++)
  190. if (chip_data->intpol_bases[i])
  191. iounmap(chip_data->intpol_bases[i]);
  192. kfree(chip_data->intpol_bases);
  193. out_free_intpol_words:
  194. kfree(chip_data->intpol_words);
  195. out_free_chip:
  196. kfree(chip_data);
  197. return ret;
  198. }
  199. IRQCHIP_DECLARE(mtk_sysirq, "mediatek,mt6577-sysirq", mtk_sysirq_of_init);