irq-ls-extirq.c 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #define pr_fmt(fmt) "irq-ls-extirq: " fmt
  3. #include <linux/irq.h>
  4. #include <linux/irqchip.h>
  5. #include <linux/irqdomain.h>
  6. #include <linux/of.h>
  7. #include <linux/mfd/syscon.h>
  8. #include <linux/regmap.h>
  9. #include <linux/slab.h>
  10. #include <dt-bindings/interrupt-controller/arm-gic.h>
  11. #define MAXIRQ 12
  12. #define LS1021A_SCFGREVCR 0x200
  13. struct ls_extirq_data {
  14. struct regmap *syscon;
  15. u32 intpcr;
  16. bool bit_reverse;
  17. u32 nirq;
  18. struct irq_fwspec map[MAXIRQ];
  19. };
  20. static int
  21. ls_extirq_set_type(struct irq_data *data, unsigned int type)
  22. {
  23. struct ls_extirq_data *priv = data->chip_data;
  24. irq_hw_number_t hwirq = data->hwirq;
  25. u32 value, mask;
  26. if (priv->bit_reverse)
  27. mask = 1U << (31 - hwirq);
  28. else
  29. mask = 1U << hwirq;
  30. switch (type) {
  31. case IRQ_TYPE_LEVEL_LOW:
  32. type = IRQ_TYPE_LEVEL_HIGH;
  33. value = mask;
  34. break;
  35. case IRQ_TYPE_EDGE_FALLING:
  36. type = IRQ_TYPE_EDGE_RISING;
  37. value = mask;
  38. break;
  39. case IRQ_TYPE_LEVEL_HIGH:
  40. case IRQ_TYPE_EDGE_RISING:
  41. value = 0;
  42. break;
  43. default:
  44. return -EINVAL;
  45. }
  46. regmap_update_bits(priv->syscon, priv->intpcr, mask, value);
  47. return irq_chip_set_type_parent(data, type);
  48. }
  49. static struct irq_chip ls_extirq_chip = {
  50. .name = "ls-extirq",
  51. .irq_mask = irq_chip_mask_parent,
  52. .irq_unmask = irq_chip_unmask_parent,
  53. .irq_eoi = irq_chip_eoi_parent,
  54. .irq_set_type = ls_extirq_set_type,
  55. .irq_retrigger = irq_chip_retrigger_hierarchy,
  56. .irq_set_affinity = irq_chip_set_affinity_parent,
  57. .flags = IRQCHIP_SET_TYPE_MASKED,
  58. };
  59. static int
  60. ls_extirq_domain_alloc(struct irq_domain *domain, unsigned int virq,
  61. unsigned int nr_irqs, void *arg)
  62. {
  63. struct ls_extirq_data *priv = domain->host_data;
  64. struct irq_fwspec *fwspec = arg;
  65. irq_hw_number_t hwirq;
  66. if (fwspec->param_count != 2)
  67. return -EINVAL;
  68. hwirq = fwspec->param[0];
  69. if (hwirq >= priv->nirq)
  70. return -EINVAL;
  71. irq_domain_set_hwirq_and_chip(domain, virq, hwirq, &ls_extirq_chip,
  72. priv);
  73. return irq_domain_alloc_irqs_parent(domain, virq, 1, &priv->map[hwirq]);
  74. }
  75. static const struct irq_domain_ops extirq_domain_ops = {
  76. .xlate = irq_domain_xlate_twocell,
  77. .alloc = ls_extirq_domain_alloc,
  78. .free = irq_domain_free_irqs_common,
  79. };
  80. static int
  81. ls_extirq_parse_map(struct ls_extirq_data *priv, struct device_node *node)
  82. {
  83. const __be32 *map;
  84. u32 mapsize;
  85. int ret;
  86. map = of_get_property(node, "interrupt-map", &mapsize);
  87. if (!map)
  88. return -ENOENT;
  89. if (mapsize % sizeof(*map))
  90. return -EINVAL;
  91. mapsize /= sizeof(*map);
  92. while (mapsize) {
  93. struct device_node *ipar;
  94. u32 hwirq, intsize, j;
  95. if (mapsize < 3)
  96. return -EINVAL;
  97. hwirq = be32_to_cpup(map);
  98. if (hwirq >= MAXIRQ)
  99. return -EINVAL;
  100. priv->nirq = max(priv->nirq, hwirq + 1);
  101. ipar = of_find_node_by_phandle(be32_to_cpup(map + 2));
  102. map += 3;
  103. mapsize -= 3;
  104. if (!ipar)
  105. return -EINVAL;
  106. priv->map[hwirq].fwnode = &ipar->fwnode;
  107. ret = of_property_read_u32(ipar, "#interrupt-cells", &intsize);
  108. if (ret)
  109. return ret;
  110. if (intsize > mapsize)
  111. return -EINVAL;
  112. priv->map[hwirq].param_count = intsize;
  113. for (j = 0; j < intsize; ++j)
  114. priv->map[hwirq].param[j] = be32_to_cpup(map++);
  115. mapsize -= intsize;
  116. }
  117. return 0;
  118. }
  119. static int __init
  120. ls_extirq_of_init(struct device_node *node, struct device_node *parent)
  121. {
  122. struct irq_domain *domain, *parent_domain;
  123. struct ls_extirq_data *priv;
  124. int ret;
  125. parent_domain = irq_find_host(parent);
  126. if (!parent_domain) {
  127. pr_err("Cannot find parent domain\n");
  128. return -ENODEV;
  129. }
  130. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  131. if (!priv)
  132. return -ENOMEM;
  133. priv->syscon = syscon_node_to_regmap(node->parent);
  134. if (IS_ERR(priv->syscon)) {
  135. ret = PTR_ERR(priv->syscon);
  136. pr_err("Failed to lookup parent regmap\n");
  137. goto out;
  138. }
  139. ret = of_property_read_u32(node, "reg", &priv->intpcr);
  140. if (ret) {
  141. pr_err("Missing INTPCR offset value\n");
  142. goto out;
  143. }
  144. ret = ls_extirq_parse_map(priv, node);
  145. if (ret)
  146. goto out;
  147. if (of_device_is_compatible(node, "fsl,ls1021a-extirq")) {
  148. u32 revcr;
  149. ret = regmap_read(priv->syscon, LS1021A_SCFGREVCR, &revcr);
  150. if (ret)
  151. goto out;
  152. priv->bit_reverse = (revcr != 0);
  153. }
  154. domain = irq_domain_add_hierarchy(parent_domain, 0, priv->nirq, node,
  155. &extirq_domain_ops, priv);
  156. if (!domain)
  157. ret = -ENOMEM;
  158. out:
  159. if (ret)
  160. kfree(priv);
  161. return ret;
  162. }
  163. IRQCHIP_DECLARE(ls1021a_extirq, "fsl,ls1021a-extirq", ls_extirq_of_init);