irq-keystone.c 6.0 KB

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  1. /*
  2. * Texas Instruments Keystone IRQ controller IP driver
  3. *
  4. * Copyright (C) 2014 Texas Instruments, Inc.
  5. * Author: Sajesh Kumar Saran <sajesh@ti.com>
  6. * Grygorii Strashko <grygorii.strashko@ti.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation version 2.
  11. *
  12. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  13. * kind, whether express or implied; without even the implied warranty
  14. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/irq.h>
  18. #include <linux/bitops.h>
  19. #include <linux/module.h>
  20. #include <linux/moduleparam.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/irqdomain.h>
  23. #include <linux/irqchip.h>
  24. #include <linux/of.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/mfd/syscon.h>
  27. #include <linux/regmap.h>
  28. /* The source ID bits start from 4 to 31 (total 28 bits)*/
  29. #define BIT_OFS 4
  30. #define KEYSTONE_N_IRQ (32 - BIT_OFS)
  31. struct keystone_irq_device {
  32. struct device *dev;
  33. struct irq_chip chip;
  34. u32 mask;
  35. int irq;
  36. struct irq_domain *irqd;
  37. struct regmap *devctrl_regs;
  38. u32 devctrl_offset;
  39. raw_spinlock_t wa_lock;
  40. };
  41. static inline u32 keystone_irq_readl(struct keystone_irq_device *kirq)
  42. {
  43. int ret;
  44. u32 val = 0;
  45. ret = regmap_read(kirq->devctrl_regs, kirq->devctrl_offset, &val);
  46. if (ret < 0)
  47. dev_dbg(kirq->dev, "irq read failed ret(%d)\n", ret);
  48. return val;
  49. }
  50. static inline void
  51. keystone_irq_writel(struct keystone_irq_device *kirq, u32 value)
  52. {
  53. int ret;
  54. ret = regmap_write(kirq->devctrl_regs, kirq->devctrl_offset, value);
  55. if (ret < 0)
  56. dev_dbg(kirq->dev, "irq write failed ret(%d)\n", ret);
  57. }
  58. static void keystone_irq_setmask(struct irq_data *d)
  59. {
  60. struct keystone_irq_device *kirq = irq_data_get_irq_chip_data(d);
  61. kirq->mask |= BIT(d->hwirq);
  62. dev_dbg(kirq->dev, "mask %lu [%x]\n", d->hwirq, kirq->mask);
  63. }
  64. static void keystone_irq_unmask(struct irq_data *d)
  65. {
  66. struct keystone_irq_device *kirq = irq_data_get_irq_chip_data(d);
  67. kirq->mask &= ~BIT(d->hwirq);
  68. dev_dbg(kirq->dev, "unmask %lu [%x]\n", d->hwirq, kirq->mask);
  69. }
  70. static void keystone_irq_ack(struct irq_data *d)
  71. {
  72. /* nothing to do here */
  73. }
  74. static irqreturn_t keystone_irq_handler(int irq, void *keystone_irq)
  75. {
  76. struct keystone_irq_device *kirq = keystone_irq;
  77. unsigned long wa_lock_flags;
  78. unsigned long pending;
  79. int src, virq;
  80. dev_dbg(kirq->dev, "start irq %d\n", irq);
  81. pending = keystone_irq_readl(kirq);
  82. keystone_irq_writel(kirq, pending);
  83. dev_dbg(kirq->dev, "pending 0x%lx, mask 0x%x\n", pending, kirq->mask);
  84. pending = (pending >> BIT_OFS) & ~kirq->mask;
  85. dev_dbg(kirq->dev, "pending after mask 0x%lx\n", pending);
  86. for (src = 0; src < KEYSTONE_N_IRQ; src++) {
  87. if (BIT(src) & pending) {
  88. virq = irq_find_mapping(kirq->irqd, src);
  89. dev_dbg(kirq->dev, "dispatch bit %d, virq %d\n",
  90. src, virq);
  91. if (!virq)
  92. dev_warn(kirq->dev, "spurious irq detected hwirq %d, virq %d\n",
  93. src, virq);
  94. raw_spin_lock_irqsave(&kirq->wa_lock, wa_lock_flags);
  95. generic_handle_irq(virq);
  96. raw_spin_unlock_irqrestore(&kirq->wa_lock,
  97. wa_lock_flags);
  98. }
  99. }
  100. dev_dbg(kirq->dev, "end irq %d\n", irq);
  101. return IRQ_HANDLED;
  102. }
  103. static int keystone_irq_map(struct irq_domain *h, unsigned int virq,
  104. irq_hw_number_t hw)
  105. {
  106. struct keystone_irq_device *kirq = h->host_data;
  107. irq_set_chip_data(virq, kirq);
  108. irq_set_chip_and_handler(virq, &kirq->chip, handle_level_irq);
  109. irq_set_probe(virq);
  110. return 0;
  111. }
  112. static const struct irq_domain_ops keystone_irq_ops = {
  113. .map = keystone_irq_map,
  114. .xlate = irq_domain_xlate_onecell,
  115. };
  116. static int keystone_irq_probe(struct platform_device *pdev)
  117. {
  118. struct device *dev = &pdev->dev;
  119. struct device_node *np = dev->of_node;
  120. struct keystone_irq_device *kirq;
  121. int ret;
  122. if (np == NULL)
  123. return -EINVAL;
  124. kirq = devm_kzalloc(dev, sizeof(*kirq), GFP_KERNEL);
  125. if (!kirq)
  126. return -ENOMEM;
  127. kirq->devctrl_regs =
  128. syscon_regmap_lookup_by_phandle(np, "ti,syscon-dev");
  129. if (IS_ERR(kirq->devctrl_regs))
  130. return PTR_ERR(kirq->devctrl_regs);
  131. ret = of_property_read_u32_index(np, "ti,syscon-dev", 1,
  132. &kirq->devctrl_offset);
  133. if (ret) {
  134. dev_err(dev, "couldn't read the devctrl_offset offset!\n");
  135. return ret;
  136. }
  137. kirq->irq = platform_get_irq(pdev, 0);
  138. if (kirq->irq < 0)
  139. return kirq->irq;
  140. kirq->dev = dev;
  141. kirq->mask = ~0x0;
  142. kirq->chip.name = "keystone-irq";
  143. kirq->chip.irq_ack = keystone_irq_ack;
  144. kirq->chip.irq_mask = keystone_irq_setmask;
  145. kirq->chip.irq_unmask = keystone_irq_unmask;
  146. kirq->irqd = irq_domain_add_linear(np, KEYSTONE_N_IRQ,
  147. &keystone_irq_ops, kirq);
  148. if (!kirq->irqd) {
  149. dev_err(dev, "IRQ domain registration failed\n");
  150. return -ENODEV;
  151. }
  152. raw_spin_lock_init(&kirq->wa_lock);
  153. platform_set_drvdata(pdev, kirq);
  154. ret = request_irq(kirq->irq, keystone_irq_handler,
  155. 0, dev_name(dev), kirq);
  156. if (ret) {
  157. irq_domain_remove(kirq->irqd);
  158. return ret;
  159. }
  160. /* clear all source bits */
  161. keystone_irq_writel(kirq, ~0x0);
  162. dev_info(dev, "irqchip registered, nr_irqs %u\n", KEYSTONE_N_IRQ);
  163. return 0;
  164. }
  165. static int keystone_irq_remove(struct platform_device *pdev)
  166. {
  167. struct keystone_irq_device *kirq = platform_get_drvdata(pdev);
  168. int hwirq;
  169. free_irq(kirq->irq, kirq);
  170. for (hwirq = 0; hwirq < KEYSTONE_N_IRQ; hwirq++)
  171. irq_dispose_mapping(irq_find_mapping(kirq->irqd, hwirq));
  172. irq_domain_remove(kirq->irqd);
  173. return 0;
  174. }
  175. static const struct of_device_id keystone_irq_dt_ids[] = {
  176. { .compatible = "ti,keystone-irq", },
  177. {},
  178. };
  179. MODULE_DEVICE_TABLE(of, keystone_irq_dt_ids);
  180. static struct platform_driver keystone_irq_device_driver = {
  181. .probe = keystone_irq_probe,
  182. .remove = keystone_irq_remove,
  183. .driver = {
  184. .name = "keystone_irq",
  185. .of_match_table = of_match_ptr(keystone_irq_dt_ids),
  186. }
  187. };
  188. module_platform_driver(keystone_irq_device_driver);
  189. MODULE_AUTHOR("Texas Instruments");
  190. MODULE_AUTHOR("Sajesh Kumar Saran");
  191. MODULE_AUTHOR("Grygorii Strashko");
  192. MODULE_DESCRIPTION("Keystone IRQ chip");
  193. MODULE_LICENSE("GPL v2");