irq-aspeed-i2c-ic.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Aspeed 24XX/25XX I2C Interrupt Controller.
  4. *
  5. * Copyright (C) 2012-2017 ASPEED Technology Inc.
  6. * Copyright 2017 IBM Corporation
  7. * Copyright 2017 Google, Inc.
  8. */
  9. #include <linux/irq.h>
  10. #include <linux/irqchip.h>
  11. #include <linux/irqchip/chained_irq.h>
  12. #include <linux/irqdomain.h>
  13. #include <linux/of_address.h>
  14. #include <linux/of_irq.h>
  15. #include <linux/io.h>
  16. #define ASPEED_I2C_IC_NUM_BUS 14
  17. struct aspeed_i2c_ic {
  18. void __iomem *base;
  19. int parent_irq;
  20. struct irq_domain *irq_domain;
  21. };
  22. /*
  23. * The aspeed chip provides a single hardware interrupt for all of the I2C
  24. * busses, so we use a dummy interrupt chip to translate this single interrupt
  25. * into multiple interrupts, each associated with a single I2C bus.
  26. */
  27. static void aspeed_i2c_ic_irq_handler(struct irq_desc *desc)
  28. {
  29. struct aspeed_i2c_ic *i2c_ic = irq_desc_get_handler_data(desc);
  30. struct irq_chip *chip = irq_desc_get_chip(desc);
  31. unsigned long bit, status;
  32. unsigned int bus_irq;
  33. chained_irq_enter(chip, desc);
  34. status = readl(i2c_ic->base);
  35. for_each_set_bit(bit, &status, ASPEED_I2C_IC_NUM_BUS) {
  36. bus_irq = irq_find_mapping(i2c_ic->irq_domain, bit);
  37. generic_handle_irq(bus_irq);
  38. }
  39. chained_irq_exit(chip, desc);
  40. }
  41. /*
  42. * Set simple handler and mark IRQ as valid. Nothing interesting to do here
  43. * since we are using a dummy interrupt chip.
  44. */
  45. static int aspeed_i2c_ic_map_irq_domain(struct irq_domain *domain,
  46. unsigned int irq, irq_hw_number_t hwirq)
  47. {
  48. irq_set_chip_and_handler(irq, &dummy_irq_chip, handle_simple_irq);
  49. irq_set_chip_data(irq, domain->host_data);
  50. return 0;
  51. }
  52. static const struct irq_domain_ops aspeed_i2c_ic_irq_domain_ops = {
  53. .map = aspeed_i2c_ic_map_irq_domain,
  54. };
  55. static int __init aspeed_i2c_ic_of_init(struct device_node *node,
  56. struct device_node *parent)
  57. {
  58. struct aspeed_i2c_ic *i2c_ic;
  59. int ret = 0;
  60. i2c_ic = kzalloc(sizeof(*i2c_ic), GFP_KERNEL);
  61. if (!i2c_ic)
  62. return -ENOMEM;
  63. i2c_ic->base = of_iomap(node, 0);
  64. if (!i2c_ic->base) {
  65. ret = -ENOMEM;
  66. goto err_free_ic;
  67. }
  68. i2c_ic->parent_irq = irq_of_parse_and_map(node, 0);
  69. if (i2c_ic->parent_irq < 0) {
  70. ret = i2c_ic->parent_irq;
  71. goto err_iounmap;
  72. }
  73. i2c_ic->irq_domain = irq_domain_add_linear(node, ASPEED_I2C_IC_NUM_BUS,
  74. &aspeed_i2c_ic_irq_domain_ops,
  75. NULL);
  76. if (!i2c_ic->irq_domain) {
  77. ret = -ENOMEM;
  78. goto err_iounmap;
  79. }
  80. i2c_ic->irq_domain->name = "aspeed-i2c-domain";
  81. irq_set_chained_handler_and_data(i2c_ic->parent_irq,
  82. aspeed_i2c_ic_irq_handler, i2c_ic);
  83. pr_info("i2c controller registered, irq %d\n", i2c_ic->parent_irq);
  84. return 0;
  85. err_iounmap:
  86. iounmap(i2c_ic->base);
  87. err_free_ic:
  88. kfree(i2c_ic);
  89. return ret;
  90. }
  91. IRQCHIP_DECLARE(ast2400_i2c_ic, "aspeed,ast2400-i2c-ic", aspeed_i2c_ic_of_init);
  92. IRQCHIP_DECLARE(ast2500_i2c_ic, "aspeed,ast2500-i2c-ic", aspeed_i2c_ic_of_init);