msm8916.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018-2020 Linaro Ltd
  4. * Author: Georgi Djakov <georgi.djakov@linaro.org>
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/device.h>
  8. #include <linux/interconnect-provider.h>
  9. #include <linux/io.h>
  10. #include <linux/module.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/of_device.h>
  13. #include <dt-bindings/interconnect/qcom,msm8916.h>
  14. #include "smd-rpm.h"
  15. #define RPM_BUS_MASTER_REQ 0x73616d62
  16. #define RPM_BUS_SLAVE_REQ 0x766c7362
  17. enum {
  18. MSM8916_BIMC_SNOC_MAS = 1,
  19. MSM8916_BIMC_SNOC_SLV,
  20. MSM8916_MASTER_AMPSS_M0,
  21. MSM8916_MASTER_LPASS,
  22. MSM8916_MASTER_BLSP_1,
  23. MSM8916_MASTER_DEHR,
  24. MSM8916_MASTER_GRAPHICS_3D,
  25. MSM8916_MASTER_JPEG,
  26. MSM8916_MASTER_MDP_PORT0,
  27. MSM8916_MASTER_CRYPTO_CORE0,
  28. MSM8916_MASTER_SDCC_1,
  29. MSM8916_MASTER_SDCC_2,
  30. MSM8916_MASTER_QDSS_BAM,
  31. MSM8916_MASTER_QDSS_ETR,
  32. MSM8916_MASTER_SNOC_CFG,
  33. MSM8916_MASTER_SPDM,
  34. MSM8916_MASTER_TCU0,
  35. MSM8916_MASTER_TCU1,
  36. MSM8916_MASTER_USB_HS,
  37. MSM8916_MASTER_VFE,
  38. MSM8916_MASTER_VIDEO_P0,
  39. MSM8916_SNOC_MM_INT_0,
  40. MSM8916_SNOC_MM_INT_1,
  41. MSM8916_SNOC_MM_INT_2,
  42. MSM8916_SNOC_MM_INT_BIMC,
  43. MSM8916_PNOC_INT_0,
  44. MSM8916_PNOC_INT_1,
  45. MSM8916_PNOC_MAS_0,
  46. MSM8916_PNOC_MAS_1,
  47. MSM8916_PNOC_SLV_0,
  48. MSM8916_PNOC_SLV_1,
  49. MSM8916_PNOC_SLV_2,
  50. MSM8916_PNOC_SLV_3,
  51. MSM8916_PNOC_SLV_4,
  52. MSM8916_PNOC_SLV_8,
  53. MSM8916_PNOC_SLV_9,
  54. MSM8916_PNOC_SNOC_MAS,
  55. MSM8916_PNOC_SNOC_SLV,
  56. MSM8916_SNOC_QDSS_INT,
  57. MSM8916_SLAVE_AMPSS_L2,
  58. MSM8916_SLAVE_APSS,
  59. MSM8916_SLAVE_LPASS,
  60. MSM8916_SLAVE_BIMC_CFG,
  61. MSM8916_SLAVE_BLSP_1,
  62. MSM8916_SLAVE_BOOT_ROM,
  63. MSM8916_SLAVE_CAMERA_CFG,
  64. MSM8916_SLAVE_CATS_128,
  65. MSM8916_SLAVE_OCMEM_64,
  66. MSM8916_SLAVE_CLK_CTL,
  67. MSM8916_SLAVE_CRYPTO_0_CFG,
  68. MSM8916_SLAVE_DEHR_CFG,
  69. MSM8916_SLAVE_DISPLAY_CFG,
  70. MSM8916_SLAVE_EBI_CH0,
  71. MSM8916_SLAVE_GRAPHICS_3D_CFG,
  72. MSM8916_SLAVE_IMEM_CFG,
  73. MSM8916_SLAVE_IMEM,
  74. MSM8916_SLAVE_MPM,
  75. MSM8916_SLAVE_MSG_RAM,
  76. MSM8916_SLAVE_MSS,
  77. MSM8916_SLAVE_PDM,
  78. MSM8916_SLAVE_PMIC_ARB,
  79. MSM8916_SLAVE_PNOC_CFG,
  80. MSM8916_SLAVE_PRNG,
  81. MSM8916_SLAVE_QDSS_CFG,
  82. MSM8916_SLAVE_QDSS_STM,
  83. MSM8916_SLAVE_RBCPR_CFG,
  84. MSM8916_SLAVE_SDCC_1,
  85. MSM8916_SLAVE_SDCC_2,
  86. MSM8916_SLAVE_SECURITY,
  87. MSM8916_SLAVE_SNOC_CFG,
  88. MSM8916_SLAVE_SPDM,
  89. MSM8916_SLAVE_SRVC_SNOC,
  90. MSM8916_SLAVE_TCSR,
  91. MSM8916_SLAVE_TLMM,
  92. MSM8916_SLAVE_USB_HS,
  93. MSM8916_SLAVE_VENUS_CFG,
  94. MSM8916_SNOC_BIMC_0_MAS,
  95. MSM8916_SNOC_BIMC_0_SLV,
  96. MSM8916_SNOC_BIMC_1_MAS,
  97. MSM8916_SNOC_BIMC_1_SLV,
  98. MSM8916_SNOC_INT_0,
  99. MSM8916_SNOC_INT_1,
  100. MSM8916_SNOC_INT_BIMC,
  101. MSM8916_SNOC_PNOC_MAS,
  102. MSM8916_SNOC_PNOC_SLV,
  103. };
  104. #define to_msm8916_provider(_provider) \
  105. container_of(_provider, struct msm8916_icc_provider, provider)
  106. static const struct clk_bulk_data msm8916_bus_clocks[] = {
  107. { .id = "bus" },
  108. { .id = "bus_a" },
  109. };
  110. /**
  111. * struct msm8916_icc_provider - Qualcomm specific interconnect provider
  112. * @provider: generic interconnect provider
  113. * @bus_clks: the clk_bulk_data table of bus clocks
  114. * @num_clks: the total number of clk_bulk_data entries
  115. */
  116. struct msm8916_icc_provider {
  117. struct icc_provider provider;
  118. struct clk_bulk_data *bus_clks;
  119. int num_clks;
  120. };
  121. #define MSM8916_MAX_LINKS 8
  122. /**
  123. * struct msm8916_icc_node - Qualcomm specific interconnect nodes
  124. * @name: the node name used in debugfs
  125. * @id: a unique node identifier
  126. * @links: an array of nodes where we can go next while traversing
  127. * @num_links: the total number of @links
  128. * @buswidth: width of the interconnect between a node and the bus (bytes)
  129. * @mas_rpm_id: RPM ID for devices that are bus masters
  130. * @slv_rpm_id: RPM ID for devices that are bus slaves
  131. * @rate: current bus clock rate in Hz
  132. */
  133. struct msm8916_icc_node {
  134. unsigned char *name;
  135. u16 id;
  136. u16 links[MSM8916_MAX_LINKS];
  137. u16 num_links;
  138. u16 buswidth;
  139. int mas_rpm_id;
  140. int slv_rpm_id;
  141. u64 rate;
  142. };
  143. struct msm8916_icc_desc {
  144. struct msm8916_icc_node **nodes;
  145. size_t num_nodes;
  146. };
  147. #define DEFINE_QNODE(_name, _id, _buswidth, _mas_rpm_id, _slv_rpm_id, \
  148. ...) \
  149. static struct msm8916_icc_node _name = { \
  150. .name = #_name, \
  151. .id = _id, \
  152. .buswidth = _buswidth, \
  153. .mas_rpm_id = _mas_rpm_id, \
  154. .slv_rpm_id = _slv_rpm_id, \
  155. .num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \
  156. .links = { __VA_ARGS__ }, \
  157. }
  158. DEFINE_QNODE(bimc_snoc_mas, MSM8916_BIMC_SNOC_MAS, 8, -1, -1, MSM8916_BIMC_SNOC_SLV);
  159. DEFINE_QNODE(bimc_snoc_slv, MSM8916_BIMC_SNOC_SLV, 8, -1, -1, MSM8916_SNOC_INT_0, MSM8916_SNOC_INT_1);
  160. DEFINE_QNODE(mas_apss, MSM8916_MASTER_AMPSS_M0, 8, -1, -1, MSM8916_SLAVE_EBI_CH0, MSM8916_BIMC_SNOC_MAS, MSM8916_SLAVE_AMPSS_L2);
  161. DEFINE_QNODE(mas_audio, MSM8916_MASTER_LPASS, 4, -1, -1, MSM8916_PNOC_MAS_0);
  162. DEFINE_QNODE(mas_blsp_1, MSM8916_MASTER_BLSP_1, 4, -1, -1, MSM8916_PNOC_MAS_1);
  163. DEFINE_QNODE(mas_dehr, MSM8916_MASTER_DEHR, 4, -1, -1, MSM8916_PNOC_MAS_0);
  164. DEFINE_QNODE(mas_gfx, MSM8916_MASTER_GRAPHICS_3D, 8, -1, -1, MSM8916_SLAVE_EBI_CH0, MSM8916_BIMC_SNOC_MAS, MSM8916_SLAVE_AMPSS_L2);
  165. DEFINE_QNODE(mas_jpeg, MSM8916_MASTER_JPEG, 16, -1, -1, MSM8916_SNOC_MM_INT_0, MSM8916_SNOC_MM_INT_2);
  166. DEFINE_QNODE(mas_mdp, MSM8916_MASTER_MDP_PORT0, 16, -1, -1, MSM8916_SNOC_MM_INT_0, MSM8916_SNOC_MM_INT_2);
  167. DEFINE_QNODE(mas_pcnoc_crypto_0, MSM8916_MASTER_CRYPTO_CORE0, 8, -1, -1, MSM8916_PNOC_INT_1);
  168. DEFINE_QNODE(mas_pcnoc_sdcc_1, MSM8916_MASTER_SDCC_1, 8, -1, -1, MSM8916_PNOC_INT_1);
  169. DEFINE_QNODE(mas_pcnoc_sdcc_2, MSM8916_MASTER_SDCC_2, 8, -1, -1, MSM8916_PNOC_INT_1);
  170. DEFINE_QNODE(mas_qdss_bam, MSM8916_MASTER_QDSS_BAM, 8, -1, -1, MSM8916_SNOC_QDSS_INT);
  171. DEFINE_QNODE(mas_qdss_etr, MSM8916_MASTER_QDSS_ETR, 8, -1, -1, MSM8916_SNOC_QDSS_INT);
  172. DEFINE_QNODE(mas_snoc_cfg, MSM8916_MASTER_SNOC_CFG, 4, -1, -1, MSM8916_SNOC_QDSS_INT);
  173. DEFINE_QNODE(mas_spdm, MSM8916_MASTER_SPDM, 4, -1, -1, MSM8916_PNOC_MAS_0);
  174. DEFINE_QNODE(mas_tcu0, MSM8916_MASTER_TCU0, 8, -1, -1, MSM8916_SLAVE_EBI_CH0, MSM8916_BIMC_SNOC_MAS, MSM8916_SLAVE_AMPSS_L2);
  175. DEFINE_QNODE(mas_tcu1, MSM8916_MASTER_TCU1, 8, -1, -1, MSM8916_SLAVE_EBI_CH0, MSM8916_BIMC_SNOC_MAS, MSM8916_SLAVE_AMPSS_L2);
  176. DEFINE_QNODE(mas_usb_hs, MSM8916_MASTER_USB_HS, 4, -1, -1, MSM8916_PNOC_MAS_1);
  177. DEFINE_QNODE(mas_vfe, MSM8916_MASTER_VFE, 16, -1, -1, MSM8916_SNOC_MM_INT_1, MSM8916_SNOC_MM_INT_2);
  178. DEFINE_QNODE(mas_video, MSM8916_MASTER_VIDEO_P0, 16, -1, -1, MSM8916_SNOC_MM_INT_0, MSM8916_SNOC_MM_INT_2);
  179. DEFINE_QNODE(mm_int_0, MSM8916_SNOC_MM_INT_0, 16, -1, -1, MSM8916_SNOC_MM_INT_BIMC);
  180. DEFINE_QNODE(mm_int_1, MSM8916_SNOC_MM_INT_1, 16, -1, -1, MSM8916_SNOC_MM_INT_BIMC);
  181. DEFINE_QNODE(mm_int_2, MSM8916_SNOC_MM_INT_2, 16, -1, -1, MSM8916_SNOC_INT_0);
  182. DEFINE_QNODE(mm_int_bimc, MSM8916_SNOC_MM_INT_BIMC, 16, -1, -1, MSM8916_SNOC_BIMC_1_MAS);
  183. DEFINE_QNODE(pcnoc_int_0, MSM8916_PNOC_INT_0, 8, -1, -1, MSM8916_PNOC_SNOC_MAS, MSM8916_PNOC_SLV_0, MSM8916_PNOC_SLV_1, MSM8916_PNOC_SLV_2, MSM8916_PNOC_SLV_3, MSM8916_PNOC_SLV_4, MSM8916_PNOC_SLV_8, MSM8916_PNOC_SLV_9);
  184. DEFINE_QNODE(pcnoc_int_1, MSM8916_PNOC_INT_1, 8, -1, -1, MSM8916_PNOC_SNOC_MAS);
  185. DEFINE_QNODE(pcnoc_m_0, MSM8916_PNOC_MAS_0, 8, -1, -1, MSM8916_PNOC_INT_0);
  186. DEFINE_QNODE(pcnoc_m_1, MSM8916_PNOC_MAS_1, 8, -1, -1, MSM8916_PNOC_SNOC_MAS);
  187. DEFINE_QNODE(pcnoc_s_0, MSM8916_PNOC_SLV_0, 4, -1, -1, MSM8916_SLAVE_CLK_CTL, MSM8916_SLAVE_TLMM, MSM8916_SLAVE_TCSR, MSM8916_SLAVE_SECURITY, MSM8916_SLAVE_MSS);
  188. DEFINE_QNODE(pcnoc_s_1, MSM8916_PNOC_SLV_1, 4, -1, -1, MSM8916_SLAVE_IMEM_CFG, MSM8916_SLAVE_CRYPTO_0_CFG, MSM8916_SLAVE_MSG_RAM, MSM8916_SLAVE_PDM, MSM8916_SLAVE_PRNG);
  189. DEFINE_QNODE(pcnoc_s_2, MSM8916_PNOC_SLV_2, 4, -1, -1, MSM8916_SLAVE_SPDM, MSM8916_SLAVE_BOOT_ROM, MSM8916_SLAVE_BIMC_CFG, MSM8916_SLAVE_PNOC_CFG, MSM8916_SLAVE_PMIC_ARB);
  190. DEFINE_QNODE(pcnoc_s_3, MSM8916_PNOC_SLV_3, 4, -1, -1, MSM8916_SLAVE_MPM, MSM8916_SLAVE_SNOC_CFG, MSM8916_SLAVE_RBCPR_CFG, MSM8916_SLAVE_QDSS_CFG, MSM8916_SLAVE_DEHR_CFG);
  191. DEFINE_QNODE(pcnoc_s_4, MSM8916_PNOC_SLV_4, 4, -1, -1, MSM8916_SLAVE_VENUS_CFG, MSM8916_SLAVE_CAMERA_CFG, MSM8916_SLAVE_DISPLAY_CFG);
  192. DEFINE_QNODE(pcnoc_s_8, MSM8916_PNOC_SLV_8, 4, -1, -1, MSM8916_SLAVE_USB_HS, MSM8916_SLAVE_SDCC_1, MSM8916_SLAVE_BLSP_1);
  193. DEFINE_QNODE(pcnoc_s_9, MSM8916_PNOC_SLV_9, 4, -1, -1, MSM8916_SLAVE_SDCC_2, MSM8916_SLAVE_LPASS, MSM8916_SLAVE_GRAPHICS_3D_CFG);
  194. DEFINE_QNODE(pcnoc_snoc_mas, MSM8916_PNOC_SNOC_MAS, 8, 29, -1, MSM8916_PNOC_SNOC_SLV);
  195. DEFINE_QNODE(pcnoc_snoc_slv, MSM8916_PNOC_SNOC_SLV, 8, -1, 45, MSM8916_SNOC_INT_0, MSM8916_SNOC_INT_BIMC, MSM8916_SNOC_INT_1);
  196. DEFINE_QNODE(qdss_int, MSM8916_SNOC_QDSS_INT, 8, -1, -1, MSM8916_SNOC_INT_0, MSM8916_SNOC_INT_BIMC);
  197. DEFINE_QNODE(slv_apps_l2, MSM8916_SLAVE_AMPSS_L2, 8, -1, -1, 0);
  198. DEFINE_QNODE(slv_apss, MSM8916_SLAVE_APSS, 4, -1, -1, 0);
  199. DEFINE_QNODE(slv_audio, MSM8916_SLAVE_LPASS, 4, -1, -1, 0);
  200. DEFINE_QNODE(slv_bimc_cfg, MSM8916_SLAVE_BIMC_CFG, 4, -1, -1, 0);
  201. DEFINE_QNODE(slv_blsp_1, MSM8916_SLAVE_BLSP_1, 4, -1, -1, 0);
  202. DEFINE_QNODE(slv_boot_rom, MSM8916_SLAVE_BOOT_ROM, 4, -1, -1, 0);
  203. DEFINE_QNODE(slv_camera_cfg, MSM8916_SLAVE_CAMERA_CFG, 4, -1, -1, 0);
  204. DEFINE_QNODE(slv_cats_0, MSM8916_SLAVE_CATS_128, 16, -1, -1, 0);
  205. DEFINE_QNODE(slv_cats_1, MSM8916_SLAVE_OCMEM_64, 8, -1, -1, 0);
  206. DEFINE_QNODE(slv_clk_ctl, MSM8916_SLAVE_CLK_CTL, 4, -1, -1, 0);
  207. DEFINE_QNODE(slv_crypto_0_cfg, MSM8916_SLAVE_CRYPTO_0_CFG, 4, -1, -1, 0);
  208. DEFINE_QNODE(slv_dehr_cfg, MSM8916_SLAVE_DEHR_CFG, 4, -1, -1, 0);
  209. DEFINE_QNODE(slv_display_cfg, MSM8916_SLAVE_DISPLAY_CFG, 4, -1, -1, 0);
  210. DEFINE_QNODE(slv_ebi_ch0, MSM8916_SLAVE_EBI_CH0, 8, -1, 0, 0);
  211. DEFINE_QNODE(slv_gfx_cfg, MSM8916_SLAVE_GRAPHICS_3D_CFG, 4, -1, -1, 0);
  212. DEFINE_QNODE(slv_imem_cfg, MSM8916_SLAVE_IMEM_CFG, 4, -1, -1, 0);
  213. DEFINE_QNODE(slv_imem, MSM8916_SLAVE_IMEM, 8, -1, 26, 0);
  214. DEFINE_QNODE(slv_mpm, MSM8916_SLAVE_MPM, 4, -1, -1, 0);
  215. DEFINE_QNODE(slv_msg_ram, MSM8916_SLAVE_MSG_RAM, 4, -1, -1, 0);
  216. DEFINE_QNODE(slv_mss, MSM8916_SLAVE_MSS, 4, -1, -1, 0);
  217. DEFINE_QNODE(slv_pdm, MSM8916_SLAVE_PDM, 4, -1, -1, 0);
  218. DEFINE_QNODE(slv_pmic_arb, MSM8916_SLAVE_PMIC_ARB, 4, -1, -1, 0);
  219. DEFINE_QNODE(slv_pcnoc_cfg, MSM8916_SLAVE_PNOC_CFG, 4, -1, -1, 0);
  220. DEFINE_QNODE(slv_prng, MSM8916_SLAVE_PRNG, 4, -1, -1, 0);
  221. DEFINE_QNODE(slv_qdss_cfg, MSM8916_SLAVE_QDSS_CFG, 4, -1, -1, 0);
  222. DEFINE_QNODE(slv_qdss_stm, MSM8916_SLAVE_QDSS_STM, 4, -1, 30, 0);
  223. DEFINE_QNODE(slv_rbcpr_cfg, MSM8916_SLAVE_RBCPR_CFG, 4, -1, -1, 0);
  224. DEFINE_QNODE(slv_sdcc_1, MSM8916_SLAVE_SDCC_1, 4, -1, -1, 0);
  225. DEFINE_QNODE(slv_sdcc_2, MSM8916_SLAVE_SDCC_2, 4, -1, -1, 0);
  226. DEFINE_QNODE(slv_security, MSM8916_SLAVE_SECURITY, 4, -1, -1, 0);
  227. DEFINE_QNODE(slv_snoc_cfg, MSM8916_SLAVE_SNOC_CFG, 4, -1, -1, 0);
  228. DEFINE_QNODE(slv_spdm, MSM8916_SLAVE_SPDM, 4, -1, -1, 0);
  229. DEFINE_QNODE(slv_srvc_snoc, MSM8916_SLAVE_SRVC_SNOC, 8, -1, -1, 0);
  230. DEFINE_QNODE(slv_tcsr, MSM8916_SLAVE_TCSR, 4, -1, -1, 0);
  231. DEFINE_QNODE(slv_tlmm, MSM8916_SLAVE_TLMM, 4, -1, -1, 0);
  232. DEFINE_QNODE(slv_usb_hs, MSM8916_SLAVE_USB_HS, 4, -1, -1, 0);
  233. DEFINE_QNODE(slv_venus_cfg, MSM8916_SLAVE_VENUS_CFG, 4, -1, -1, 0);
  234. DEFINE_QNODE(snoc_bimc_0_mas, MSM8916_SNOC_BIMC_0_MAS, 8, 3, -1, MSM8916_SNOC_BIMC_0_SLV);
  235. DEFINE_QNODE(snoc_bimc_0_slv, MSM8916_SNOC_BIMC_0_SLV, 8, -1, 24, MSM8916_SLAVE_EBI_CH0);
  236. DEFINE_QNODE(snoc_bimc_1_mas, MSM8916_SNOC_BIMC_1_MAS, 16, -1, -1, MSM8916_SNOC_BIMC_1_SLV);
  237. DEFINE_QNODE(snoc_bimc_1_slv, MSM8916_SNOC_BIMC_1_SLV, 8, -1, -1, MSM8916_SLAVE_EBI_CH0);
  238. DEFINE_QNODE(snoc_int_0, MSM8916_SNOC_INT_0, 8, 99, 130, MSM8916_SLAVE_QDSS_STM, MSM8916_SLAVE_IMEM, MSM8916_SNOC_PNOC_MAS);
  239. DEFINE_QNODE(snoc_int_1, MSM8916_SNOC_INT_1, 8, -1, -1, MSM8916_SLAVE_APSS, MSM8916_SLAVE_CATS_128, MSM8916_SLAVE_OCMEM_64);
  240. DEFINE_QNODE(snoc_int_bimc, MSM8916_SNOC_INT_BIMC, 8, 101, 132, MSM8916_SNOC_BIMC_0_MAS);
  241. DEFINE_QNODE(snoc_pcnoc_mas, MSM8916_SNOC_PNOC_MAS, 8, -1, -1, MSM8916_SNOC_PNOC_SLV);
  242. DEFINE_QNODE(snoc_pcnoc_slv, MSM8916_SNOC_PNOC_SLV, 8, -1, -1, MSM8916_PNOC_INT_0);
  243. static struct msm8916_icc_node *msm8916_snoc_nodes[] = {
  244. [BIMC_SNOC_SLV] = &bimc_snoc_slv,
  245. [MASTER_JPEG] = &mas_jpeg,
  246. [MASTER_MDP_PORT0] = &mas_mdp,
  247. [MASTER_QDSS_BAM] = &mas_qdss_bam,
  248. [MASTER_QDSS_ETR] = &mas_qdss_etr,
  249. [MASTER_SNOC_CFG] = &mas_snoc_cfg,
  250. [MASTER_VFE] = &mas_vfe,
  251. [MASTER_VIDEO_P0] = &mas_video,
  252. [SNOC_MM_INT_0] = &mm_int_0,
  253. [SNOC_MM_INT_1] = &mm_int_1,
  254. [SNOC_MM_INT_2] = &mm_int_2,
  255. [SNOC_MM_INT_BIMC] = &mm_int_bimc,
  256. [PCNOC_SNOC_SLV] = &pcnoc_snoc_slv,
  257. [SLAVE_APSS] = &slv_apss,
  258. [SLAVE_CATS_128] = &slv_cats_0,
  259. [SLAVE_OCMEM_64] = &slv_cats_1,
  260. [SLAVE_IMEM] = &slv_imem,
  261. [SLAVE_QDSS_STM] = &slv_qdss_stm,
  262. [SLAVE_SRVC_SNOC] = &slv_srvc_snoc,
  263. [SNOC_BIMC_0_MAS] = &snoc_bimc_0_mas,
  264. [SNOC_BIMC_1_MAS] = &snoc_bimc_1_mas,
  265. [SNOC_INT_0] = &snoc_int_0,
  266. [SNOC_INT_1] = &snoc_int_1,
  267. [SNOC_INT_BIMC] = &snoc_int_bimc,
  268. [SNOC_PCNOC_MAS] = &snoc_pcnoc_mas,
  269. [SNOC_QDSS_INT] = &qdss_int,
  270. };
  271. static struct msm8916_icc_desc msm8916_snoc = {
  272. .nodes = msm8916_snoc_nodes,
  273. .num_nodes = ARRAY_SIZE(msm8916_snoc_nodes),
  274. };
  275. static struct msm8916_icc_node *msm8916_bimc_nodes[] = {
  276. [BIMC_SNOC_MAS] = &bimc_snoc_mas,
  277. [MASTER_AMPSS_M0] = &mas_apss,
  278. [MASTER_GRAPHICS_3D] = &mas_gfx,
  279. [MASTER_TCU0] = &mas_tcu0,
  280. [MASTER_TCU1] = &mas_tcu1,
  281. [SLAVE_AMPSS_L2] = &slv_apps_l2,
  282. [SLAVE_EBI_CH0] = &slv_ebi_ch0,
  283. [SNOC_BIMC_0_SLV] = &snoc_bimc_0_slv,
  284. [SNOC_BIMC_1_SLV] = &snoc_bimc_1_slv,
  285. };
  286. static struct msm8916_icc_desc msm8916_bimc = {
  287. .nodes = msm8916_bimc_nodes,
  288. .num_nodes = ARRAY_SIZE(msm8916_bimc_nodes),
  289. };
  290. static struct msm8916_icc_node *msm8916_pcnoc_nodes[] = {
  291. [MASTER_BLSP_1] = &mas_blsp_1,
  292. [MASTER_DEHR] = &mas_dehr,
  293. [MASTER_LPASS] = &mas_audio,
  294. [MASTER_CRYPTO_CORE0] = &mas_pcnoc_crypto_0,
  295. [MASTER_SDCC_1] = &mas_pcnoc_sdcc_1,
  296. [MASTER_SDCC_2] = &mas_pcnoc_sdcc_2,
  297. [MASTER_SPDM] = &mas_spdm,
  298. [MASTER_USB_HS] = &mas_usb_hs,
  299. [PCNOC_INT_0] = &pcnoc_int_0,
  300. [PCNOC_INT_1] = &pcnoc_int_1,
  301. [PCNOC_MAS_0] = &pcnoc_m_0,
  302. [PCNOC_MAS_1] = &pcnoc_m_1,
  303. [PCNOC_SLV_0] = &pcnoc_s_0,
  304. [PCNOC_SLV_1] = &pcnoc_s_1,
  305. [PCNOC_SLV_2] = &pcnoc_s_2,
  306. [PCNOC_SLV_3] = &pcnoc_s_3,
  307. [PCNOC_SLV_4] = &pcnoc_s_4,
  308. [PCNOC_SLV_8] = &pcnoc_s_8,
  309. [PCNOC_SLV_9] = &pcnoc_s_9,
  310. [PCNOC_SNOC_MAS] = &pcnoc_snoc_mas,
  311. [SLAVE_BIMC_CFG] = &slv_bimc_cfg,
  312. [SLAVE_BLSP_1] = &slv_blsp_1,
  313. [SLAVE_BOOT_ROM] = &slv_boot_rom,
  314. [SLAVE_CAMERA_CFG] = &slv_camera_cfg,
  315. [SLAVE_CLK_CTL] = &slv_clk_ctl,
  316. [SLAVE_CRYPTO_0_CFG] = &slv_crypto_0_cfg,
  317. [SLAVE_DEHR_CFG] = &slv_dehr_cfg,
  318. [SLAVE_DISPLAY_CFG] = &slv_display_cfg,
  319. [SLAVE_GRAPHICS_3D_CFG] = &slv_gfx_cfg,
  320. [SLAVE_IMEM_CFG] = &slv_imem_cfg,
  321. [SLAVE_LPASS] = &slv_audio,
  322. [SLAVE_MPM] = &slv_mpm,
  323. [SLAVE_MSG_RAM] = &slv_msg_ram,
  324. [SLAVE_MSS] = &slv_mss,
  325. [SLAVE_PDM] = &slv_pdm,
  326. [SLAVE_PMIC_ARB] = &slv_pmic_arb,
  327. [SLAVE_PCNOC_CFG] = &slv_pcnoc_cfg,
  328. [SLAVE_PRNG] = &slv_prng,
  329. [SLAVE_QDSS_CFG] = &slv_qdss_cfg,
  330. [SLAVE_RBCPR_CFG] = &slv_rbcpr_cfg,
  331. [SLAVE_SDCC_1] = &slv_sdcc_1,
  332. [SLAVE_SDCC_2] = &slv_sdcc_2,
  333. [SLAVE_SECURITY] = &slv_security,
  334. [SLAVE_SNOC_CFG] = &slv_snoc_cfg,
  335. [SLAVE_SPDM] = &slv_spdm,
  336. [SLAVE_TCSR] = &slv_tcsr,
  337. [SLAVE_TLMM] = &slv_tlmm,
  338. [SLAVE_USB_HS] = &slv_usb_hs,
  339. [SLAVE_VENUS_CFG] = &slv_venus_cfg,
  340. [SNOC_PCNOC_SLV] = &snoc_pcnoc_slv,
  341. };
  342. static struct msm8916_icc_desc msm8916_pcnoc = {
  343. .nodes = msm8916_pcnoc_nodes,
  344. .num_nodes = ARRAY_SIZE(msm8916_pcnoc_nodes),
  345. };
  346. static int msm8916_icc_set(struct icc_node *src, struct icc_node *dst)
  347. {
  348. struct msm8916_icc_provider *qp;
  349. struct msm8916_icc_node *qn;
  350. u64 sum_bw, max_peak_bw, rate;
  351. u32 agg_avg = 0, agg_peak = 0;
  352. struct icc_provider *provider;
  353. struct icc_node *n;
  354. int ret, i;
  355. qn = src->data;
  356. provider = src->provider;
  357. qp = to_msm8916_provider(provider);
  358. list_for_each_entry(n, &provider->nodes, node_list)
  359. provider->aggregate(n, 0, n->avg_bw, n->peak_bw,
  360. &agg_avg, &agg_peak);
  361. sum_bw = icc_units_to_bps(agg_avg);
  362. max_peak_bw = icc_units_to_bps(agg_peak);
  363. /* send bandwidth request message to the RPM processor */
  364. if (qn->mas_rpm_id != -1) {
  365. ret = qcom_icc_rpm_smd_send(QCOM_SMD_RPM_ACTIVE_STATE,
  366. RPM_BUS_MASTER_REQ,
  367. qn->mas_rpm_id,
  368. sum_bw);
  369. if (ret) {
  370. pr_err("qcom_icc_rpm_smd_send mas %d error %d\n",
  371. qn->mas_rpm_id, ret);
  372. return ret;
  373. }
  374. }
  375. if (qn->slv_rpm_id != -1) {
  376. ret = qcom_icc_rpm_smd_send(QCOM_SMD_RPM_ACTIVE_STATE,
  377. RPM_BUS_SLAVE_REQ,
  378. qn->slv_rpm_id,
  379. sum_bw);
  380. if (ret) {
  381. pr_err("qcom_icc_rpm_smd_send slv error %d\n",
  382. ret);
  383. return ret;
  384. }
  385. }
  386. rate = max(sum_bw, max_peak_bw);
  387. do_div(rate, qn->buswidth);
  388. if (qn->rate == rate)
  389. return 0;
  390. for (i = 0; i < qp->num_clks; i++) {
  391. ret = clk_set_rate(qp->bus_clks[i].clk, rate);
  392. if (ret) {
  393. pr_err("%s clk_set_rate error: %d\n",
  394. qp->bus_clks[i].id, ret);
  395. return ret;
  396. }
  397. }
  398. qn->rate = rate;
  399. return 0;
  400. }
  401. static int msm8916_qnoc_probe(struct platform_device *pdev)
  402. {
  403. const struct msm8916_icc_desc *desc;
  404. struct msm8916_icc_node **qnodes;
  405. struct msm8916_icc_provider *qp;
  406. struct device *dev = &pdev->dev;
  407. struct icc_onecell_data *data;
  408. struct icc_provider *provider;
  409. struct icc_node *node;
  410. size_t num_nodes, i;
  411. int ret;
  412. /* wait for the RPM proxy */
  413. if (!qcom_icc_rpm_smd_available())
  414. return -EPROBE_DEFER;
  415. desc = of_device_get_match_data(dev);
  416. if (!desc)
  417. return -EINVAL;
  418. qnodes = desc->nodes;
  419. num_nodes = desc->num_nodes;
  420. qp = devm_kzalloc(dev, sizeof(*qp), GFP_KERNEL);
  421. if (!qp)
  422. return -ENOMEM;
  423. data = devm_kzalloc(dev, struct_size(data, nodes, num_nodes),
  424. GFP_KERNEL);
  425. if (!data)
  426. return -ENOMEM;
  427. qp->bus_clks = devm_kmemdup(dev, msm8916_bus_clocks,
  428. sizeof(msm8916_bus_clocks), GFP_KERNEL);
  429. if (!qp->bus_clks)
  430. return -ENOMEM;
  431. qp->num_clks = ARRAY_SIZE(msm8916_bus_clocks);
  432. ret = devm_clk_bulk_get(dev, qp->num_clks, qp->bus_clks);
  433. if (ret)
  434. return ret;
  435. ret = clk_bulk_prepare_enable(qp->num_clks, qp->bus_clks);
  436. if (ret)
  437. return ret;
  438. provider = &qp->provider;
  439. INIT_LIST_HEAD(&provider->nodes);
  440. provider->dev = dev;
  441. provider->set = msm8916_icc_set;
  442. provider->aggregate = icc_std_aggregate;
  443. provider->xlate = of_icc_xlate_onecell;
  444. provider->data = data;
  445. ret = icc_provider_add(provider);
  446. if (ret) {
  447. dev_err(dev, "error adding interconnect provider: %d\n", ret);
  448. clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks);
  449. return ret;
  450. }
  451. for (i = 0; i < num_nodes; i++) {
  452. size_t j;
  453. node = icc_node_create(qnodes[i]->id);
  454. if (IS_ERR(node)) {
  455. ret = PTR_ERR(node);
  456. goto err;
  457. }
  458. node->name = qnodes[i]->name;
  459. node->data = qnodes[i];
  460. icc_node_add(node, provider);
  461. for (j = 0; j < qnodes[i]->num_links; j++)
  462. icc_link_create(node, qnodes[i]->links[j]);
  463. data->nodes[i] = node;
  464. }
  465. data->num_nodes = num_nodes;
  466. platform_set_drvdata(pdev, qp);
  467. return 0;
  468. err:
  469. icc_nodes_remove(provider);
  470. icc_provider_del(provider);
  471. clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks);
  472. return ret;
  473. }
  474. static int msm8916_qnoc_remove(struct platform_device *pdev)
  475. {
  476. struct msm8916_icc_provider *qp = platform_get_drvdata(pdev);
  477. icc_nodes_remove(&qp->provider);
  478. clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks);
  479. return icc_provider_del(&qp->provider);
  480. }
  481. static const struct of_device_id msm8916_noc_of_match[] = {
  482. { .compatible = "qcom,msm8916-bimc", .data = &msm8916_bimc },
  483. { .compatible = "qcom,msm8916-pcnoc", .data = &msm8916_pcnoc },
  484. { .compatible = "qcom,msm8916-snoc", .data = &msm8916_snoc },
  485. { }
  486. };
  487. MODULE_DEVICE_TABLE(of, msm8916_noc_of_match);
  488. static struct platform_driver msm8916_noc_driver = {
  489. .probe = msm8916_qnoc_probe,
  490. .remove = msm8916_qnoc_remove,
  491. .driver = {
  492. .name = "qnoc-msm8916",
  493. .of_match_table = msm8916_noc_of_match,
  494. },
  495. };
  496. module_platform_driver(msm8916_noc_driver);
  497. MODULE_AUTHOR("Georgi Djakov <georgi.djakov@linaro.org>");
  498. MODULE_DESCRIPTION("Qualcomm MSM8916 NoC driver");
  499. MODULE_LICENSE("GPL v2");