i8042-snirm.h 1.3 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. #ifndef _I8042_SNIRM_H
  3. #define _I8042_SNIRM_H
  4. #include <asm/sni.h>
  5. /*
  6. * Names.
  7. */
  8. #define I8042_KBD_PHYS_DESC "onboard/serio0"
  9. #define I8042_AUX_PHYS_DESC "onboard/serio1"
  10. #define I8042_MUX_PHYS_DESC "onboard/serio%d"
  11. /*
  12. * IRQs.
  13. */
  14. static int i8042_kbd_irq;
  15. static int i8042_aux_irq;
  16. #define I8042_KBD_IRQ i8042_kbd_irq
  17. #define I8042_AUX_IRQ i8042_aux_irq
  18. static void __iomem *kbd_iobase;
  19. #define I8042_COMMAND_REG (kbd_iobase + 0x64UL)
  20. #define I8042_DATA_REG (kbd_iobase + 0x60UL)
  21. static inline int i8042_read_data(void)
  22. {
  23. return readb(kbd_iobase + 0x60UL);
  24. }
  25. static inline int i8042_read_status(void)
  26. {
  27. return readb(kbd_iobase + 0x64UL);
  28. }
  29. static inline void i8042_write_data(int val)
  30. {
  31. writeb(val, kbd_iobase + 0x60UL);
  32. }
  33. static inline void i8042_write_command(int val)
  34. {
  35. writeb(val, kbd_iobase + 0x64UL);
  36. }
  37. static inline int i8042_platform_init(void)
  38. {
  39. /* RM200 is strange ... */
  40. if (sni_brd_type == SNI_BRD_RM200) {
  41. kbd_iobase = ioremap(0x16000000, 4);
  42. i8042_kbd_irq = 33;
  43. i8042_aux_irq = 44;
  44. } else {
  45. kbd_iobase = ioremap(0x14000000, 4);
  46. i8042_kbd_irq = 1;
  47. i8042_aux_irq = 12;
  48. }
  49. if (!kbd_iobase)
  50. return -ENOMEM;
  51. return 0;
  52. }
  53. static inline void i8042_platform_exit(void)
  54. {
  55. }
  56. #endif /* _I8042_SNIRM_H */