hil_mlc.c 25 KB

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  1. /*
  2. * HIL MLC state machine and serio interface driver
  3. *
  4. * Copyright (c) 2001 Brian S. Julin
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. The name of the author may not be used to endorse or promote products
  14. * derived from this software without specific prior written permission.
  15. *
  16. * Alternatively, this software may be distributed under the terms of the
  17. * GNU General Public License ("GPL").
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22. * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28. *
  29. * References:
  30. * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
  31. *
  32. *
  33. * Driver theory of operation:
  34. *
  35. * Some access methods and an ISR is defined by the sub-driver
  36. * (e.g. hp_sdc_mlc.c). These methods are expected to provide a
  37. * few bits of logic in addition to raw access to the HIL MLC,
  38. * specifically, the ISR, which is entirely registered by the
  39. * sub-driver and invoked directly, must check for record
  40. * termination or packet match, at which point a semaphore must
  41. * be cleared and then the hil_mlcs_tasklet must be scheduled.
  42. *
  43. * The hil_mlcs_tasklet processes the state machine for all MLCs
  44. * each time it runs, checking each MLC's progress at the current
  45. * node in the state machine, and moving the MLC to subsequent nodes
  46. * in the state machine when appropriate. It will reschedule
  47. * itself if output is pending. (This rescheduling should be replaced
  48. * at some point with a sub-driver-specific mechanism.)
  49. *
  50. * A timer task prods the tasklet once per second to prevent
  51. * hangups when attached devices do not return expected data
  52. * and to initiate probes of the loop for new devices.
  53. */
  54. #include <linux/hil_mlc.h>
  55. #include <linux/errno.h>
  56. #include <linux/kernel.h>
  57. #include <linux/module.h>
  58. #include <linux/init.h>
  59. #include <linux/interrupt.h>
  60. #include <linux/slab.h>
  61. #include <linux/timer.h>
  62. #include <linux/list.h>
  63. MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
  64. MODULE_DESCRIPTION("HIL MLC serio");
  65. MODULE_LICENSE("Dual BSD/GPL");
  66. EXPORT_SYMBOL(hil_mlc_register);
  67. EXPORT_SYMBOL(hil_mlc_unregister);
  68. #define PREFIX "HIL MLC: "
  69. static LIST_HEAD(hil_mlcs);
  70. static DEFINE_RWLOCK(hil_mlcs_lock);
  71. static struct timer_list hil_mlcs_kicker;
  72. static int hil_mlcs_probe, hil_mlc_stop;
  73. static void hil_mlcs_process(unsigned long unused);
  74. static DECLARE_TASKLET_DISABLED_OLD(hil_mlcs_tasklet, hil_mlcs_process);
  75. /* #define HIL_MLC_DEBUG */
  76. /********************** Device info/instance management **********************/
  77. static void hil_mlc_clear_di_map(hil_mlc *mlc, int val)
  78. {
  79. int j;
  80. for (j = val; j < 7 ; j++)
  81. mlc->di_map[j] = -1;
  82. }
  83. static void hil_mlc_clear_di_scratch(hil_mlc *mlc)
  84. {
  85. memset(&mlc->di_scratch, 0, sizeof(mlc->di_scratch));
  86. }
  87. static void hil_mlc_copy_di_scratch(hil_mlc *mlc, int idx)
  88. {
  89. memcpy(&mlc->di[idx], &mlc->di_scratch, sizeof(mlc->di_scratch));
  90. }
  91. static int hil_mlc_match_di_scratch(hil_mlc *mlc)
  92. {
  93. int idx;
  94. for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
  95. int j, found = 0;
  96. /* In-use slots are not eligible. */
  97. for (j = 0; j < 7 ; j++)
  98. if (mlc->di_map[j] == idx)
  99. found++;
  100. if (found)
  101. continue;
  102. if (!memcmp(mlc->di + idx, &mlc->di_scratch,
  103. sizeof(mlc->di_scratch)))
  104. break;
  105. }
  106. return idx >= HIL_MLC_DEVMEM ? -1 : idx;
  107. }
  108. static int hil_mlc_find_free_di(hil_mlc *mlc)
  109. {
  110. int idx;
  111. /* TODO: Pick all-zero slots first, failing that,
  112. * randomize the slot picked among those eligible.
  113. */
  114. for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
  115. int j, found = 0;
  116. for (j = 0; j < 7 ; j++)
  117. if (mlc->di_map[j] == idx)
  118. found++;
  119. if (!found)
  120. break;
  121. }
  122. return idx; /* Note: It is guaranteed at least one above will match */
  123. }
  124. static inline void hil_mlc_clean_serio_map(hil_mlc *mlc)
  125. {
  126. int idx;
  127. for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
  128. int j, found = 0;
  129. for (j = 0; j < 7 ; j++)
  130. if (mlc->di_map[j] == idx)
  131. found++;
  132. if (!found)
  133. mlc->serio_map[idx].di_revmap = -1;
  134. }
  135. }
  136. static void hil_mlc_send_polls(hil_mlc *mlc)
  137. {
  138. int did, i, cnt;
  139. struct serio *serio;
  140. struct serio_driver *drv;
  141. i = cnt = 0;
  142. did = (mlc->ipacket[0] & HIL_PKT_ADDR_MASK) >> 8;
  143. serio = did ? mlc->serio[mlc->di_map[did - 1]] : NULL;
  144. drv = (serio != NULL) ? serio->drv : NULL;
  145. while (mlc->icount < 15 - i) {
  146. hil_packet p;
  147. p = mlc->ipacket[i];
  148. if (did != (p & HIL_PKT_ADDR_MASK) >> 8) {
  149. if (drv && drv->interrupt) {
  150. drv->interrupt(serio, 0, 0);
  151. drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
  152. drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
  153. drv->interrupt(serio, HIL_CMD_POL + cnt, 0);
  154. }
  155. did = (p & HIL_PKT_ADDR_MASK) >> 8;
  156. serio = did ? mlc->serio[mlc->di_map[did-1]] : NULL;
  157. drv = (serio != NULL) ? serio->drv : NULL;
  158. cnt = 0;
  159. }
  160. cnt++;
  161. i++;
  162. if (drv && drv->interrupt) {
  163. drv->interrupt(serio, (p >> 24), 0);
  164. drv->interrupt(serio, (p >> 16) & 0xff, 0);
  165. drv->interrupt(serio, (p >> 8) & ~HIL_PKT_ADDR_MASK, 0);
  166. drv->interrupt(serio, p & 0xff, 0);
  167. }
  168. }
  169. }
  170. /*************************** State engine *********************************/
  171. #define HILSEN_SCHED 0x000100 /* Schedule the tasklet */
  172. #define HILSEN_BREAK 0x000200 /* Wait until next pass */
  173. #define HILSEN_UP 0x000400 /* relative node#, decrement */
  174. #define HILSEN_DOWN 0x000800 /* relative node#, increment */
  175. #define HILSEN_FOLLOW 0x001000 /* use retval as next node# */
  176. #define HILSEN_MASK 0x0000ff
  177. #define HILSEN_START 0
  178. #define HILSEN_RESTART 1
  179. #define HILSEN_DHR 9
  180. #define HILSEN_DHR2 10
  181. #define HILSEN_IFC 14
  182. #define HILSEN_HEAL0 16
  183. #define HILSEN_HEAL 18
  184. #define HILSEN_ACF 21
  185. #define HILSEN_ACF2 22
  186. #define HILSEN_DISC0 25
  187. #define HILSEN_DISC 27
  188. #define HILSEN_MATCH 40
  189. #define HILSEN_OPERATE 41
  190. #define HILSEN_PROBE 44
  191. #define HILSEN_DSR 52
  192. #define HILSEN_REPOLL 55
  193. #define HILSEN_IFCACF 58
  194. #define HILSEN_END 60
  195. #define HILSEN_NEXT (HILSEN_DOWN | 1)
  196. #define HILSEN_SAME (HILSEN_DOWN | 0)
  197. #define HILSEN_LAST (HILSEN_UP | 1)
  198. #define HILSEN_DOZE (HILSEN_SAME | HILSEN_SCHED | HILSEN_BREAK)
  199. #define HILSEN_SLEEP (HILSEN_SAME | HILSEN_BREAK)
  200. static int hilse_match(hil_mlc *mlc, int unused)
  201. {
  202. int rc;
  203. rc = hil_mlc_match_di_scratch(mlc);
  204. if (rc == -1) {
  205. rc = hil_mlc_find_free_di(mlc);
  206. if (rc == -1)
  207. goto err;
  208. #ifdef HIL_MLC_DEBUG
  209. printk(KERN_DEBUG PREFIX "new in slot %i\n", rc);
  210. #endif
  211. hil_mlc_copy_di_scratch(mlc, rc);
  212. mlc->di_map[mlc->ddi] = rc;
  213. mlc->serio_map[rc].di_revmap = mlc->ddi;
  214. hil_mlc_clean_serio_map(mlc);
  215. serio_rescan(mlc->serio[rc]);
  216. return -1;
  217. }
  218. mlc->di_map[mlc->ddi] = rc;
  219. #ifdef HIL_MLC_DEBUG
  220. printk(KERN_DEBUG PREFIX "same in slot %i\n", rc);
  221. #endif
  222. mlc->serio_map[rc].di_revmap = mlc->ddi;
  223. hil_mlc_clean_serio_map(mlc);
  224. return 0;
  225. err:
  226. printk(KERN_ERR PREFIX "Residual device slots exhausted, close some serios!\n");
  227. return 1;
  228. }
  229. /* An LCV used to prevent runaway loops, forces 5 second sleep when reset. */
  230. static int hilse_init_lcv(hil_mlc *mlc, int unused)
  231. {
  232. time64_t now = ktime_get_seconds();
  233. if (mlc->lcv && (now - mlc->lcv_time) < 5)
  234. return -1;
  235. mlc->lcv_time = now;
  236. mlc->lcv = 0;
  237. return 0;
  238. }
  239. static int hilse_inc_lcv(hil_mlc *mlc, int lim)
  240. {
  241. return mlc->lcv++ >= lim ? -1 : 0;
  242. }
  243. #if 0
  244. static int hilse_set_lcv(hil_mlc *mlc, int val)
  245. {
  246. mlc->lcv = val;
  247. return 0;
  248. }
  249. #endif
  250. /* Management of the discovered device index (zero based, -1 means no devs) */
  251. static int hilse_set_ddi(hil_mlc *mlc, int val)
  252. {
  253. mlc->ddi = val;
  254. hil_mlc_clear_di_map(mlc, val + 1);
  255. return 0;
  256. }
  257. static int hilse_dec_ddi(hil_mlc *mlc, int unused)
  258. {
  259. mlc->ddi--;
  260. if (mlc->ddi <= -1) {
  261. mlc->ddi = -1;
  262. hil_mlc_clear_di_map(mlc, 0);
  263. return -1;
  264. }
  265. hil_mlc_clear_di_map(mlc, mlc->ddi + 1);
  266. return 0;
  267. }
  268. static int hilse_inc_ddi(hil_mlc *mlc, int unused)
  269. {
  270. BUG_ON(mlc->ddi >= 6);
  271. mlc->ddi++;
  272. return 0;
  273. }
  274. static int hilse_take_idd(hil_mlc *mlc, int unused)
  275. {
  276. int i;
  277. /* Help the state engine:
  278. * Is this a real IDD response or just an echo?
  279. *
  280. * Real IDD response does not start with a command.
  281. */
  282. if (mlc->ipacket[0] & HIL_PKT_CMD)
  283. goto bail;
  284. /* Should have the command echoed further down. */
  285. for (i = 1; i < 16; i++) {
  286. if (((mlc->ipacket[i] & HIL_PKT_ADDR_MASK) ==
  287. (mlc->ipacket[0] & HIL_PKT_ADDR_MASK)) &&
  288. (mlc->ipacket[i] & HIL_PKT_CMD) &&
  289. ((mlc->ipacket[i] & HIL_PKT_DATA_MASK) == HIL_CMD_IDD))
  290. break;
  291. }
  292. if (i > 15)
  293. goto bail;
  294. /* And the rest of the packets should still be clear. */
  295. while (++i < 16)
  296. if (mlc->ipacket[i])
  297. break;
  298. if (i < 16)
  299. goto bail;
  300. for (i = 0; i < 16; i++)
  301. mlc->di_scratch.idd[i] =
  302. mlc->ipacket[i] & HIL_PKT_DATA_MASK;
  303. /* Next step is to see if RSC supported */
  304. if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_RSC)
  305. return HILSEN_NEXT;
  306. if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
  307. return HILSEN_DOWN | 4;
  308. return 0;
  309. bail:
  310. mlc->ddi--;
  311. return -1; /* This should send us off to ACF */
  312. }
  313. static int hilse_take_rsc(hil_mlc *mlc, int unused)
  314. {
  315. int i;
  316. for (i = 0; i < 16; i++)
  317. mlc->di_scratch.rsc[i] =
  318. mlc->ipacket[i] & HIL_PKT_DATA_MASK;
  319. /* Next step is to see if EXD supported (IDD has already been read) */
  320. if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
  321. return HILSEN_NEXT;
  322. return 0;
  323. }
  324. static int hilse_take_exd(hil_mlc *mlc, int unused)
  325. {
  326. int i;
  327. for (i = 0; i < 16; i++)
  328. mlc->di_scratch.exd[i] =
  329. mlc->ipacket[i] & HIL_PKT_DATA_MASK;
  330. /* Next step is to see if RNM supported. */
  331. if (mlc->di_scratch.exd[0] & HIL_EXD_HEADER_RNM)
  332. return HILSEN_NEXT;
  333. return 0;
  334. }
  335. static int hilse_take_rnm(hil_mlc *mlc, int unused)
  336. {
  337. int i;
  338. for (i = 0; i < 16; i++)
  339. mlc->di_scratch.rnm[i] =
  340. mlc->ipacket[i] & HIL_PKT_DATA_MASK;
  341. printk(KERN_INFO PREFIX "Device name gotten: %16s\n",
  342. mlc->di_scratch.rnm);
  343. return 0;
  344. }
  345. static int hilse_operate(hil_mlc *mlc, int repoll)
  346. {
  347. if (mlc->opercnt == 0)
  348. hil_mlcs_probe = 0;
  349. mlc->opercnt = 1;
  350. hil_mlc_send_polls(mlc);
  351. if (!hil_mlcs_probe)
  352. return 0;
  353. hil_mlcs_probe = 0;
  354. mlc->opercnt = 0;
  355. return 1;
  356. }
  357. #define FUNC(funct, funct_arg, zero_rc, neg_rc, pos_rc) \
  358. { HILSE_FUNC, { .func = funct }, funct_arg, zero_rc, neg_rc, pos_rc },
  359. #define OUT(pack) \
  360. { HILSE_OUT, { .packet = pack }, 0, HILSEN_NEXT, HILSEN_DOZE, 0 },
  361. #define CTS \
  362. { HILSE_CTS, { .packet = 0 }, 0, HILSEN_NEXT | HILSEN_SCHED | HILSEN_BREAK, HILSEN_DOZE, 0 },
  363. #define EXPECT(comp, to, got, got_wrong, timed_out) \
  364. { HILSE_EXPECT, { .packet = comp }, to, got, got_wrong, timed_out },
  365. #define EXPECT_LAST(comp, to, got, got_wrong, timed_out) \
  366. { HILSE_EXPECT_LAST, { .packet = comp }, to, got, got_wrong, timed_out },
  367. #define EXPECT_DISC(comp, to, got, got_wrong, timed_out) \
  368. { HILSE_EXPECT_DISC, { .packet = comp }, to, got, got_wrong, timed_out },
  369. #define IN(to, got, got_error, timed_out) \
  370. { HILSE_IN, { .packet = 0 }, to, got, got_error, timed_out },
  371. #define OUT_DISC(pack) \
  372. { HILSE_OUT_DISC, { .packet = pack }, 0, 0, 0, 0 },
  373. #define OUT_LAST(pack) \
  374. { HILSE_OUT_LAST, { .packet = pack }, 0, 0, 0, 0 },
  375. static const struct hilse_node hil_mlc_se[HILSEN_END] = {
  376. /* 0 HILSEN_START */
  377. FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0)
  378. /* 1 HILSEN_RESTART */
  379. FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
  380. OUT(HIL_CTRL_ONLY) /* Disable APE */
  381. CTS
  382. #define TEST_PACKET(x) \
  383. (HIL_PKT_CMD | (x << HIL_PKT_ADDR_SHIFT) | x << 4 | x)
  384. OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0x5))
  385. EXPECT(HIL_ERR_INT | TEST_PACKET(0x5),
  386. 2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART)
  387. OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0xa))
  388. EXPECT(HIL_ERR_INT | TEST_PACKET(0xa),
  389. 2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART)
  390. OUT(HIL_CTRL_ONLY | 0) /* Disable test mode */
  391. /* 9 HILSEN_DHR */
  392. FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0)
  393. /* 10 HILSEN_DHR2 */
  394. FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
  395. FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0)
  396. OUT(HIL_PKT_CMD | HIL_CMD_DHR)
  397. IN(300000, HILSEN_DHR2, HILSEN_DHR2, HILSEN_NEXT)
  398. /* 14 HILSEN_IFC */
  399. OUT(HIL_PKT_CMD | HIL_CMD_IFC)
  400. EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
  401. 20000, HILSEN_DISC, HILSEN_DHR2, HILSEN_NEXT )
  402. /* If devices are there, they weren't in PUP or other loopback mode.
  403. * We're more concerned at this point with restoring operation
  404. * to devices than discovering new ones, so we try to salvage
  405. * the loop configuration by closing off the loop.
  406. */
  407. /* 16 HILSEN_HEAL0 */
  408. FUNC(hilse_dec_ddi, 0, HILSEN_NEXT, HILSEN_ACF, 0)
  409. FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, 0, 0)
  410. /* 18 HILSEN_HEAL */
  411. OUT_LAST(HIL_CMD_ELB)
  412. EXPECT_LAST(HIL_CMD_ELB | HIL_ERR_INT,
  413. 20000, HILSEN_REPOLL, HILSEN_DSR, HILSEN_NEXT)
  414. FUNC(hilse_dec_ddi, 0, HILSEN_HEAL, HILSEN_NEXT, 0)
  415. /* 21 HILSEN_ACF */
  416. FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_DOZE, 0)
  417. /* 22 HILSEN_ACF2 */
  418. FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
  419. OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
  420. IN(20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
  421. /* 25 HILSEN_DISC0 */
  422. OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
  423. EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_ELB | HIL_ERR_INT,
  424. 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
  425. /* Only enter here if response just received */
  426. /* 27 HILSEN_DISC */
  427. OUT_DISC(HIL_PKT_CMD | HIL_CMD_IDD)
  428. EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_IDD | HIL_ERR_INT,
  429. 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_START)
  430. FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, HILSEN_START, 0)
  431. FUNC(hilse_take_idd, 0, HILSEN_MATCH, HILSEN_IFCACF, HILSEN_FOLLOW)
  432. OUT_LAST(HIL_PKT_CMD | HIL_CMD_RSC)
  433. EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RSC | HIL_ERR_INT,
  434. 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
  435. FUNC(hilse_take_rsc, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW)
  436. OUT_LAST(HIL_PKT_CMD | HIL_CMD_EXD)
  437. EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_EXD | HIL_ERR_INT,
  438. 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
  439. FUNC(hilse_take_exd, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW)
  440. OUT_LAST(HIL_PKT_CMD | HIL_CMD_RNM)
  441. EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RNM | HIL_ERR_INT,
  442. 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
  443. FUNC(hilse_take_rnm, 0, HILSEN_MATCH, 0, 0)
  444. /* 40 HILSEN_MATCH */
  445. FUNC(hilse_match, 0, HILSEN_NEXT, HILSEN_NEXT, /* TODO */ 0)
  446. /* 41 HILSEN_OPERATE */
  447. OUT(HIL_PKT_CMD | HIL_CMD_POL)
  448. EXPECT(HIL_PKT_CMD | HIL_CMD_POL | HIL_ERR_INT,
  449. 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
  450. FUNC(hilse_operate, 0, HILSEN_OPERATE, HILSEN_IFC, HILSEN_NEXT)
  451. /* 44 HILSEN_PROBE */
  452. OUT_LAST(HIL_PKT_CMD | HIL_CMD_EPT)
  453. IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT)
  454. OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
  455. IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT)
  456. OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
  457. IN(10000, HILSEN_DISC0, HILSEN_DSR, HILSEN_NEXT)
  458. OUT_LAST(HIL_PKT_CMD | HIL_CMD_ELB)
  459. IN(10000, HILSEN_OPERATE, HILSEN_DSR, HILSEN_DSR)
  460. /* 52 HILSEN_DSR */
  461. FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0)
  462. OUT(HIL_PKT_CMD | HIL_CMD_DSR)
  463. IN(20000, HILSEN_DHR, HILSEN_DHR, HILSEN_IFC)
  464. /* 55 HILSEN_REPOLL */
  465. OUT(HIL_PKT_CMD | HIL_CMD_RPL)
  466. EXPECT(HIL_PKT_CMD | HIL_CMD_RPL | HIL_ERR_INT,
  467. 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
  468. FUNC(hilse_operate, 1, HILSEN_OPERATE, HILSEN_IFC, HILSEN_PROBE)
  469. /* 58 HILSEN_IFCACF */
  470. OUT(HIL_PKT_CMD | HIL_CMD_IFC)
  471. EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
  472. 20000, HILSEN_ACF2, HILSEN_DHR2, HILSEN_HEAL)
  473. /* 60 HILSEN_END */
  474. };
  475. static inline void hilse_setup_input(hil_mlc *mlc, const struct hilse_node *node)
  476. {
  477. switch (node->act) {
  478. case HILSE_EXPECT_DISC:
  479. mlc->imatch = node->object.packet;
  480. mlc->imatch |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
  481. break;
  482. case HILSE_EXPECT_LAST:
  483. mlc->imatch = node->object.packet;
  484. mlc->imatch |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
  485. break;
  486. case HILSE_EXPECT:
  487. mlc->imatch = node->object.packet;
  488. break;
  489. case HILSE_IN:
  490. mlc->imatch = 0;
  491. break;
  492. default:
  493. BUG();
  494. }
  495. mlc->istarted = 1;
  496. mlc->intimeout = usecs_to_jiffies(node->arg);
  497. mlc->instart = jiffies;
  498. mlc->icount = 15;
  499. memset(mlc->ipacket, 0, 16 * sizeof(hil_packet));
  500. BUG_ON(down_trylock(&mlc->isem));
  501. }
  502. #ifdef HIL_MLC_DEBUG
  503. static int doze;
  504. static int seidx; /* For debug */
  505. #endif
  506. static int hilse_donode(hil_mlc *mlc)
  507. {
  508. const struct hilse_node *node;
  509. int nextidx = 0;
  510. int sched_long = 0;
  511. unsigned long flags;
  512. #ifdef HIL_MLC_DEBUG
  513. if (mlc->seidx && mlc->seidx != seidx &&
  514. mlc->seidx != 41 && mlc->seidx != 42 && mlc->seidx != 43) {
  515. printk(KERN_DEBUG PREFIX "z%i \n {%i}", doze, mlc->seidx);
  516. doze = 0;
  517. }
  518. seidx = mlc->seidx;
  519. #endif
  520. node = hil_mlc_se + mlc->seidx;
  521. switch (node->act) {
  522. int rc;
  523. hil_packet pack;
  524. case HILSE_FUNC:
  525. BUG_ON(node->object.func == NULL);
  526. rc = node->object.func(mlc, node->arg);
  527. nextidx = (rc > 0) ? node->ugly :
  528. ((rc < 0) ? node->bad : node->good);
  529. if (nextidx == HILSEN_FOLLOW)
  530. nextidx = rc;
  531. break;
  532. case HILSE_EXPECT_LAST:
  533. case HILSE_EXPECT_DISC:
  534. case HILSE_EXPECT:
  535. case HILSE_IN:
  536. /* Already set up from previous HILSE_OUT_* */
  537. write_lock_irqsave(&mlc->lock, flags);
  538. rc = mlc->in(mlc, node->arg);
  539. if (rc == 2) {
  540. nextidx = HILSEN_DOZE;
  541. sched_long = 1;
  542. write_unlock_irqrestore(&mlc->lock, flags);
  543. break;
  544. }
  545. if (rc == 1)
  546. nextidx = node->ugly;
  547. else if (rc == 0)
  548. nextidx = node->good;
  549. else
  550. nextidx = node->bad;
  551. mlc->istarted = 0;
  552. write_unlock_irqrestore(&mlc->lock, flags);
  553. break;
  554. case HILSE_OUT_LAST:
  555. write_lock_irqsave(&mlc->lock, flags);
  556. pack = node->object.packet;
  557. pack |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
  558. goto out;
  559. case HILSE_OUT_DISC:
  560. write_lock_irqsave(&mlc->lock, flags);
  561. pack = node->object.packet;
  562. pack |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
  563. goto out;
  564. case HILSE_OUT:
  565. write_lock_irqsave(&mlc->lock, flags);
  566. pack = node->object.packet;
  567. out:
  568. if (!mlc->istarted) {
  569. /* Prepare to receive input */
  570. if ((node + 1)->act & HILSE_IN)
  571. hilse_setup_input(mlc, node + 1);
  572. }
  573. write_unlock_irqrestore(&mlc->lock, flags);
  574. if (down_trylock(&mlc->osem)) {
  575. nextidx = HILSEN_DOZE;
  576. break;
  577. }
  578. up(&mlc->osem);
  579. write_lock_irqsave(&mlc->lock, flags);
  580. if (!mlc->ostarted) {
  581. mlc->ostarted = 1;
  582. mlc->opacket = pack;
  583. rc = mlc->out(mlc);
  584. nextidx = HILSEN_DOZE;
  585. write_unlock_irqrestore(&mlc->lock, flags);
  586. if (rc) {
  587. hil_mlc_stop = 1;
  588. return 1;
  589. }
  590. break;
  591. }
  592. mlc->ostarted = 0;
  593. mlc->instart = jiffies;
  594. write_unlock_irqrestore(&mlc->lock, flags);
  595. nextidx = HILSEN_NEXT;
  596. break;
  597. case HILSE_CTS:
  598. write_lock_irqsave(&mlc->lock, flags);
  599. rc = mlc->cts(mlc);
  600. nextidx = rc ? node->bad : node->good;
  601. write_unlock_irqrestore(&mlc->lock, flags);
  602. if (rc) {
  603. hil_mlc_stop = 1;
  604. return 1;
  605. }
  606. break;
  607. default:
  608. BUG();
  609. }
  610. #ifdef HIL_MLC_DEBUG
  611. if (nextidx == HILSEN_DOZE)
  612. doze++;
  613. #endif
  614. while (nextidx & HILSEN_SCHED) {
  615. unsigned long now = jiffies;
  616. if (!sched_long)
  617. goto sched;
  618. if (time_after(now, mlc->instart + mlc->intimeout))
  619. goto sched;
  620. mod_timer(&hil_mlcs_kicker, mlc->instart + mlc->intimeout);
  621. break;
  622. sched:
  623. tasklet_schedule(&hil_mlcs_tasklet);
  624. break;
  625. }
  626. if (nextidx & HILSEN_DOWN)
  627. mlc->seidx += nextidx & HILSEN_MASK;
  628. else if (nextidx & HILSEN_UP)
  629. mlc->seidx -= nextidx & HILSEN_MASK;
  630. else
  631. mlc->seidx = nextidx & HILSEN_MASK;
  632. if (nextidx & HILSEN_BREAK)
  633. return 1;
  634. return 0;
  635. }
  636. /******************** tasklet context functions **************************/
  637. static void hil_mlcs_process(unsigned long unused)
  638. {
  639. struct list_head *tmp;
  640. read_lock(&hil_mlcs_lock);
  641. list_for_each(tmp, &hil_mlcs) {
  642. struct hil_mlc *mlc = list_entry(tmp, hil_mlc, list);
  643. while (hilse_donode(mlc) == 0) {
  644. #ifdef HIL_MLC_DEBUG
  645. if (mlc->seidx != 41 &&
  646. mlc->seidx != 42 &&
  647. mlc->seidx != 43)
  648. printk(KERN_DEBUG PREFIX " + ");
  649. #endif
  650. }
  651. }
  652. read_unlock(&hil_mlcs_lock);
  653. }
  654. /************************* Keepalive timer task *********************/
  655. static void hil_mlcs_timer(struct timer_list *unused)
  656. {
  657. if (hil_mlc_stop) {
  658. /* could not send packet - stop immediately. */
  659. pr_warn(PREFIX "HIL seems stuck - Disabling HIL MLC.\n");
  660. return;
  661. }
  662. hil_mlcs_probe = 1;
  663. tasklet_schedule(&hil_mlcs_tasklet);
  664. /* Re-insert the periodic task. */
  665. if (!timer_pending(&hil_mlcs_kicker))
  666. mod_timer(&hil_mlcs_kicker, jiffies + HZ);
  667. }
  668. /******************** user/kernel context functions **********************/
  669. static int hil_mlc_serio_write(struct serio *serio, unsigned char c)
  670. {
  671. struct hil_mlc_serio_map *map;
  672. struct hil_mlc *mlc;
  673. struct serio_driver *drv;
  674. uint8_t *idx, *last;
  675. map = serio->port_data;
  676. BUG_ON(map == NULL);
  677. mlc = map->mlc;
  678. BUG_ON(mlc == NULL);
  679. mlc->serio_opacket[map->didx] |=
  680. ((hil_packet)c) << (8 * (3 - mlc->serio_oidx[map->didx]));
  681. if (mlc->serio_oidx[map->didx] >= 3) {
  682. /* for now only commands */
  683. if (!(mlc->serio_opacket[map->didx] & HIL_PKT_CMD))
  684. return -EIO;
  685. switch (mlc->serio_opacket[map->didx] & HIL_PKT_DATA_MASK) {
  686. case HIL_CMD_IDD:
  687. idx = mlc->di[map->didx].idd;
  688. goto emu;
  689. case HIL_CMD_RSC:
  690. idx = mlc->di[map->didx].rsc;
  691. goto emu;
  692. case HIL_CMD_EXD:
  693. idx = mlc->di[map->didx].exd;
  694. goto emu;
  695. case HIL_CMD_RNM:
  696. idx = mlc->di[map->didx].rnm;
  697. goto emu;
  698. default:
  699. break;
  700. }
  701. mlc->serio_oidx[map->didx] = 0;
  702. mlc->serio_opacket[map->didx] = 0;
  703. }
  704. mlc->serio_oidx[map->didx]++;
  705. return -EIO;
  706. emu:
  707. drv = serio->drv;
  708. BUG_ON(drv == NULL);
  709. last = idx + 15;
  710. while ((last != idx) && (*last == 0))
  711. last--;
  712. while (idx != last) {
  713. drv->interrupt(serio, 0, 0);
  714. drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
  715. drv->interrupt(serio, 0, 0);
  716. drv->interrupt(serio, *idx, 0);
  717. idx++;
  718. }
  719. drv->interrupt(serio, 0, 0);
  720. drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
  721. drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
  722. drv->interrupt(serio, *idx, 0);
  723. mlc->serio_oidx[map->didx] = 0;
  724. mlc->serio_opacket[map->didx] = 0;
  725. return 0;
  726. }
  727. static int hil_mlc_serio_open(struct serio *serio)
  728. {
  729. struct hil_mlc_serio_map *map;
  730. struct hil_mlc *mlc;
  731. if (serio_get_drvdata(serio) != NULL)
  732. return -EBUSY;
  733. map = serio->port_data;
  734. BUG_ON(map == NULL);
  735. mlc = map->mlc;
  736. BUG_ON(mlc == NULL);
  737. return 0;
  738. }
  739. static void hil_mlc_serio_close(struct serio *serio)
  740. {
  741. struct hil_mlc_serio_map *map;
  742. struct hil_mlc *mlc;
  743. map = serio->port_data;
  744. BUG_ON(map == NULL);
  745. mlc = map->mlc;
  746. BUG_ON(mlc == NULL);
  747. serio_set_drvdata(serio, NULL);
  748. serio->drv = NULL;
  749. /* TODO wake up interruptable */
  750. }
  751. static const struct serio_device_id hil_mlc_serio_id = {
  752. .type = SERIO_HIL_MLC,
  753. .proto = SERIO_HIL,
  754. .extra = SERIO_ANY,
  755. .id = SERIO_ANY,
  756. };
  757. int hil_mlc_register(hil_mlc *mlc)
  758. {
  759. int i;
  760. unsigned long flags;
  761. BUG_ON(mlc == NULL);
  762. mlc->istarted = 0;
  763. mlc->ostarted = 0;
  764. rwlock_init(&mlc->lock);
  765. sema_init(&mlc->osem, 1);
  766. sema_init(&mlc->isem, 1);
  767. mlc->icount = -1;
  768. mlc->imatch = 0;
  769. mlc->opercnt = 0;
  770. sema_init(&(mlc->csem), 0);
  771. hil_mlc_clear_di_scratch(mlc);
  772. hil_mlc_clear_di_map(mlc, 0);
  773. for (i = 0; i < HIL_MLC_DEVMEM; i++) {
  774. struct serio *mlc_serio;
  775. hil_mlc_copy_di_scratch(mlc, i);
  776. mlc_serio = kzalloc(sizeof(*mlc_serio), GFP_KERNEL);
  777. mlc->serio[i] = mlc_serio;
  778. if (!mlc->serio[i]) {
  779. for (; i >= 0; i--)
  780. kfree(mlc->serio[i]);
  781. return -ENOMEM;
  782. }
  783. snprintf(mlc_serio->name, sizeof(mlc_serio->name)-1, "HIL_SERIO%d", i);
  784. snprintf(mlc_serio->phys, sizeof(mlc_serio->phys)-1, "HIL%d", i);
  785. mlc_serio->id = hil_mlc_serio_id;
  786. mlc_serio->id.id = i; /* HIL port no. */
  787. mlc_serio->write = hil_mlc_serio_write;
  788. mlc_serio->open = hil_mlc_serio_open;
  789. mlc_serio->close = hil_mlc_serio_close;
  790. mlc_serio->port_data = &(mlc->serio_map[i]);
  791. mlc->serio_map[i].mlc = mlc;
  792. mlc->serio_map[i].didx = i;
  793. mlc->serio_map[i].di_revmap = -1;
  794. mlc->serio_opacket[i] = 0;
  795. mlc->serio_oidx[i] = 0;
  796. serio_register_port(mlc_serio);
  797. }
  798. mlc->tasklet = &hil_mlcs_tasklet;
  799. write_lock_irqsave(&hil_mlcs_lock, flags);
  800. list_add_tail(&mlc->list, &hil_mlcs);
  801. mlc->seidx = HILSEN_START;
  802. write_unlock_irqrestore(&hil_mlcs_lock, flags);
  803. tasklet_schedule(&hil_mlcs_tasklet);
  804. return 0;
  805. }
  806. int hil_mlc_unregister(hil_mlc *mlc)
  807. {
  808. struct list_head *tmp;
  809. unsigned long flags;
  810. int i;
  811. BUG_ON(mlc == NULL);
  812. write_lock_irqsave(&hil_mlcs_lock, flags);
  813. list_for_each(tmp, &hil_mlcs)
  814. if (list_entry(tmp, hil_mlc, list) == mlc)
  815. goto found;
  816. /* not found in list */
  817. write_unlock_irqrestore(&hil_mlcs_lock, flags);
  818. tasklet_schedule(&hil_mlcs_tasklet);
  819. return -ENODEV;
  820. found:
  821. list_del(tmp);
  822. write_unlock_irqrestore(&hil_mlcs_lock, flags);
  823. for (i = 0; i < HIL_MLC_DEVMEM; i++) {
  824. serio_unregister_port(mlc->serio[i]);
  825. mlc->serio[i] = NULL;
  826. }
  827. tasklet_schedule(&hil_mlcs_tasklet);
  828. return 0;
  829. }
  830. /**************************** Module interface *************************/
  831. static int __init hil_mlc_init(void)
  832. {
  833. timer_setup(&hil_mlcs_kicker, &hil_mlcs_timer, 0);
  834. mod_timer(&hil_mlcs_kicker, jiffies + HZ);
  835. tasklet_enable(&hil_mlcs_tasklet);
  836. return 0;
  837. }
  838. static void __exit hil_mlc_exit(void)
  839. {
  840. del_timer_sync(&hil_mlcs_kicker);
  841. tasklet_kill(&hil_mlcs_tasklet);
  842. }
  843. module_init(hil_mlc_init);
  844. module_exit(hil_mlc_exit);