mtk-pmic-keys.c 8.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2017 MediaTek, Inc.
  4. *
  5. * Author: Chen Zhong <chen.zhong@mediatek.com>
  6. */
  7. #include <linux/input.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/kernel.h>
  10. #include <linux/mfd/mt6323/registers.h>
  11. #include <linux/mfd/mt6397/core.h>
  12. #include <linux/mfd/mt6397/registers.h>
  13. #include <linux/module.h>
  14. #include <linux/of_device.h>
  15. #include <linux/of.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/regmap.h>
  18. #define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1
  19. #define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6
  20. #define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1
  21. #define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5
  22. #define MTK_PMIC_RST_DU_MASK 0x3
  23. #define MTK_PMIC_RST_DU_SHIFT 8
  24. #define MTK_PMIC_PWRKEY_RST \
  25. (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT)
  26. #define MTK_PMIC_HOMEKEY_RST \
  27. (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT)
  28. #define MTK_PMIC_PWRKEY_INDEX 0
  29. #define MTK_PMIC_HOMEKEY_INDEX 1
  30. #define MTK_PMIC_MAX_KEY_COUNT 2
  31. struct mtk_pmic_keys_regs {
  32. u32 deb_reg;
  33. u32 deb_mask;
  34. u32 intsel_reg;
  35. u32 intsel_mask;
  36. };
  37. #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
  38. _intsel_reg, _intsel_mask) \
  39. { \
  40. .deb_reg = _deb_reg, \
  41. .deb_mask = _deb_mask, \
  42. .intsel_reg = _intsel_reg, \
  43. .intsel_mask = _intsel_mask, \
  44. }
  45. struct mtk_pmic_regs {
  46. const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
  47. u32 pmic_rst_reg;
  48. };
  49. static const struct mtk_pmic_regs mt6397_regs = {
  50. .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
  51. MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS,
  52. 0x8, MT6397_INT_RSV, 0x10),
  53. .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
  54. MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
  55. 0x10, MT6397_INT_RSV, 0x8),
  56. .pmic_rst_reg = MT6397_TOP_RST_MISC,
  57. };
  58. static const struct mtk_pmic_regs mt6323_regs = {
  59. .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
  60. MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
  61. 0x2, MT6323_INT_MISC_CON, 0x10),
  62. .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
  63. MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
  64. 0x4, MT6323_INT_MISC_CON, 0x8),
  65. .pmic_rst_reg = MT6323_TOP_RST_MISC,
  66. };
  67. struct mtk_pmic_keys_info {
  68. struct mtk_pmic_keys *keys;
  69. const struct mtk_pmic_keys_regs *regs;
  70. unsigned int keycode;
  71. int irq;
  72. bool wakeup:1;
  73. };
  74. struct mtk_pmic_keys {
  75. struct input_dev *input_dev;
  76. struct device *dev;
  77. struct regmap *regmap;
  78. struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT];
  79. };
  80. enum mtk_pmic_keys_lp_mode {
  81. LP_DISABLE,
  82. LP_ONEKEY,
  83. LP_TWOKEY,
  84. };
  85. static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
  86. u32 pmic_rst_reg)
  87. {
  88. int ret;
  89. u32 long_press_mode, long_press_debounce;
  90. ret = of_property_read_u32(keys->dev->of_node,
  91. "power-off-time-sec", &long_press_debounce);
  92. if (ret)
  93. long_press_debounce = 0;
  94. regmap_update_bits(keys->regmap, pmic_rst_reg,
  95. MTK_PMIC_RST_DU_MASK << MTK_PMIC_RST_DU_SHIFT,
  96. long_press_debounce << MTK_PMIC_RST_DU_SHIFT);
  97. ret = of_property_read_u32(keys->dev->of_node,
  98. "mediatek,long-press-mode", &long_press_mode);
  99. if (ret)
  100. long_press_mode = LP_DISABLE;
  101. switch (long_press_mode) {
  102. case LP_ONEKEY:
  103. regmap_update_bits(keys->regmap, pmic_rst_reg,
  104. MTK_PMIC_PWRKEY_RST,
  105. MTK_PMIC_PWRKEY_RST);
  106. regmap_update_bits(keys->regmap, pmic_rst_reg,
  107. MTK_PMIC_HOMEKEY_RST,
  108. 0);
  109. break;
  110. case LP_TWOKEY:
  111. regmap_update_bits(keys->regmap, pmic_rst_reg,
  112. MTK_PMIC_PWRKEY_RST,
  113. MTK_PMIC_PWRKEY_RST);
  114. regmap_update_bits(keys->regmap, pmic_rst_reg,
  115. MTK_PMIC_HOMEKEY_RST,
  116. MTK_PMIC_HOMEKEY_RST);
  117. break;
  118. case LP_DISABLE:
  119. regmap_update_bits(keys->regmap, pmic_rst_reg,
  120. MTK_PMIC_PWRKEY_RST,
  121. 0);
  122. regmap_update_bits(keys->regmap, pmic_rst_reg,
  123. MTK_PMIC_HOMEKEY_RST,
  124. 0);
  125. break;
  126. default:
  127. break;
  128. }
  129. }
  130. static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data)
  131. {
  132. struct mtk_pmic_keys_info *info = data;
  133. u32 key_deb, pressed;
  134. regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb);
  135. key_deb &= info->regs->deb_mask;
  136. pressed = !key_deb;
  137. input_report_key(info->keys->input_dev, info->keycode, pressed);
  138. input_sync(info->keys->input_dev);
  139. dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n",
  140. pressed ? "pressed" : "released", info->keycode);
  141. return IRQ_HANDLED;
  142. }
  143. static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys,
  144. struct mtk_pmic_keys_info *info)
  145. {
  146. int ret;
  147. info->keys = keys;
  148. ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg,
  149. info->regs->intsel_mask,
  150. info->regs->intsel_mask);
  151. if (ret < 0)
  152. return ret;
  153. ret = devm_request_threaded_irq(keys->dev, info->irq, NULL,
  154. mtk_pmic_keys_irq_handler_thread,
  155. IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
  156. "mtk-pmic-keys", info);
  157. if (ret) {
  158. dev_err(keys->dev, "Failed to request IRQ: %d: %d\n",
  159. info->irq, ret);
  160. return ret;
  161. }
  162. input_set_capability(keys->input_dev, EV_KEY, info->keycode);
  163. return 0;
  164. }
  165. static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev)
  166. {
  167. struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
  168. int index;
  169. for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
  170. if (keys->keys[index].wakeup)
  171. enable_irq_wake(keys->keys[index].irq);
  172. }
  173. return 0;
  174. }
  175. static int __maybe_unused mtk_pmic_keys_resume(struct device *dev)
  176. {
  177. struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
  178. int index;
  179. for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
  180. if (keys->keys[index].wakeup)
  181. disable_irq_wake(keys->keys[index].irq);
  182. }
  183. return 0;
  184. }
  185. static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend,
  186. mtk_pmic_keys_resume);
  187. static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = {
  188. {
  189. .compatible = "mediatek,mt6397-keys",
  190. .data = &mt6397_regs,
  191. }, {
  192. .compatible = "mediatek,mt6323-keys",
  193. .data = &mt6323_regs,
  194. }, {
  195. /* sentinel */
  196. }
  197. };
  198. MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl);
  199. static int mtk_pmic_keys_probe(struct platform_device *pdev)
  200. {
  201. int error, index = 0;
  202. unsigned int keycount;
  203. struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent);
  204. struct device_node *node = pdev->dev.of_node, *child;
  205. struct mtk_pmic_keys *keys;
  206. const struct mtk_pmic_regs *mtk_pmic_regs;
  207. struct input_dev *input_dev;
  208. const struct of_device_id *of_id =
  209. of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev);
  210. keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL);
  211. if (!keys)
  212. return -ENOMEM;
  213. keys->dev = &pdev->dev;
  214. keys->regmap = pmic_chip->regmap;
  215. mtk_pmic_regs = of_id->data;
  216. keys->input_dev = input_dev = devm_input_allocate_device(keys->dev);
  217. if (!input_dev) {
  218. dev_err(keys->dev, "input allocate device fail.\n");
  219. return -ENOMEM;
  220. }
  221. input_dev->name = "mtk-pmic-keys";
  222. input_dev->id.bustype = BUS_HOST;
  223. input_dev->id.vendor = 0x0001;
  224. input_dev->id.product = 0x0001;
  225. input_dev->id.version = 0x0001;
  226. keycount = of_get_available_child_count(node);
  227. if (keycount > MTK_PMIC_MAX_KEY_COUNT) {
  228. dev_err(keys->dev, "too many keys defined (%d)\n", keycount);
  229. return -EINVAL;
  230. }
  231. for_each_child_of_node(node, child) {
  232. keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index];
  233. keys->keys[index].irq = platform_get_irq(pdev, index);
  234. if (keys->keys[index].irq < 0) {
  235. of_node_put(child);
  236. return keys->keys[index].irq;
  237. }
  238. error = of_property_read_u32(child,
  239. "linux,keycodes", &keys->keys[index].keycode);
  240. if (error) {
  241. dev_err(keys->dev,
  242. "failed to read key:%d linux,keycode property: %d\n",
  243. index, error);
  244. of_node_put(child);
  245. return error;
  246. }
  247. if (of_property_read_bool(child, "wakeup-source"))
  248. keys->keys[index].wakeup = true;
  249. error = mtk_pmic_key_setup(keys, &keys->keys[index]);
  250. if (error) {
  251. of_node_put(child);
  252. return error;
  253. }
  254. index++;
  255. }
  256. error = input_register_device(input_dev);
  257. if (error) {
  258. dev_err(&pdev->dev,
  259. "register input device failed (%d)\n", error);
  260. return error;
  261. }
  262. mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg);
  263. platform_set_drvdata(pdev, keys);
  264. return 0;
  265. }
  266. static struct platform_driver pmic_keys_pdrv = {
  267. .probe = mtk_pmic_keys_probe,
  268. .driver = {
  269. .name = "mtk-pmic-keys",
  270. .of_match_table = of_mtk_pmic_keys_match_tbl,
  271. .pm = &mtk_pmic_keys_pm_ops,
  272. },
  273. };
  274. module_platform_driver(pmic_keys_pdrv);
  275. MODULE_LICENSE("GPL v2");
  276. MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
  277. MODULE_DESCRIPTION("MTK pmic-keys driver v0.1");