bmc150_magn.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Bosch BMC150 three-axis magnetic field sensor driver
  4. *
  5. * Copyright (c) 2015, Intel Corporation.
  6. *
  7. * This code is based on bmm050_api.c authored by contact@bosch.sensortec.com:
  8. *
  9. * (C) Copyright 2011~2014 Bosch Sensortec GmbH All Rights Reserved
  10. */
  11. #include <linux/module.h>
  12. #include <linux/i2c.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/delay.h>
  15. #include <linux/slab.h>
  16. #include <linux/acpi.h>
  17. #include <linux/pm.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/iio/iio.h>
  20. #include <linux/iio/sysfs.h>
  21. #include <linux/iio/buffer.h>
  22. #include <linux/iio/events.h>
  23. #include <linux/iio/trigger.h>
  24. #include <linux/iio/trigger_consumer.h>
  25. #include <linux/iio/triggered_buffer.h>
  26. #include <linux/regmap.h>
  27. #include "bmc150_magn.h"
  28. #define BMC150_MAGN_DRV_NAME "bmc150_magn"
  29. #define BMC150_MAGN_IRQ_NAME "bmc150_magn_event"
  30. #define BMC150_MAGN_REG_CHIP_ID 0x40
  31. #define BMC150_MAGN_CHIP_ID_VAL 0x32
  32. #define BMC150_MAGN_REG_X_L 0x42
  33. #define BMC150_MAGN_REG_X_M 0x43
  34. #define BMC150_MAGN_REG_Y_L 0x44
  35. #define BMC150_MAGN_REG_Y_M 0x45
  36. #define BMC150_MAGN_SHIFT_XY_L 3
  37. #define BMC150_MAGN_REG_Z_L 0x46
  38. #define BMC150_MAGN_REG_Z_M 0x47
  39. #define BMC150_MAGN_SHIFT_Z_L 1
  40. #define BMC150_MAGN_REG_RHALL_L 0x48
  41. #define BMC150_MAGN_REG_RHALL_M 0x49
  42. #define BMC150_MAGN_SHIFT_RHALL_L 2
  43. #define BMC150_MAGN_REG_INT_STATUS 0x4A
  44. #define BMC150_MAGN_REG_POWER 0x4B
  45. #define BMC150_MAGN_MASK_POWER_CTL BIT(0)
  46. #define BMC150_MAGN_REG_OPMODE_ODR 0x4C
  47. #define BMC150_MAGN_MASK_OPMODE GENMASK(2, 1)
  48. #define BMC150_MAGN_SHIFT_OPMODE 1
  49. #define BMC150_MAGN_MODE_NORMAL 0x00
  50. #define BMC150_MAGN_MODE_FORCED 0x01
  51. #define BMC150_MAGN_MODE_SLEEP 0x03
  52. #define BMC150_MAGN_MASK_ODR GENMASK(5, 3)
  53. #define BMC150_MAGN_SHIFT_ODR 3
  54. #define BMC150_MAGN_REG_INT 0x4D
  55. #define BMC150_MAGN_REG_INT_DRDY 0x4E
  56. #define BMC150_MAGN_MASK_DRDY_EN BIT(7)
  57. #define BMC150_MAGN_SHIFT_DRDY_EN 7
  58. #define BMC150_MAGN_MASK_DRDY_INT3 BIT(6)
  59. #define BMC150_MAGN_MASK_DRDY_Z_EN BIT(5)
  60. #define BMC150_MAGN_MASK_DRDY_Y_EN BIT(4)
  61. #define BMC150_MAGN_MASK_DRDY_X_EN BIT(3)
  62. #define BMC150_MAGN_MASK_DRDY_DR_POLARITY BIT(2)
  63. #define BMC150_MAGN_MASK_DRDY_LATCHING BIT(1)
  64. #define BMC150_MAGN_MASK_DRDY_INT3_POLARITY BIT(0)
  65. #define BMC150_MAGN_REG_LOW_THRESH 0x4F
  66. #define BMC150_MAGN_REG_HIGH_THRESH 0x50
  67. #define BMC150_MAGN_REG_REP_XY 0x51
  68. #define BMC150_MAGN_REG_REP_Z 0x52
  69. #define BMC150_MAGN_REG_REP_DATAMASK GENMASK(7, 0)
  70. #define BMC150_MAGN_REG_TRIM_START 0x5D
  71. #define BMC150_MAGN_REG_TRIM_END 0x71
  72. #define BMC150_MAGN_XY_OVERFLOW_VAL -4096
  73. #define BMC150_MAGN_Z_OVERFLOW_VAL -16384
  74. /* Time from SUSPEND to SLEEP */
  75. #define BMC150_MAGN_START_UP_TIME_MS 3
  76. #define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS 2000
  77. #define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
  78. #define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
  79. #define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
  80. #define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
  81. enum bmc150_magn_axis {
  82. AXIS_X,
  83. AXIS_Y,
  84. AXIS_Z,
  85. RHALL,
  86. AXIS_XYZ_MAX = RHALL,
  87. AXIS_XYZR_MAX,
  88. };
  89. enum bmc150_magn_power_modes {
  90. BMC150_MAGN_POWER_MODE_SUSPEND,
  91. BMC150_MAGN_POWER_MODE_SLEEP,
  92. BMC150_MAGN_POWER_MODE_NORMAL,
  93. };
  94. struct bmc150_magn_trim_regs {
  95. s8 x1;
  96. s8 y1;
  97. __le16 reserved1;
  98. u8 reserved2;
  99. __le16 z4;
  100. s8 x2;
  101. s8 y2;
  102. __le16 reserved3;
  103. __le16 z2;
  104. __le16 z1;
  105. __le16 xyz1;
  106. __le16 z3;
  107. s8 xy2;
  108. u8 xy1;
  109. } __packed;
  110. struct bmc150_magn_data {
  111. struct device *dev;
  112. /*
  113. * 1. Protect this structure.
  114. * 2. Serialize sequences that power on/off the device and access HW.
  115. */
  116. struct mutex mutex;
  117. struct regmap *regmap;
  118. struct iio_mount_matrix orientation;
  119. /* Ensure timestamp is naturally aligned */
  120. struct {
  121. s32 chans[3];
  122. s64 timestamp __aligned(8);
  123. } scan;
  124. struct iio_trigger *dready_trig;
  125. bool dready_trigger_on;
  126. int max_odr;
  127. int irq;
  128. };
  129. static const struct {
  130. int freq;
  131. u8 reg_val;
  132. } bmc150_magn_samp_freq_table[] = { {2, 0x01},
  133. {6, 0x02},
  134. {8, 0x03},
  135. {10, 0x00},
  136. {15, 0x04},
  137. {20, 0x05},
  138. {25, 0x06},
  139. {30, 0x07} };
  140. enum bmc150_magn_presets {
  141. LOW_POWER_PRESET,
  142. REGULAR_PRESET,
  143. ENHANCED_REGULAR_PRESET,
  144. HIGH_ACCURACY_PRESET
  145. };
  146. static const struct bmc150_magn_preset {
  147. u8 rep_xy;
  148. u8 rep_z;
  149. u8 odr;
  150. } bmc150_magn_presets_table[] = {
  151. [LOW_POWER_PRESET] = {3, 3, 10},
  152. [REGULAR_PRESET] = {9, 15, 10},
  153. [ENHANCED_REGULAR_PRESET] = {15, 27, 10},
  154. [HIGH_ACCURACY_PRESET] = {47, 83, 20},
  155. };
  156. #define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
  157. static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
  158. {
  159. switch (reg) {
  160. case BMC150_MAGN_REG_POWER:
  161. case BMC150_MAGN_REG_OPMODE_ODR:
  162. case BMC150_MAGN_REG_INT:
  163. case BMC150_MAGN_REG_INT_DRDY:
  164. case BMC150_MAGN_REG_LOW_THRESH:
  165. case BMC150_MAGN_REG_HIGH_THRESH:
  166. case BMC150_MAGN_REG_REP_XY:
  167. case BMC150_MAGN_REG_REP_Z:
  168. return true;
  169. default:
  170. return false;
  171. };
  172. }
  173. static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
  174. {
  175. switch (reg) {
  176. case BMC150_MAGN_REG_X_L:
  177. case BMC150_MAGN_REG_X_M:
  178. case BMC150_MAGN_REG_Y_L:
  179. case BMC150_MAGN_REG_Y_M:
  180. case BMC150_MAGN_REG_Z_L:
  181. case BMC150_MAGN_REG_Z_M:
  182. case BMC150_MAGN_REG_RHALL_L:
  183. case BMC150_MAGN_REG_RHALL_M:
  184. case BMC150_MAGN_REG_INT_STATUS:
  185. return true;
  186. default:
  187. return false;
  188. }
  189. }
  190. const struct regmap_config bmc150_magn_regmap_config = {
  191. .reg_bits = 8,
  192. .val_bits = 8,
  193. .max_register = BMC150_MAGN_REG_TRIM_END,
  194. .cache_type = REGCACHE_RBTREE,
  195. .writeable_reg = bmc150_magn_is_writeable_reg,
  196. .volatile_reg = bmc150_magn_is_volatile_reg,
  197. };
  198. EXPORT_SYMBOL(bmc150_magn_regmap_config);
  199. static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
  200. enum bmc150_magn_power_modes mode,
  201. bool state)
  202. {
  203. int ret;
  204. switch (mode) {
  205. case BMC150_MAGN_POWER_MODE_SUSPEND:
  206. ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
  207. BMC150_MAGN_MASK_POWER_CTL, !state);
  208. if (ret < 0)
  209. return ret;
  210. usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
  211. return 0;
  212. case BMC150_MAGN_POWER_MODE_SLEEP:
  213. return regmap_update_bits(data->regmap,
  214. BMC150_MAGN_REG_OPMODE_ODR,
  215. BMC150_MAGN_MASK_OPMODE,
  216. BMC150_MAGN_MODE_SLEEP <<
  217. BMC150_MAGN_SHIFT_OPMODE);
  218. case BMC150_MAGN_POWER_MODE_NORMAL:
  219. return regmap_update_bits(data->regmap,
  220. BMC150_MAGN_REG_OPMODE_ODR,
  221. BMC150_MAGN_MASK_OPMODE,
  222. BMC150_MAGN_MODE_NORMAL <<
  223. BMC150_MAGN_SHIFT_OPMODE);
  224. }
  225. return -EINVAL;
  226. }
  227. static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
  228. {
  229. #ifdef CONFIG_PM
  230. int ret;
  231. if (on) {
  232. ret = pm_runtime_resume_and_get(data->dev);
  233. } else {
  234. pm_runtime_mark_last_busy(data->dev);
  235. ret = pm_runtime_put_autosuspend(data->dev);
  236. }
  237. if (ret < 0) {
  238. dev_err(data->dev,
  239. "failed to change power state to %d\n", on);
  240. return ret;
  241. }
  242. #endif
  243. return 0;
  244. }
  245. static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
  246. {
  247. int ret, reg_val;
  248. u8 i, odr_val;
  249. ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, &reg_val);
  250. if (ret < 0)
  251. return ret;
  252. odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
  253. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
  254. if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
  255. *val = bmc150_magn_samp_freq_table[i].freq;
  256. return 0;
  257. }
  258. return -EINVAL;
  259. }
  260. static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
  261. {
  262. int ret;
  263. u8 i;
  264. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
  265. if (bmc150_magn_samp_freq_table[i].freq == val) {
  266. ret = regmap_update_bits(data->regmap,
  267. BMC150_MAGN_REG_OPMODE_ODR,
  268. BMC150_MAGN_MASK_ODR,
  269. bmc150_magn_samp_freq_table[i].
  270. reg_val <<
  271. BMC150_MAGN_SHIFT_ODR);
  272. if (ret < 0)
  273. return ret;
  274. return 0;
  275. }
  276. }
  277. return -EINVAL;
  278. }
  279. static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
  280. int rep_z, int odr)
  281. {
  282. int ret, reg_val, max_odr;
  283. if (rep_xy <= 0) {
  284. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
  285. &reg_val);
  286. if (ret < 0)
  287. return ret;
  288. rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
  289. }
  290. if (rep_z <= 0) {
  291. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
  292. &reg_val);
  293. if (ret < 0)
  294. return ret;
  295. rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
  296. }
  297. if (odr <= 0) {
  298. ret = bmc150_magn_get_odr(data, &odr);
  299. if (ret < 0)
  300. return ret;
  301. }
  302. /* the maximum selectable read-out frequency from datasheet */
  303. max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
  304. if (odr > max_odr) {
  305. dev_err(data->dev,
  306. "Can't set oversampling with sampling freq %d\n",
  307. odr);
  308. return -EINVAL;
  309. }
  310. data->max_odr = max_odr;
  311. return 0;
  312. }
  313. static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
  314. u16 rhall)
  315. {
  316. s16 val;
  317. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  318. if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
  319. return S32_MIN;
  320. if (!rhall)
  321. rhall = xyz1;
  322. val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
  323. val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
  324. ((s32)val)) >> 7)) + (((s32)val) *
  325. ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
  326. ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
  327. (((s16)tregs->x1) << 3);
  328. return (s32)val;
  329. }
  330. static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
  331. u16 rhall)
  332. {
  333. s16 val;
  334. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  335. if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
  336. return S32_MIN;
  337. if (!rhall)
  338. rhall = xyz1;
  339. val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
  340. val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
  341. ((s32)val)) >> 7)) + (((s32)val) *
  342. ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
  343. ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
  344. (((s16)tregs->y1) << 3);
  345. return (s32)val;
  346. }
  347. static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
  348. u16 rhall)
  349. {
  350. s32 val;
  351. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  352. u16 z1 = le16_to_cpu(tregs->z1);
  353. s16 z2 = le16_to_cpu(tregs->z2);
  354. s16 z3 = le16_to_cpu(tregs->z3);
  355. s16 z4 = le16_to_cpu(tregs->z4);
  356. if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
  357. return S32_MIN;
  358. val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
  359. ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
  360. ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
  361. return val;
  362. }
  363. static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
  364. {
  365. int ret;
  366. __le16 values[AXIS_XYZR_MAX];
  367. s16 raw_x, raw_y, raw_z;
  368. u16 rhall;
  369. struct bmc150_magn_trim_regs tregs;
  370. ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
  371. values, sizeof(values));
  372. if (ret < 0)
  373. return ret;
  374. raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
  375. raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
  376. raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
  377. rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
  378. ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
  379. &tregs, sizeof(tregs));
  380. if (ret < 0)
  381. return ret;
  382. buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
  383. buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
  384. buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
  385. return 0;
  386. }
  387. static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
  388. struct iio_chan_spec const *chan,
  389. int *val, int *val2, long mask)
  390. {
  391. struct bmc150_magn_data *data = iio_priv(indio_dev);
  392. int ret, tmp;
  393. s32 values[AXIS_XYZ_MAX];
  394. switch (mask) {
  395. case IIO_CHAN_INFO_RAW:
  396. if (iio_buffer_enabled(indio_dev))
  397. return -EBUSY;
  398. mutex_lock(&data->mutex);
  399. ret = bmc150_magn_set_power_state(data, true);
  400. if (ret < 0) {
  401. mutex_unlock(&data->mutex);
  402. return ret;
  403. }
  404. ret = bmc150_magn_read_xyz(data, values);
  405. if (ret < 0) {
  406. bmc150_magn_set_power_state(data, false);
  407. mutex_unlock(&data->mutex);
  408. return ret;
  409. }
  410. *val = values[chan->scan_index];
  411. ret = bmc150_magn_set_power_state(data, false);
  412. if (ret < 0) {
  413. mutex_unlock(&data->mutex);
  414. return ret;
  415. }
  416. mutex_unlock(&data->mutex);
  417. return IIO_VAL_INT;
  418. case IIO_CHAN_INFO_SCALE:
  419. /*
  420. * The API/driver performs an off-chip temperature
  421. * compensation and outputs x/y/z magnetic field data in
  422. * 16 LSB/uT to the upper application layer.
  423. */
  424. *val = 0;
  425. *val2 = 625;
  426. return IIO_VAL_INT_PLUS_MICRO;
  427. case IIO_CHAN_INFO_SAMP_FREQ:
  428. ret = bmc150_magn_get_odr(data, val);
  429. if (ret < 0)
  430. return ret;
  431. return IIO_VAL_INT;
  432. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  433. switch (chan->channel2) {
  434. case IIO_MOD_X:
  435. case IIO_MOD_Y:
  436. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
  437. &tmp);
  438. if (ret < 0)
  439. return ret;
  440. *val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
  441. return IIO_VAL_INT;
  442. case IIO_MOD_Z:
  443. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
  444. &tmp);
  445. if (ret < 0)
  446. return ret;
  447. *val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
  448. return IIO_VAL_INT;
  449. default:
  450. return -EINVAL;
  451. }
  452. default:
  453. return -EINVAL;
  454. }
  455. }
  456. static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
  457. struct iio_chan_spec const *chan,
  458. int val, int val2, long mask)
  459. {
  460. struct bmc150_magn_data *data = iio_priv(indio_dev);
  461. int ret;
  462. switch (mask) {
  463. case IIO_CHAN_INFO_SAMP_FREQ:
  464. if (val > data->max_odr)
  465. return -EINVAL;
  466. mutex_lock(&data->mutex);
  467. ret = bmc150_magn_set_odr(data, val);
  468. mutex_unlock(&data->mutex);
  469. return ret;
  470. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  471. switch (chan->channel2) {
  472. case IIO_MOD_X:
  473. case IIO_MOD_Y:
  474. if (val < 1 || val > 511)
  475. return -EINVAL;
  476. mutex_lock(&data->mutex);
  477. ret = bmc150_magn_set_max_odr(data, val, 0, 0);
  478. if (ret < 0) {
  479. mutex_unlock(&data->mutex);
  480. return ret;
  481. }
  482. ret = regmap_update_bits(data->regmap,
  483. BMC150_MAGN_REG_REP_XY,
  484. BMC150_MAGN_REG_REP_DATAMASK,
  485. BMC150_MAGN_REPXY_TO_REGVAL
  486. (val));
  487. mutex_unlock(&data->mutex);
  488. return ret;
  489. case IIO_MOD_Z:
  490. if (val < 1 || val > 256)
  491. return -EINVAL;
  492. mutex_lock(&data->mutex);
  493. ret = bmc150_magn_set_max_odr(data, 0, val, 0);
  494. if (ret < 0) {
  495. mutex_unlock(&data->mutex);
  496. return ret;
  497. }
  498. ret = regmap_update_bits(data->regmap,
  499. BMC150_MAGN_REG_REP_Z,
  500. BMC150_MAGN_REG_REP_DATAMASK,
  501. BMC150_MAGN_REPZ_TO_REGVAL
  502. (val));
  503. mutex_unlock(&data->mutex);
  504. return ret;
  505. default:
  506. return -EINVAL;
  507. }
  508. default:
  509. return -EINVAL;
  510. }
  511. }
  512. static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
  513. struct device_attribute *attr,
  514. char *buf)
  515. {
  516. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  517. struct bmc150_magn_data *data = iio_priv(indio_dev);
  518. size_t len = 0;
  519. u8 i;
  520. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
  521. if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
  522. break;
  523. len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
  524. bmc150_magn_samp_freq_table[i].freq);
  525. }
  526. /* replace last space with a newline */
  527. buf[len - 1] = '\n';
  528. return len;
  529. }
  530. static const struct iio_mount_matrix *
  531. bmc150_magn_get_mount_matrix(const struct iio_dev *indio_dev,
  532. const struct iio_chan_spec *chan)
  533. {
  534. struct bmc150_magn_data *data = iio_priv(indio_dev);
  535. return &data->orientation;
  536. }
  537. static const struct iio_chan_spec_ext_info bmc150_magn_ext_info[] = {
  538. IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmc150_magn_get_mount_matrix),
  539. { }
  540. };
  541. static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
  542. static struct attribute *bmc150_magn_attributes[] = {
  543. &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
  544. NULL,
  545. };
  546. static const struct attribute_group bmc150_magn_attrs_group = {
  547. .attrs = bmc150_magn_attributes,
  548. };
  549. #define BMC150_MAGN_CHANNEL(_axis) { \
  550. .type = IIO_MAGN, \
  551. .modified = 1, \
  552. .channel2 = IIO_MOD_##_axis, \
  553. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  554. BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
  555. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
  556. BIT(IIO_CHAN_INFO_SCALE), \
  557. .scan_index = AXIS_##_axis, \
  558. .scan_type = { \
  559. .sign = 's', \
  560. .realbits = 32, \
  561. .storagebits = 32, \
  562. .endianness = IIO_LE \
  563. }, \
  564. .ext_info = bmc150_magn_ext_info, \
  565. }
  566. static const struct iio_chan_spec bmc150_magn_channels[] = {
  567. BMC150_MAGN_CHANNEL(X),
  568. BMC150_MAGN_CHANNEL(Y),
  569. BMC150_MAGN_CHANNEL(Z),
  570. IIO_CHAN_SOFT_TIMESTAMP(3),
  571. };
  572. static const struct iio_info bmc150_magn_info = {
  573. .attrs = &bmc150_magn_attrs_group,
  574. .read_raw = bmc150_magn_read_raw,
  575. .write_raw = bmc150_magn_write_raw,
  576. };
  577. static const unsigned long bmc150_magn_scan_masks[] = {
  578. BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
  579. 0};
  580. static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
  581. {
  582. struct iio_poll_func *pf = p;
  583. struct iio_dev *indio_dev = pf->indio_dev;
  584. struct bmc150_magn_data *data = iio_priv(indio_dev);
  585. int ret;
  586. mutex_lock(&data->mutex);
  587. ret = bmc150_magn_read_xyz(data, data->scan.chans);
  588. if (ret < 0)
  589. goto err;
  590. iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
  591. pf->timestamp);
  592. err:
  593. mutex_unlock(&data->mutex);
  594. iio_trigger_notify_done(indio_dev->trig);
  595. return IRQ_HANDLED;
  596. }
  597. static int bmc150_magn_init(struct bmc150_magn_data *data)
  598. {
  599. int ret, chip_id;
  600. struct bmc150_magn_preset preset;
  601. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
  602. false);
  603. if (ret < 0) {
  604. dev_err(data->dev,
  605. "Failed to bring up device from suspend mode\n");
  606. return ret;
  607. }
  608. ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
  609. if (ret < 0) {
  610. dev_err(data->dev, "Failed reading chip id\n");
  611. goto err_poweroff;
  612. }
  613. if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
  614. dev_err(data->dev, "Invalid chip id 0x%x\n", chip_id);
  615. ret = -ENODEV;
  616. goto err_poweroff;
  617. }
  618. dev_dbg(data->dev, "Chip id %x\n", chip_id);
  619. preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
  620. ret = bmc150_magn_set_odr(data, preset.odr);
  621. if (ret < 0) {
  622. dev_err(data->dev, "Failed to set ODR to %d\n",
  623. preset.odr);
  624. goto err_poweroff;
  625. }
  626. ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
  627. BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
  628. if (ret < 0) {
  629. dev_err(data->dev, "Failed to set REP XY to %d\n",
  630. preset.rep_xy);
  631. goto err_poweroff;
  632. }
  633. ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
  634. BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
  635. if (ret < 0) {
  636. dev_err(data->dev, "Failed to set REP Z to %d\n",
  637. preset.rep_z);
  638. goto err_poweroff;
  639. }
  640. ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
  641. preset.odr);
  642. if (ret < 0)
  643. goto err_poweroff;
  644. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  645. true);
  646. if (ret < 0) {
  647. dev_err(data->dev, "Failed to power on device\n");
  648. goto err_poweroff;
  649. }
  650. return 0;
  651. err_poweroff:
  652. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  653. return ret;
  654. }
  655. static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
  656. {
  657. int tmp;
  658. /*
  659. * Data Ready (DRDY) is always cleared after
  660. * readout of data registers ends.
  661. */
  662. return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
  663. }
  664. static int bmc150_magn_trig_try_reen(struct iio_trigger *trig)
  665. {
  666. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  667. struct bmc150_magn_data *data = iio_priv(indio_dev);
  668. int ret;
  669. if (!data->dready_trigger_on)
  670. return 0;
  671. mutex_lock(&data->mutex);
  672. ret = bmc150_magn_reset_intr(data);
  673. mutex_unlock(&data->mutex);
  674. return ret;
  675. }
  676. static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
  677. bool state)
  678. {
  679. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  680. struct bmc150_magn_data *data = iio_priv(indio_dev);
  681. int ret = 0;
  682. mutex_lock(&data->mutex);
  683. if (state == data->dready_trigger_on)
  684. goto err_unlock;
  685. ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
  686. BMC150_MAGN_MASK_DRDY_EN,
  687. state << BMC150_MAGN_SHIFT_DRDY_EN);
  688. if (ret < 0)
  689. goto err_unlock;
  690. data->dready_trigger_on = state;
  691. if (state) {
  692. ret = bmc150_magn_reset_intr(data);
  693. if (ret < 0)
  694. goto err_unlock;
  695. }
  696. mutex_unlock(&data->mutex);
  697. return 0;
  698. err_unlock:
  699. mutex_unlock(&data->mutex);
  700. return ret;
  701. }
  702. static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
  703. .set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
  704. .try_reenable = bmc150_magn_trig_try_reen,
  705. };
  706. static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
  707. {
  708. struct bmc150_magn_data *data = iio_priv(indio_dev);
  709. return bmc150_magn_set_power_state(data, true);
  710. }
  711. static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
  712. {
  713. struct bmc150_magn_data *data = iio_priv(indio_dev);
  714. return bmc150_magn_set_power_state(data, false);
  715. }
  716. static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
  717. .preenable = bmc150_magn_buffer_preenable,
  718. .postdisable = bmc150_magn_buffer_postdisable,
  719. };
  720. static const char *bmc150_magn_match_acpi_device(struct device *dev)
  721. {
  722. const struct acpi_device_id *id;
  723. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  724. if (!id)
  725. return NULL;
  726. return dev_name(dev);
  727. }
  728. int bmc150_magn_probe(struct device *dev, struct regmap *regmap,
  729. int irq, const char *name)
  730. {
  731. struct bmc150_magn_data *data;
  732. struct iio_dev *indio_dev;
  733. int ret;
  734. indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
  735. if (!indio_dev)
  736. return -ENOMEM;
  737. data = iio_priv(indio_dev);
  738. dev_set_drvdata(dev, indio_dev);
  739. data->regmap = regmap;
  740. data->irq = irq;
  741. data->dev = dev;
  742. ret = iio_read_mount_matrix(dev, "mount-matrix",
  743. &data->orientation);
  744. if (ret)
  745. return ret;
  746. if (!name && ACPI_HANDLE(dev))
  747. name = bmc150_magn_match_acpi_device(dev);
  748. mutex_init(&data->mutex);
  749. ret = bmc150_magn_init(data);
  750. if (ret < 0)
  751. return ret;
  752. indio_dev->channels = bmc150_magn_channels;
  753. indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
  754. indio_dev->available_scan_masks = bmc150_magn_scan_masks;
  755. indio_dev->name = name;
  756. indio_dev->modes = INDIO_DIRECT_MODE;
  757. indio_dev->info = &bmc150_magn_info;
  758. if (irq > 0) {
  759. data->dready_trig = devm_iio_trigger_alloc(dev,
  760. "%s-dev%d",
  761. indio_dev->name,
  762. indio_dev->id);
  763. if (!data->dready_trig) {
  764. ret = -ENOMEM;
  765. dev_err(dev, "iio trigger alloc failed\n");
  766. goto err_poweroff;
  767. }
  768. data->dready_trig->dev.parent = dev;
  769. data->dready_trig->ops = &bmc150_magn_trigger_ops;
  770. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  771. ret = iio_trigger_register(data->dready_trig);
  772. if (ret) {
  773. dev_err(dev, "iio trigger register failed\n");
  774. goto err_poweroff;
  775. }
  776. ret = request_threaded_irq(irq,
  777. iio_trigger_generic_data_rdy_poll,
  778. NULL,
  779. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  780. BMC150_MAGN_IRQ_NAME,
  781. data->dready_trig);
  782. if (ret < 0) {
  783. dev_err(dev, "request irq %d failed\n", irq);
  784. goto err_trigger_unregister;
  785. }
  786. }
  787. ret = iio_triggered_buffer_setup(indio_dev,
  788. iio_pollfunc_store_time,
  789. bmc150_magn_trigger_handler,
  790. &bmc150_magn_buffer_setup_ops);
  791. if (ret < 0) {
  792. dev_err(dev, "iio triggered buffer setup failed\n");
  793. goto err_free_irq;
  794. }
  795. ret = pm_runtime_set_active(dev);
  796. if (ret)
  797. goto err_buffer_cleanup;
  798. pm_runtime_enable(dev);
  799. pm_runtime_set_autosuspend_delay(dev,
  800. BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
  801. pm_runtime_use_autosuspend(dev);
  802. ret = iio_device_register(indio_dev);
  803. if (ret < 0) {
  804. dev_err(dev, "unable to register iio device\n");
  805. goto err_pm_cleanup;
  806. }
  807. dev_dbg(dev, "Registered device %s\n", name);
  808. return 0;
  809. err_pm_cleanup:
  810. pm_runtime_dont_use_autosuspend(dev);
  811. pm_runtime_disable(dev);
  812. err_buffer_cleanup:
  813. iio_triggered_buffer_cleanup(indio_dev);
  814. err_free_irq:
  815. if (irq > 0)
  816. free_irq(irq, data->dready_trig);
  817. err_trigger_unregister:
  818. if (data->dready_trig)
  819. iio_trigger_unregister(data->dready_trig);
  820. err_poweroff:
  821. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  822. return ret;
  823. }
  824. EXPORT_SYMBOL(bmc150_magn_probe);
  825. int bmc150_magn_remove(struct device *dev)
  826. {
  827. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  828. struct bmc150_magn_data *data = iio_priv(indio_dev);
  829. iio_device_unregister(indio_dev);
  830. pm_runtime_disable(dev);
  831. pm_runtime_set_suspended(dev);
  832. iio_triggered_buffer_cleanup(indio_dev);
  833. if (data->irq > 0)
  834. free_irq(data->irq, data->dready_trig);
  835. if (data->dready_trig)
  836. iio_trigger_unregister(data->dready_trig);
  837. mutex_lock(&data->mutex);
  838. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  839. mutex_unlock(&data->mutex);
  840. return 0;
  841. }
  842. EXPORT_SYMBOL(bmc150_magn_remove);
  843. #ifdef CONFIG_PM
  844. static int bmc150_magn_runtime_suspend(struct device *dev)
  845. {
  846. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  847. struct bmc150_magn_data *data = iio_priv(indio_dev);
  848. int ret;
  849. mutex_lock(&data->mutex);
  850. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
  851. true);
  852. mutex_unlock(&data->mutex);
  853. if (ret < 0) {
  854. dev_err(dev, "powering off device failed\n");
  855. return ret;
  856. }
  857. return 0;
  858. }
  859. /*
  860. * Should be called with data->mutex held.
  861. */
  862. static int bmc150_magn_runtime_resume(struct device *dev)
  863. {
  864. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  865. struct bmc150_magn_data *data = iio_priv(indio_dev);
  866. return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  867. true);
  868. }
  869. #endif
  870. #ifdef CONFIG_PM_SLEEP
  871. static int bmc150_magn_suspend(struct device *dev)
  872. {
  873. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  874. struct bmc150_magn_data *data = iio_priv(indio_dev);
  875. int ret;
  876. mutex_lock(&data->mutex);
  877. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
  878. true);
  879. mutex_unlock(&data->mutex);
  880. return ret;
  881. }
  882. static int bmc150_magn_resume(struct device *dev)
  883. {
  884. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  885. struct bmc150_magn_data *data = iio_priv(indio_dev);
  886. int ret;
  887. mutex_lock(&data->mutex);
  888. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  889. true);
  890. mutex_unlock(&data->mutex);
  891. return ret;
  892. }
  893. #endif
  894. const struct dev_pm_ops bmc150_magn_pm_ops = {
  895. SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
  896. SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
  897. bmc150_magn_runtime_resume, NULL)
  898. };
  899. EXPORT_SYMBOL(bmc150_magn_pm_ops);
  900. MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
  901. MODULE_LICENSE("GPL v2");
  902. MODULE_DESCRIPTION("BMC150 magnetometer core driver");