opti621.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
  4. */
  5. /*
  6. * Authors:
  7. * Jaromir Koutek <miri@punknet.cz>,
  8. * Jan Harkes <jaharkes@cwi.nl>,
  9. * Mark Lord <mlord@pobox.com>
  10. * Some parts of code are from ali14xx.c and from rz1000.c.
  11. */
  12. #include <linux/types.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/pci.h>
  16. #include <linux/ide.h>
  17. #include <asm/io.h>
  18. #define DRV_NAME "opti621"
  19. #define READ_REG 0 /* index of Read cycle timing register */
  20. #define WRITE_REG 1 /* index of Write cycle timing register */
  21. #define CNTRL_REG 3 /* index of Control register */
  22. #define STRAP_REG 5 /* index of Strap register */
  23. #define MISC_REG 6 /* index of Miscellaneous register */
  24. static int reg_base;
  25. static DEFINE_SPINLOCK(opti621_lock);
  26. /* Write value to register reg, base of register
  27. * is at reg_base (0x1f0 primary, 0x170 secondary,
  28. * if not changed by PCI configuration).
  29. * This is from setupvic.exe program.
  30. */
  31. static void write_reg(u8 value, int reg)
  32. {
  33. inw(reg_base + 1);
  34. inw(reg_base + 1);
  35. outb(3, reg_base + 2);
  36. outb(value, reg_base + reg);
  37. outb(0x83, reg_base + 2);
  38. }
  39. /* Read value from register reg, base of register
  40. * is at reg_base (0x1f0 primary, 0x170 secondary,
  41. * if not changed by PCI configuration).
  42. * This is from setupvic.exe program.
  43. */
  44. static u8 read_reg(int reg)
  45. {
  46. u8 ret = 0;
  47. inw(reg_base + 1);
  48. inw(reg_base + 1);
  49. outb(3, reg_base + 2);
  50. ret = inb(reg_base + reg);
  51. outb(0x83, reg_base + 2);
  52. return ret;
  53. }
  54. static void opti621_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
  55. {
  56. ide_drive_t *pair = ide_get_pair_dev(drive);
  57. unsigned long flags;
  58. unsigned long mode = drive->pio_mode, pair_mode;
  59. const u8 pio = mode - XFER_PIO_0;
  60. u8 tim, misc, addr_pio = pio, clk;
  61. /* DRDY is default 2 (by OPTi Databook) */
  62. static const u8 addr_timings[2][5] = {
  63. { 0x20, 0x10, 0x00, 0x00, 0x00 }, /* 33 MHz */
  64. { 0x10, 0x10, 0x00, 0x00, 0x00 }, /* 25 MHz */
  65. };
  66. static const u8 data_rec_timings[2][5] = {
  67. { 0x5b, 0x45, 0x32, 0x21, 0x20 }, /* 33 MHz */
  68. { 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */
  69. };
  70. ide_set_drivedata(drive, (void *)mode);
  71. if (pair) {
  72. pair_mode = (unsigned long)ide_get_drivedata(pair);
  73. if (pair_mode && pair_mode < mode)
  74. addr_pio = pair_mode - XFER_PIO_0;
  75. }
  76. spin_lock_irqsave(&opti621_lock, flags);
  77. reg_base = hwif->io_ports.data_addr;
  78. /* allow Register-B */
  79. outb(0xc0, reg_base + CNTRL_REG);
  80. /* hmm, setupvic.exe does this ;-) */
  81. outb(0xff, reg_base + 5);
  82. /* if reads 0xff, adapter not exist? */
  83. (void)inb(reg_base + CNTRL_REG);
  84. /* if reads 0xc0, no interface exist? */
  85. read_reg(CNTRL_REG);
  86. /* check CLK speed */
  87. clk = read_reg(STRAP_REG) & 1;
  88. printk(KERN_INFO "%s: CLK = %d MHz\n", hwif->name, clk ? 25 : 33);
  89. tim = data_rec_timings[clk][pio];
  90. misc = addr_timings[clk][addr_pio];
  91. /* select Index-0/1 for Register-A/B */
  92. write_reg(drive->dn & 1, MISC_REG);
  93. /* set read cycle timings */
  94. write_reg(tim, READ_REG);
  95. /* set write cycle timings */
  96. write_reg(tim, WRITE_REG);
  97. /* use Register-A for drive 0 */
  98. /* use Register-B for drive 1 */
  99. write_reg(0x85, CNTRL_REG);
  100. /* set address setup, DRDY timings, */
  101. /* and read prefetch for both drives */
  102. write_reg(misc, MISC_REG);
  103. spin_unlock_irqrestore(&opti621_lock, flags);
  104. }
  105. static const struct ide_port_ops opti621_port_ops = {
  106. .set_pio_mode = opti621_set_pio_mode,
  107. };
  108. static const struct ide_port_info opti621_chipset = {
  109. .name = DRV_NAME,
  110. .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
  111. .port_ops = &opti621_port_ops,
  112. .host_flags = IDE_HFLAG_NO_DMA,
  113. .pio_mask = ATA_PIO4,
  114. };
  115. static int opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  116. {
  117. return ide_pci_init_one(dev, &opti621_chipset, NULL);
  118. }
  119. static const struct pci_device_id opti621_pci_tbl[] = {
  120. { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
  121. { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 0 },
  122. { 0, },
  123. };
  124. MODULE_DEVICE_TABLE(pci, opti621_pci_tbl);
  125. static struct pci_driver opti621_pci_driver = {
  126. .name = "Opti621_IDE",
  127. .id_table = opti621_pci_tbl,
  128. .probe = opti621_init_one,
  129. .remove = ide_pci_remove,
  130. .suspend = ide_pci_suspend,
  131. .resume = ide_pci_resume,
  132. };
  133. static int __init opti621_ide_init(void)
  134. {
  135. return ide_pci_register_driver(&opti621_pci_driver);
  136. }
  137. static void __exit opti621_ide_exit(void)
  138. {
  139. pci_unregister_driver(&opti621_pci_driver);
  140. }
  141. module_init(opti621_ide_init);
  142. module_exit(opti621_ide_exit);
  143. MODULE_AUTHOR("Jaromir Koutek, Jan Harkes, Mark Lord");
  144. MODULE_DESCRIPTION("PCI driver module for Opti621 IDE");
  145. MODULE_LICENSE("GPL");