u8500_hsem.c 3.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * u8500 HWSEM driver
  4. *
  5. * Copyright (C) 2010-2011 ST-Ericsson
  6. *
  7. * Implements u8500 semaphore handling for protocol 1, no interrupts.
  8. *
  9. * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  10. * Heavily borrowed from the work of :
  11. * Simon Que <sque@ti.com>
  12. * Hari Kanigeri <h-kanigeri2@ti.com>
  13. * Ohad Ben-Cohen <ohad@wizery.com>
  14. */
  15. #include <linux/module.h>
  16. #include <linux/delay.h>
  17. #include <linux/io.h>
  18. #include <linux/slab.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/hwspinlock.h>
  21. #include <linux/platform_device.h>
  22. #include "hwspinlock_internal.h"
  23. /*
  24. * Implementation of STE's HSem protocol 1 without interrutps.
  25. * The only masterID we allow is '0x01' to force people to use
  26. * HSems for synchronisation between processors rather than processes
  27. * on the ARM core.
  28. */
  29. #define U8500_MAX_SEMAPHORE 32 /* a total of 32 semaphore */
  30. #define RESET_SEMAPHORE (0) /* free */
  31. /*
  32. * CPU ID for master running u8500 kernel.
  33. * Hswpinlocks should only be used to synchonise operations
  34. * between the Cortex A9 core and the other CPUs. Hence
  35. * forcing the masterID to a preset value.
  36. */
  37. #define HSEM_MASTER_ID 0x01
  38. #define HSEM_REGISTER_OFFSET 0x08
  39. #define HSEM_CTRL_REG 0x00
  40. #define HSEM_ICRALL 0x90
  41. #define HSEM_PROTOCOL_1 0x01
  42. static int u8500_hsem_trylock(struct hwspinlock *lock)
  43. {
  44. void __iomem *lock_addr = lock->priv;
  45. writel(HSEM_MASTER_ID, lock_addr);
  46. /* get only first 4 bit and compare to masterID.
  47. * if equal, we have the semaphore, otherwise
  48. * someone else has it.
  49. */
  50. return (HSEM_MASTER_ID == (0x0F & readl(lock_addr)));
  51. }
  52. static void u8500_hsem_unlock(struct hwspinlock *lock)
  53. {
  54. void __iomem *lock_addr = lock->priv;
  55. /* release the lock by writing 0 to it */
  56. writel(RESET_SEMAPHORE, lock_addr);
  57. }
  58. /*
  59. * u8500: what value is recommended here ?
  60. */
  61. static void u8500_hsem_relax(struct hwspinlock *lock)
  62. {
  63. ndelay(50);
  64. }
  65. static const struct hwspinlock_ops u8500_hwspinlock_ops = {
  66. .trylock = u8500_hsem_trylock,
  67. .unlock = u8500_hsem_unlock,
  68. .relax = u8500_hsem_relax,
  69. };
  70. static int u8500_hsem_probe(struct platform_device *pdev)
  71. {
  72. struct hwspinlock_pdata *pdata = pdev->dev.platform_data;
  73. struct hwspinlock_device *bank;
  74. struct hwspinlock *hwlock;
  75. void __iomem *io_base;
  76. int i, num_locks = U8500_MAX_SEMAPHORE;
  77. ulong val;
  78. if (!pdata)
  79. return -ENODEV;
  80. io_base = devm_platform_ioremap_resource(pdev, 0);
  81. if (IS_ERR(io_base))
  82. return PTR_ERR(io_base);
  83. /* make sure protocol 1 is selected */
  84. val = readl(io_base + HSEM_CTRL_REG);
  85. writel((val & ~HSEM_PROTOCOL_1), io_base + HSEM_CTRL_REG);
  86. /* clear all interrupts */
  87. writel(0xFFFF, io_base + HSEM_ICRALL);
  88. bank = devm_kzalloc(&pdev->dev, struct_size(bank, lock, num_locks),
  89. GFP_KERNEL);
  90. if (!bank)
  91. return -ENOMEM;
  92. platform_set_drvdata(pdev, bank);
  93. for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
  94. hwlock->priv = io_base + HSEM_REGISTER_OFFSET + sizeof(u32) * i;
  95. return devm_hwspin_lock_register(&pdev->dev, bank,
  96. &u8500_hwspinlock_ops,
  97. pdata->base_id, num_locks);
  98. }
  99. static int u8500_hsem_remove(struct platform_device *pdev)
  100. {
  101. struct hwspinlock_device *bank = platform_get_drvdata(pdev);
  102. void __iomem *io_base = bank->lock[0].priv - HSEM_REGISTER_OFFSET;
  103. /* clear all interrupts */
  104. writel(0xFFFF, io_base + HSEM_ICRALL);
  105. return 0;
  106. }
  107. static struct platform_driver u8500_hsem_driver = {
  108. .probe = u8500_hsem_probe,
  109. .remove = u8500_hsem_remove,
  110. .driver = {
  111. .name = "u8500_hsem",
  112. },
  113. };
  114. static int __init u8500_hsem_init(void)
  115. {
  116. return platform_driver_register(&u8500_hsem_driver);
  117. }
  118. /* board init code might need to reserve hwspinlocks for predefined purposes */
  119. postcore_initcall(u8500_hsem_init);
  120. static void __exit u8500_hsem_exit(void)
  121. {
  122. platform_driver_unregister(&u8500_hsem_driver);
  123. }
  124. module_exit(u8500_hsem_exit);
  125. MODULE_LICENSE("GPL v2");
  126. MODULE_DESCRIPTION("Hardware Spinlock driver for u8500");
  127. MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");