w83795.c 62 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * w83795.c - Linux kernel driver for hardware monitoring
  4. * Copyright (C) 2008 Nuvoton Technology Corp.
  5. * Wei Song
  6. * Copyright (C) 2010 Jean Delvare <jdelvare@suse.de>
  7. *
  8. * Supports following chips:
  9. *
  10. * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
  11. * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
  12. * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/slab.h>
  18. #include <linux/i2c.h>
  19. #include <linux/hwmon.h>
  20. #include <linux/hwmon-sysfs.h>
  21. #include <linux/err.h>
  22. #include <linux/mutex.h>
  23. #include <linux/jiffies.h>
  24. #include <linux/util_macros.h>
  25. /* Addresses to scan */
  26. static const unsigned short normal_i2c[] = {
  27. 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
  28. };
  29. static bool reset;
  30. module_param(reset, bool, 0);
  31. MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
  32. #define W83795_REG_BANKSEL 0x00
  33. #define W83795_REG_VENDORID 0xfd
  34. #define W83795_REG_CHIPID 0xfe
  35. #define W83795_REG_DEVICEID 0xfb
  36. #define W83795_REG_DEVICEID_A 0xff
  37. #define W83795_REG_I2C_ADDR 0xfc
  38. #define W83795_REG_CONFIG 0x01
  39. #define W83795_REG_CONFIG_CONFIG48 0x04
  40. #define W83795_REG_CONFIG_START 0x01
  41. /* Multi-Function Pin Ctrl Registers */
  42. #define W83795_REG_VOLT_CTRL1 0x02
  43. #define W83795_REG_VOLT_CTRL2 0x03
  44. #define W83795_REG_TEMP_CTRL1 0x04
  45. #define W83795_REG_TEMP_CTRL2 0x05
  46. #define W83795_REG_FANIN_CTRL1 0x06
  47. #define W83795_REG_FANIN_CTRL2 0x07
  48. #define W83795_REG_VMIGB_CTRL 0x08
  49. #define TEMP_READ 0
  50. #define TEMP_CRIT 1
  51. #define TEMP_CRIT_HYST 2
  52. #define TEMP_WARN 3
  53. #define TEMP_WARN_HYST 4
  54. /*
  55. * only crit and crit_hyst affect real-time alarm status
  56. * current crit crit_hyst warn warn_hyst
  57. */
  58. static const u16 W83795_REG_TEMP[][5] = {
  59. {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
  60. {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
  61. {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
  62. {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
  63. {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
  64. {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
  65. };
  66. #define IN_READ 0
  67. #define IN_MAX 1
  68. #define IN_LOW 2
  69. static const u16 W83795_REG_IN[][3] = {
  70. /* Current, HL, LL */
  71. {0x10, 0x70, 0x71}, /* VSEN1 */
  72. {0x11, 0x72, 0x73}, /* VSEN2 */
  73. {0x12, 0x74, 0x75}, /* VSEN3 */
  74. {0x13, 0x76, 0x77}, /* VSEN4 */
  75. {0x14, 0x78, 0x79}, /* VSEN5 */
  76. {0x15, 0x7a, 0x7b}, /* VSEN6 */
  77. {0x16, 0x7c, 0x7d}, /* VSEN7 */
  78. {0x17, 0x7e, 0x7f}, /* VSEN8 */
  79. {0x18, 0x80, 0x81}, /* VSEN9 */
  80. {0x19, 0x82, 0x83}, /* VSEN10 */
  81. {0x1A, 0x84, 0x85}, /* VSEN11 */
  82. {0x1B, 0x86, 0x87}, /* VTT */
  83. {0x1C, 0x88, 0x89}, /* 3VDD */
  84. {0x1D, 0x8a, 0x8b}, /* 3VSB */
  85. {0x1E, 0x8c, 0x8d}, /* VBAT */
  86. {0x1F, 0xa6, 0xa7}, /* VSEN12 */
  87. {0x20, 0xaa, 0xab}, /* VSEN13 */
  88. {0x21, 0x96, 0x97}, /* VSEN14 */
  89. {0x22, 0x9a, 0x9b}, /* VSEN15 */
  90. {0x23, 0x9e, 0x9f}, /* VSEN16 */
  91. {0x24, 0xa2, 0xa3}, /* VSEN17 */
  92. };
  93. #define W83795_REG_VRLSB 0x3C
  94. static const u8 W83795_REG_IN_HL_LSB[] = {
  95. 0x8e, /* VSEN1-4 */
  96. 0x90, /* VSEN5-8 */
  97. 0x92, /* VSEN9-11 */
  98. 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
  99. 0xa8, /* VSEN12 */
  100. 0xac, /* VSEN13 */
  101. 0x98, /* VSEN14 */
  102. 0x9c, /* VSEN15 */
  103. 0xa0, /* VSEN16 */
  104. 0xa4, /* VSEN17 */
  105. };
  106. #define IN_LSB_REG(index, type) \
  107. (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
  108. : (W83795_REG_IN_HL_LSB[(index)] + 1))
  109. #define IN_LSB_SHIFT 0
  110. #define IN_LSB_IDX 1
  111. static const u8 IN_LSB_SHIFT_IDX[][2] = {
  112. /* High/Low LSB shift, LSB No. */
  113. {0x00, 0x00}, /* VSEN1 */
  114. {0x02, 0x00}, /* VSEN2 */
  115. {0x04, 0x00}, /* VSEN3 */
  116. {0x06, 0x00}, /* VSEN4 */
  117. {0x00, 0x01}, /* VSEN5 */
  118. {0x02, 0x01}, /* VSEN6 */
  119. {0x04, 0x01}, /* VSEN7 */
  120. {0x06, 0x01}, /* VSEN8 */
  121. {0x00, 0x02}, /* VSEN9 */
  122. {0x02, 0x02}, /* VSEN10 */
  123. {0x04, 0x02}, /* VSEN11 */
  124. {0x00, 0x03}, /* VTT */
  125. {0x02, 0x03}, /* 3VDD */
  126. {0x04, 0x03}, /* 3VSB */
  127. {0x06, 0x03}, /* VBAT */
  128. {0x06, 0x04}, /* VSEN12 */
  129. {0x06, 0x05}, /* VSEN13 */
  130. {0x06, 0x06}, /* VSEN14 */
  131. {0x06, 0x07}, /* VSEN15 */
  132. {0x06, 0x08}, /* VSEN16 */
  133. {0x06, 0x09}, /* VSEN17 */
  134. };
  135. #define W83795_REG_FAN(index) (0x2E + (index))
  136. #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
  137. #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
  138. #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
  139. (((index) & 1) ? 4 : 0)
  140. #define W83795_REG_VID_CTRL 0x6A
  141. #define W83795_REG_ALARM_CTRL 0x40
  142. #define ALARM_CTRL_RTSACS (1 << 7)
  143. #define W83795_REG_ALARM(index) (0x41 + (index))
  144. #define W83795_REG_CLR_CHASSIS 0x4D
  145. #define W83795_REG_BEEP(index) (0x50 + (index))
  146. #define W83795_REG_OVT_CFG 0x58
  147. #define OVT_CFG_SEL (1 << 7)
  148. #define W83795_REG_FCMS1 0x201
  149. #define W83795_REG_FCMS2 0x208
  150. #define W83795_REG_TFMR(index) (0x202 + (index))
  151. #define W83795_REG_FOMC 0x20F
  152. #define W83795_REG_TSS(index) (0x209 + (index))
  153. #define TSS_MAP_RESERVED 0xff
  154. static const u8 tss_map[4][6] = {
  155. { 0, 1, 2, 3, 4, 5},
  156. { 6, 7, 8, 9, 0, 1},
  157. {10, 11, 12, 13, 2, 3},
  158. { 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED},
  159. };
  160. #define PWM_OUTPUT 0
  161. #define PWM_FREQ 1
  162. #define PWM_START 2
  163. #define PWM_NONSTOP 3
  164. #define PWM_STOP_TIME 4
  165. #define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
  166. #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
  167. #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
  168. #define W83795_REG_TFTS 0x250
  169. #define TEMP_PWM_TTTI 0
  170. #define TEMP_PWM_CTFS 1
  171. #define TEMP_PWM_HCT 2
  172. #define TEMP_PWM_HOT 3
  173. #define W83795_REG_TTTI(index) (0x260 + (index))
  174. #define W83795_REG_CTFS(index) (0x268 + (index))
  175. #define W83795_REG_HT(index) (0x270 + (index))
  176. #define SF4_TEMP 0
  177. #define SF4_PWM 1
  178. #define W83795_REG_SF4_TEMP(temp_num, index) \
  179. (0x280 + 0x10 * (temp_num) + (index))
  180. #define W83795_REG_SF4_PWM(temp_num, index) \
  181. (0x288 + 0x10 * (temp_num) + (index))
  182. #define W83795_REG_DTSC 0x301
  183. #define W83795_REG_DTSE 0x302
  184. #define W83795_REG_DTS(index) (0x26 + (index))
  185. #define W83795_REG_PECI_TBASE(index) (0x320 + (index))
  186. #define DTS_CRIT 0
  187. #define DTS_CRIT_HYST 1
  188. #define DTS_WARN 2
  189. #define DTS_WARN_HYST 3
  190. #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
  191. #define SETUP_PWM_DEFAULT 0
  192. #define SETUP_PWM_UPTIME 1
  193. #define SETUP_PWM_DOWNTIME 2
  194. #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
  195. static inline u16 in_from_reg(u8 index, u16 val)
  196. {
  197. /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
  198. if (index >= 12 && index <= 14)
  199. return val * 6;
  200. else
  201. return val * 2;
  202. }
  203. static inline u16 in_to_reg(u8 index, u16 val)
  204. {
  205. if (index >= 12 && index <= 14)
  206. return val / 6;
  207. else
  208. return val / 2;
  209. }
  210. static inline unsigned long fan_from_reg(u16 val)
  211. {
  212. if ((val == 0xfff) || (val == 0))
  213. return 0;
  214. return 1350000UL / val;
  215. }
  216. static inline u16 fan_to_reg(long rpm)
  217. {
  218. if (rpm <= 0)
  219. return 0x0fff;
  220. return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
  221. }
  222. static inline unsigned long time_from_reg(u8 reg)
  223. {
  224. return reg * 100;
  225. }
  226. static inline u8 time_to_reg(unsigned long val)
  227. {
  228. return clamp_val((val + 50) / 100, 0, 0xff);
  229. }
  230. static inline long temp_from_reg(s8 reg)
  231. {
  232. return reg * 1000;
  233. }
  234. static inline s8 temp_to_reg(long val, s8 min, s8 max)
  235. {
  236. return clamp_val(val / 1000, min, max);
  237. }
  238. static const u16 pwm_freq_cksel0[16] = {
  239. 1024, 512, 341, 256, 205, 171, 146, 128,
  240. 85, 64, 32, 16, 8, 4, 2, 1
  241. };
  242. static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
  243. {
  244. unsigned long base_clock;
  245. if (reg & 0x80) {
  246. base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
  247. return base_clock / ((reg & 0x7f) + 1);
  248. } else
  249. return pwm_freq_cksel0[reg & 0x0f];
  250. }
  251. static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
  252. {
  253. unsigned long base_clock;
  254. u8 reg0, reg1;
  255. unsigned long best0, best1;
  256. /* Best fit for cksel = 0 */
  257. reg0 = find_closest_descending(val, pwm_freq_cksel0,
  258. ARRAY_SIZE(pwm_freq_cksel0));
  259. if (val < 375) /* cksel = 1 can't beat this */
  260. return reg0;
  261. best0 = pwm_freq_cksel0[reg0];
  262. /* Best fit for cksel = 1 */
  263. base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
  264. reg1 = clamp_val(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
  265. best1 = base_clock / reg1;
  266. reg1 = 0x80 | (reg1 - 1);
  267. /* Choose the closest one */
  268. if (abs(val - best0) > abs(val - best1))
  269. return reg1;
  270. else
  271. return reg0;
  272. }
  273. enum chip_types {w83795g, w83795adg};
  274. struct w83795_data {
  275. struct device *hwmon_dev;
  276. struct mutex update_lock;
  277. unsigned long last_updated; /* In jiffies */
  278. enum chip_types chip_type;
  279. u8 bank;
  280. u32 has_in; /* Enable monitor VIN or not */
  281. u8 has_dyn_in; /* Only in2-0 can have this */
  282. u16 in[21][3]; /* Register value, read/high/low */
  283. u8 in_lsb[10][3]; /* LSB Register value, high/low */
  284. u8 has_gain; /* has gain: in17-20 * 8 */
  285. u16 has_fan; /* Enable fan14-1 or not */
  286. u16 fan[14]; /* Register value combine */
  287. u16 fan_min[14]; /* Register value combine */
  288. u8 has_temp; /* Enable monitor temp6-1 or not */
  289. s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
  290. u8 temp_read_vrlsb[6];
  291. u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
  292. u8 temp_src[3]; /* Register value */
  293. u8 enable_dts; /*
  294. * Enable PECI and SB-TSI,
  295. * bit 0: =1 enable, =0 disable,
  296. * bit 1: =1 AMD SB-TSI, =0 Intel PECI
  297. */
  298. u8 has_dts; /* Enable monitor DTS temp */
  299. s8 dts[8]; /* Register value */
  300. u8 dts_read_vrlsb[8]; /* Register value */
  301. s8 dts_ext[4]; /* Register value */
  302. u8 has_pwm; /*
  303. * 795g supports 8 pwm, 795adg only supports 2,
  304. * no config register, only affected by chip
  305. * type
  306. */
  307. u8 pwm[8][5]; /*
  308. * Register value, output, freq, start,
  309. * non stop, stop time
  310. */
  311. u16 clkin; /* CLKIN frequency in kHz */
  312. u8 pwm_fcms[2]; /* Register value */
  313. u8 pwm_tfmr[6]; /* Register value */
  314. u8 pwm_fomc; /* Register value */
  315. u16 target_speed[8]; /*
  316. * Register value, target speed for speed
  317. * cruise
  318. */
  319. u8 tol_speed; /* tolerance of target speed */
  320. u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
  321. u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
  322. u8 setup_pwm[3]; /* Register value */
  323. u8 alarms[6]; /* Register value */
  324. u8 enable_beep;
  325. u8 beeps[6]; /* Register value */
  326. char valid;
  327. char valid_limits;
  328. char valid_pwm_config;
  329. };
  330. /*
  331. * Hardware access
  332. * We assume that nobdody can change the bank outside the driver.
  333. */
  334. /* Must be called with data->update_lock held, except during initialization */
  335. static int w83795_set_bank(struct i2c_client *client, u8 bank)
  336. {
  337. struct w83795_data *data = i2c_get_clientdata(client);
  338. int err;
  339. /* If the same bank is already set, nothing to do */
  340. if ((data->bank & 0x07) == bank)
  341. return 0;
  342. /* Change to new bank, preserve all other bits */
  343. bank |= data->bank & ~0x07;
  344. err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
  345. if (err < 0) {
  346. dev_err(&client->dev,
  347. "Failed to set bank to %d, err %d\n",
  348. (int)bank, err);
  349. return err;
  350. }
  351. data->bank = bank;
  352. return 0;
  353. }
  354. /* Must be called with data->update_lock held, except during initialization */
  355. static u8 w83795_read(struct i2c_client *client, u16 reg)
  356. {
  357. int err;
  358. err = w83795_set_bank(client, reg >> 8);
  359. if (err < 0)
  360. return 0x00; /* Arbitrary */
  361. err = i2c_smbus_read_byte_data(client, reg & 0xff);
  362. if (err < 0) {
  363. dev_err(&client->dev,
  364. "Failed to read from register 0x%03x, err %d\n",
  365. (int)reg, err);
  366. return 0x00; /* Arbitrary */
  367. }
  368. return err;
  369. }
  370. /* Must be called with data->update_lock held, except during initialization */
  371. static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
  372. {
  373. int err;
  374. err = w83795_set_bank(client, reg >> 8);
  375. if (err < 0)
  376. return err;
  377. err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
  378. if (err < 0)
  379. dev_err(&client->dev,
  380. "Failed to write to register 0x%03x, err %d\n",
  381. (int)reg, err);
  382. return err;
  383. }
  384. static void w83795_update_limits(struct i2c_client *client)
  385. {
  386. struct w83795_data *data = i2c_get_clientdata(client);
  387. int i, limit;
  388. u8 lsb;
  389. /* Read the voltage limits */
  390. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  391. if (!(data->has_in & (1 << i)))
  392. continue;
  393. data->in[i][IN_MAX] =
  394. w83795_read(client, W83795_REG_IN[i][IN_MAX]);
  395. data->in[i][IN_LOW] =
  396. w83795_read(client, W83795_REG_IN[i][IN_LOW]);
  397. }
  398. for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
  399. if ((i == 2 && data->chip_type == w83795adg) ||
  400. (i >= 4 && !(data->has_in & (1 << (i + 11)))))
  401. continue;
  402. data->in_lsb[i][IN_MAX] =
  403. w83795_read(client, IN_LSB_REG(i, IN_MAX));
  404. data->in_lsb[i][IN_LOW] =
  405. w83795_read(client, IN_LSB_REG(i, IN_LOW));
  406. }
  407. /* Read the fan limits */
  408. lsb = 0; /* Silent false gcc warning */
  409. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  410. /*
  411. * Each register contains LSB for 2 fans, but we want to
  412. * read it only once to save time
  413. */
  414. if ((i & 1) == 0 && (data->has_fan & (3 << i)))
  415. lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
  416. if (!(data->has_fan & (1 << i)))
  417. continue;
  418. data->fan_min[i] =
  419. w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
  420. data->fan_min[i] |=
  421. (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
  422. }
  423. /* Read the temperature limits */
  424. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  425. if (!(data->has_temp & (1 << i)))
  426. continue;
  427. for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
  428. data->temp[i][limit] =
  429. w83795_read(client, W83795_REG_TEMP[i][limit]);
  430. }
  431. /* Read the DTS limits */
  432. if (data->enable_dts) {
  433. for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
  434. data->dts_ext[limit] =
  435. w83795_read(client, W83795_REG_DTS_EXT(limit));
  436. }
  437. /* Read beep settings */
  438. if (data->enable_beep) {
  439. for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
  440. data->beeps[i] =
  441. w83795_read(client, W83795_REG_BEEP(i));
  442. }
  443. data->valid_limits = 1;
  444. }
  445. static struct w83795_data *w83795_update_pwm_config(struct device *dev)
  446. {
  447. struct i2c_client *client = to_i2c_client(dev);
  448. struct w83795_data *data = i2c_get_clientdata(client);
  449. int i, tmp;
  450. mutex_lock(&data->update_lock);
  451. if (data->valid_pwm_config)
  452. goto END;
  453. /* Read temperature source selection */
  454. for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
  455. data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
  456. /* Read automatic fan speed control settings */
  457. data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
  458. data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
  459. for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
  460. data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
  461. data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
  462. for (i = 0; i < data->has_pwm; i++) {
  463. for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
  464. data->pwm[i][tmp] =
  465. w83795_read(client, W83795_REG_PWM(i, tmp));
  466. }
  467. for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
  468. data->target_speed[i] =
  469. w83795_read(client, W83795_REG_FTSH(i)) << 4;
  470. data->target_speed[i] |=
  471. w83795_read(client, W83795_REG_FTSL(i)) >> 4;
  472. }
  473. data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
  474. for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
  475. data->pwm_temp[i][TEMP_PWM_TTTI] =
  476. w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
  477. data->pwm_temp[i][TEMP_PWM_CTFS] =
  478. w83795_read(client, W83795_REG_CTFS(i));
  479. tmp = w83795_read(client, W83795_REG_HT(i));
  480. data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
  481. data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
  482. }
  483. /* Read SmartFanIV trip points */
  484. for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
  485. for (tmp = 0; tmp < 7; tmp++) {
  486. data->sf4_reg[i][SF4_TEMP][tmp] =
  487. w83795_read(client,
  488. W83795_REG_SF4_TEMP(i, tmp));
  489. data->sf4_reg[i][SF4_PWM][tmp] =
  490. w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
  491. }
  492. }
  493. /* Read setup PWM */
  494. for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
  495. data->setup_pwm[i] =
  496. w83795_read(client, W83795_REG_SETUP_PWM(i));
  497. data->valid_pwm_config = 1;
  498. END:
  499. mutex_unlock(&data->update_lock);
  500. return data;
  501. }
  502. static struct w83795_data *w83795_update_device(struct device *dev)
  503. {
  504. struct i2c_client *client = to_i2c_client(dev);
  505. struct w83795_data *data = i2c_get_clientdata(client);
  506. u16 tmp;
  507. u8 intrusion;
  508. int i;
  509. mutex_lock(&data->update_lock);
  510. if (!data->valid_limits)
  511. w83795_update_limits(client);
  512. if (!(time_after(jiffies, data->last_updated + HZ * 2)
  513. || !data->valid))
  514. goto END;
  515. /* Update the voltages value */
  516. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  517. if (!(data->has_in & (1 << i)))
  518. continue;
  519. tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
  520. tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
  521. data->in[i][IN_READ] = tmp;
  522. }
  523. /* in0-2 can have dynamic limits (W83795G only) */
  524. if (data->has_dyn_in) {
  525. u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
  526. u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
  527. for (i = 0; i < 3; i++) {
  528. if (!(data->has_dyn_in & (1 << i)))
  529. continue;
  530. data->in[i][IN_MAX] =
  531. w83795_read(client, W83795_REG_IN[i][IN_MAX]);
  532. data->in[i][IN_LOW] =
  533. w83795_read(client, W83795_REG_IN[i][IN_LOW]);
  534. data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
  535. data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
  536. }
  537. }
  538. /* Update fan */
  539. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  540. if (!(data->has_fan & (1 << i)))
  541. continue;
  542. data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
  543. data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
  544. }
  545. /* Update temperature */
  546. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  547. data->temp[i][TEMP_READ] =
  548. w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
  549. data->temp_read_vrlsb[i] =
  550. w83795_read(client, W83795_REG_VRLSB);
  551. }
  552. /* Update dts temperature */
  553. if (data->enable_dts) {
  554. for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
  555. if (!(data->has_dts & (1 << i)))
  556. continue;
  557. data->dts[i] =
  558. w83795_read(client, W83795_REG_DTS(i));
  559. data->dts_read_vrlsb[i] =
  560. w83795_read(client, W83795_REG_VRLSB);
  561. }
  562. }
  563. /* Update pwm output */
  564. for (i = 0; i < data->has_pwm; i++) {
  565. data->pwm[i][PWM_OUTPUT] =
  566. w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
  567. }
  568. /*
  569. * Update intrusion and alarms
  570. * It is important to read intrusion first, because reading from
  571. * register SMI STS6 clears the interrupt status temporarily.
  572. */
  573. tmp = w83795_read(client, W83795_REG_ALARM_CTRL);
  574. /* Switch to interrupt status for intrusion if needed */
  575. if (tmp & ALARM_CTRL_RTSACS)
  576. w83795_write(client, W83795_REG_ALARM_CTRL,
  577. tmp & ~ALARM_CTRL_RTSACS);
  578. intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6);
  579. /* Switch to real-time alarms */
  580. w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS);
  581. for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
  582. data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
  583. data->alarms[5] |= intrusion;
  584. /* Restore original configuration if needed */
  585. if (!(tmp & ALARM_CTRL_RTSACS))
  586. w83795_write(client, W83795_REG_ALARM_CTRL,
  587. tmp & ~ALARM_CTRL_RTSACS);
  588. data->last_updated = jiffies;
  589. data->valid = 1;
  590. END:
  591. mutex_unlock(&data->update_lock);
  592. return data;
  593. }
  594. /*
  595. * Sysfs attributes
  596. */
  597. #define ALARM_STATUS 0
  598. #define BEEP_ENABLE 1
  599. static ssize_t
  600. show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
  601. {
  602. struct w83795_data *data = w83795_update_device(dev);
  603. struct sensor_device_attribute_2 *sensor_attr =
  604. to_sensor_dev_attr_2(attr);
  605. int nr = sensor_attr->nr;
  606. int index = sensor_attr->index >> 3;
  607. int bit = sensor_attr->index & 0x07;
  608. u8 val;
  609. if (nr == ALARM_STATUS)
  610. val = (data->alarms[index] >> bit) & 1;
  611. else /* BEEP_ENABLE */
  612. val = (data->beeps[index] >> bit) & 1;
  613. return sprintf(buf, "%u\n", val);
  614. }
  615. static ssize_t
  616. store_beep(struct device *dev, struct device_attribute *attr,
  617. const char *buf, size_t count)
  618. {
  619. struct i2c_client *client = to_i2c_client(dev);
  620. struct w83795_data *data = i2c_get_clientdata(client);
  621. struct sensor_device_attribute_2 *sensor_attr =
  622. to_sensor_dev_attr_2(attr);
  623. int index = sensor_attr->index >> 3;
  624. int shift = sensor_attr->index & 0x07;
  625. u8 beep_bit = 1 << shift;
  626. unsigned long val;
  627. if (kstrtoul(buf, 10, &val) < 0)
  628. return -EINVAL;
  629. if (val != 0 && val != 1)
  630. return -EINVAL;
  631. mutex_lock(&data->update_lock);
  632. data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
  633. data->beeps[index] &= ~beep_bit;
  634. data->beeps[index] |= val << shift;
  635. w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
  636. mutex_unlock(&data->update_lock);
  637. return count;
  638. }
  639. /* Write 0 to clear chassis alarm */
  640. static ssize_t
  641. store_chassis_clear(struct device *dev,
  642. struct device_attribute *attr, const char *buf,
  643. size_t count)
  644. {
  645. struct i2c_client *client = to_i2c_client(dev);
  646. struct w83795_data *data = i2c_get_clientdata(client);
  647. unsigned long val;
  648. if (kstrtoul(buf, 10, &val) < 0 || val != 0)
  649. return -EINVAL;
  650. mutex_lock(&data->update_lock);
  651. val = w83795_read(client, W83795_REG_CLR_CHASSIS);
  652. val |= 0x80;
  653. w83795_write(client, W83795_REG_CLR_CHASSIS, val);
  654. /* Clear status and force cache refresh */
  655. w83795_read(client, W83795_REG_ALARM(5));
  656. data->valid = 0;
  657. mutex_unlock(&data->update_lock);
  658. return count;
  659. }
  660. #define FAN_INPUT 0
  661. #define FAN_MIN 1
  662. static ssize_t
  663. show_fan(struct device *dev, struct device_attribute *attr, char *buf)
  664. {
  665. struct sensor_device_attribute_2 *sensor_attr =
  666. to_sensor_dev_attr_2(attr);
  667. int nr = sensor_attr->nr;
  668. int index = sensor_attr->index;
  669. struct w83795_data *data = w83795_update_device(dev);
  670. u16 val;
  671. if (nr == FAN_INPUT)
  672. val = data->fan[index] & 0x0fff;
  673. else
  674. val = data->fan_min[index] & 0x0fff;
  675. return sprintf(buf, "%lu\n", fan_from_reg(val));
  676. }
  677. static ssize_t
  678. store_fan_min(struct device *dev, struct device_attribute *attr,
  679. const char *buf, size_t count)
  680. {
  681. struct sensor_device_attribute_2 *sensor_attr =
  682. to_sensor_dev_attr_2(attr);
  683. int index = sensor_attr->index;
  684. struct i2c_client *client = to_i2c_client(dev);
  685. struct w83795_data *data = i2c_get_clientdata(client);
  686. unsigned long val;
  687. if (kstrtoul(buf, 10, &val))
  688. return -EINVAL;
  689. val = fan_to_reg(val);
  690. mutex_lock(&data->update_lock);
  691. data->fan_min[index] = val;
  692. w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
  693. val &= 0x0f;
  694. if (index & 1) {
  695. val <<= 4;
  696. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  697. & 0x0f;
  698. } else {
  699. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  700. & 0xf0;
  701. }
  702. w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
  703. mutex_unlock(&data->update_lock);
  704. return count;
  705. }
  706. static ssize_t
  707. show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  708. {
  709. struct w83795_data *data;
  710. struct sensor_device_attribute_2 *sensor_attr =
  711. to_sensor_dev_attr_2(attr);
  712. int nr = sensor_attr->nr;
  713. int index = sensor_attr->index;
  714. unsigned int val;
  715. data = nr == PWM_OUTPUT ? w83795_update_device(dev)
  716. : w83795_update_pwm_config(dev);
  717. switch (nr) {
  718. case PWM_STOP_TIME:
  719. val = time_from_reg(data->pwm[index][nr]);
  720. break;
  721. case PWM_FREQ:
  722. val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
  723. break;
  724. default:
  725. val = data->pwm[index][nr];
  726. break;
  727. }
  728. return sprintf(buf, "%u\n", val);
  729. }
  730. static ssize_t
  731. store_pwm(struct device *dev, struct device_attribute *attr,
  732. const char *buf, size_t count)
  733. {
  734. struct i2c_client *client = to_i2c_client(dev);
  735. struct w83795_data *data = i2c_get_clientdata(client);
  736. struct sensor_device_attribute_2 *sensor_attr =
  737. to_sensor_dev_attr_2(attr);
  738. int nr = sensor_attr->nr;
  739. int index = sensor_attr->index;
  740. unsigned long val;
  741. if (kstrtoul(buf, 10, &val) < 0)
  742. return -EINVAL;
  743. mutex_lock(&data->update_lock);
  744. switch (nr) {
  745. case PWM_STOP_TIME:
  746. val = time_to_reg(val);
  747. break;
  748. case PWM_FREQ:
  749. val = pwm_freq_to_reg(val, data->clkin);
  750. break;
  751. default:
  752. val = clamp_val(val, 0, 0xff);
  753. break;
  754. }
  755. w83795_write(client, W83795_REG_PWM(index, nr), val);
  756. data->pwm[index][nr] = val;
  757. mutex_unlock(&data->update_lock);
  758. return count;
  759. }
  760. static ssize_t
  761. show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
  762. {
  763. struct sensor_device_attribute_2 *sensor_attr =
  764. to_sensor_dev_attr_2(attr);
  765. struct w83795_data *data = w83795_update_pwm_config(dev);
  766. int index = sensor_attr->index;
  767. u8 tmp;
  768. /* Speed cruise mode */
  769. if (data->pwm_fcms[0] & (1 << index)) {
  770. tmp = 2;
  771. goto out;
  772. }
  773. /* Thermal cruise or SmartFan IV mode */
  774. for (tmp = 0; tmp < 6; tmp++) {
  775. if (data->pwm_tfmr[tmp] & (1 << index)) {
  776. tmp = 3;
  777. goto out;
  778. }
  779. }
  780. /* Manual mode */
  781. tmp = 1;
  782. out:
  783. return sprintf(buf, "%u\n", tmp);
  784. }
  785. static ssize_t
  786. store_pwm_enable(struct device *dev, struct device_attribute *attr,
  787. const char *buf, size_t count)
  788. {
  789. struct i2c_client *client = to_i2c_client(dev);
  790. struct w83795_data *data = w83795_update_pwm_config(dev);
  791. struct sensor_device_attribute_2 *sensor_attr =
  792. to_sensor_dev_attr_2(attr);
  793. int index = sensor_attr->index;
  794. unsigned long val;
  795. int i;
  796. if (kstrtoul(buf, 10, &val) < 0)
  797. return -EINVAL;
  798. if (val < 1 || val > 2)
  799. return -EINVAL;
  800. #ifndef CONFIG_SENSORS_W83795_FANCTRL
  801. if (val > 1) {
  802. dev_warn(dev, "Automatic fan speed control support disabled\n");
  803. dev_warn(dev, "Build with CONFIG_SENSORS_W83795_FANCTRL=y if you want it\n");
  804. return -EOPNOTSUPP;
  805. }
  806. #endif
  807. mutex_lock(&data->update_lock);
  808. switch (val) {
  809. case 1:
  810. /* Clear speed cruise mode bits */
  811. data->pwm_fcms[0] &= ~(1 << index);
  812. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  813. /* Clear thermal cruise mode bits */
  814. for (i = 0; i < 6; i++) {
  815. data->pwm_tfmr[i] &= ~(1 << index);
  816. w83795_write(client, W83795_REG_TFMR(i),
  817. data->pwm_tfmr[i]);
  818. }
  819. break;
  820. case 2:
  821. data->pwm_fcms[0] |= (1 << index);
  822. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  823. break;
  824. }
  825. mutex_unlock(&data->update_lock);
  826. return count;
  827. }
  828. static ssize_t
  829. show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
  830. {
  831. struct w83795_data *data = w83795_update_pwm_config(dev);
  832. int index = to_sensor_dev_attr_2(attr)->index;
  833. unsigned int mode;
  834. if (data->pwm_fomc & (1 << index))
  835. mode = 0; /* DC */
  836. else
  837. mode = 1; /* PWM */
  838. return sprintf(buf, "%u\n", mode);
  839. }
  840. /*
  841. * Check whether a given temperature source can ever be useful.
  842. * Returns the number of selectable temperature channels which are
  843. * enabled.
  844. */
  845. static int w83795_tss_useful(const struct w83795_data *data, int tsrc)
  846. {
  847. int useful = 0, i;
  848. for (i = 0; i < 4; i++) {
  849. if (tss_map[i][tsrc] == TSS_MAP_RESERVED)
  850. continue;
  851. if (tss_map[i][tsrc] < 6) /* Analog */
  852. useful += (data->has_temp >> tss_map[i][tsrc]) & 1;
  853. else /* Digital */
  854. useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1;
  855. }
  856. return useful;
  857. }
  858. static ssize_t
  859. show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
  860. {
  861. struct sensor_device_attribute_2 *sensor_attr =
  862. to_sensor_dev_attr_2(attr);
  863. struct w83795_data *data = w83795_update_pwm_config(dev);
  864. int index = sensor_attr->index;
  865. u8 tmp = data->temp_src[index / 2];
  866. if (index & 1)
  867. tmp >>= 4; /* Pick high nibble */
  868. else
  869. tmp &= 0x0f; /* Pick low nibble */
  870. /* Look-up the actual temperature channel number */
  871. if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED)
  872. return -EINVAL; /* Shouldn't happen */
  873. return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1);
  874. }
  875. static ssize_t
  876. store_temp_src(struct device *dev, struct device_attribute *attr,
  877. const char *buf, size_t count)
  878. {
  879. struct i2c_client *client = to_i2c_client(dev);
  880. struct w83795_data *data = w83795_update_pwm_config(dev);
  881. struct sensor_device_attribute_2 *sensor_attr =
  882. to_sensor_dev_attr_2(attr);
  883. int index = sensor_attr->index;
  884. int tmp;
  885. unsigned long channel;
  886. u8 val = index / 2;
  887. if (kstrtoul(buf, 10, &channel) < 0 ||
  888. channel < 1 || channel > 14)
  889. return -EINVAL;
  890. /* Check if request can be fulfilled */
  891. for (tmp = 0; tmp < 4; tmp++) {
  892. if (tss_map[tmp][index] == channel - 1)
  893. break;
  894. }
  895. if (tmp == 4) /* No match */
  896. return -EINVAL;
  897. mutex_lock(&data->update_lock);
  898. if (index & 1) {
  899. tmp <<= 4;
  900. data->temp_src[val] &= 0x0f;
  901. } else {
  902. data->temp_src[val] &= 0xf0;
  903. }
  904. data->temp_src[val] |= tmp;
  905. w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
  906. mutex_unlock(&data->update_lock);
  907. return count;
  908. }
  909. #define TEMP_PWM_ENABLE 0
  910. #define TEMP_PWM_FAN_MAP 1
  911. static ssize_t
  912. show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  913. char *buf)
  914. {
  915. struct w83795_data *data = w83795_update_pwm_config(dev);
  916. struct sensor_device_attribute_2 *sensor_attr =
  917. to_sensor_dev_attr_2(attr);
  918. int nr = sensor_attr->nr;
  919. int index = sensor_attr->index;
  920. u8 tmp = 0xff;
  921. switch (nr) {
  922. case TEMP_PWM_ENABLE:
  923. tmp = (data->pwm_fcms[1] >> index) & 1;
  924. if (tmp)
  925. tmp = 4;
  926. else
  927. tmp = 3;
  928. break;
  929. case TEMP_PWM_FAN_MAP:
  930. tmp = data->pwm_tfmr[index];
  931. break;
  932. }
  933. return sprintf(buf, "%u\n", tmp);
  934. }
  935. static ssize_t
  936. store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  937. const char *buf, size_t count)
  938. {
  939. struct i2c_client *client = to_i2c_client(dev);
  940. struct w83795_data *data = w83795_update_pwm_config(dev);
  941. struct sensor_device_attribute_2 *sensor_attr =
  942. to_sensor_dev_attr_2(attr);
  943. int nr = sensor_attr->nr;
  944. int index = sensor_attr->index;
  945. unsigned long tmp;
  946. if (kstrtoul(buf, 10, &tmp) < 0)
  947. return -EINVAL;
  948. switch (nr) {
  949. case TEMP_PWM_ENABLE:
  950. if (tmp != 3 && tmp != 4)
  951. return -EINVAL;
  952. tmp -= 3;
  953. mutex_lock(&data->update_lock);
  954. data->pwm_fcms[1] &= ~(1 << index);
  955. data->pwm_fcms[1] |= tmp << index;
  956. w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
  957. mutex_unlock(&data->update_lock);
  958. break;
  959. case TEMP_PWM_FAN_MAP:
  960. mutex_lock(&data->update_lock);
  961. tmp = clamp_val(tmp, 0, 0xff);
  962. w83795_write(client, W83795_REG_TFMR(index), tmp);
  963. data->pwm_tfmr[index] = tmp;
  964. mutex_unlock(&data->update_lock);
  965. break;
  966. }
  967. return count;
  968. }
  969. #define FANIN_TARGET 0
  970. #define FANIN_TOL 1
  971. static ssize_t
  972. show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
  973. {
  974. struct w83795_data *data = w83795_update_pwm_config(dev);
  975. struct sensor_device_attribute_2 *sensor_attr =
  976. to_sensor_dev_attr_2(attr);
  977. int nr = sensor_attr->nr;
  978. int index = sensor_attr->index;
  979. u16 tmp = 0;
  980. switch (nr) {
  981. case FANIN_TARGET:
  982. tmp = fan_from_reg(data->target_speed[index]);
  983. break;
  984. case FANIN_TOL:
  985. tmp = data->tol_speed;
  986. break;
  987. }
  988. return sprintf(buf, "%u\n", tmp);
  989. }
  990. static ssize_t
  991. store_fanin(struct device *dev, struct device_attribute *attr,
  992. const char *buf, size_t count)
  993. {
  994. struct i2c_client *client = to_i2c_client(dev);
  995. struct w83795_data *data = i2c_get_clientdata(client);
  996. struct sensor_device_attribute_2 *sensor_attr =
  997. to_sensor_dev_attr_2(attr);
  998. int nr = sensor_attr->nr;
  999. int index = sensor_attr->index;
  1000. unsigned long val;
  1001. if (kstrtoul(buf, 10, &val) < 0)
  1002. return -EINVAL;
  1003. mutex_lock(&data->update_lock);
  1004. switch (nr) {
  1005. case FANIN_TARGET:
  1006. val = fan_to_reg(clamp_val(val, 0, 0xfff));
  1007. w83795_write(client, W83795_REG_FTSH(index), val >> 4);
  1008. w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
  1009. data->target_speed[index] = val;
  1010. break;
  1011. case FANIN_TOL:
  1012. val = clamp_val(val, 0, 0x3f);
  1013. w83795_write(client, W83795_REG_TFTS, val);
  1014. data->tol_speed = val;
  1015. break;
  1016. }
  1017. mutex_unlock(&data->update_lock);
  1018. return count;
  1019. }
  1020. static ssize_t
  1021. show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  1022. {
  1023. struct w83795_data *data = w83795_update_pwm_config(dev);
  1024. struct sensor_device_attribute_2 *sensor_attr =
  1025. to_sensor_dev_attr_2(attr);
  1026. int nr = sensor_attr->nr;
  1027. int index = sensor_attr->index;
  1028. long tmp = temp_from_reg(data->pwm_temp[index][nr]);
  1029. return sprintf(buf, "%ld\n", tmp);
  1030. }
  1031. static ssize_t
  1032. store_temp_pwm(struct device *dev, struct device_attribute *attr,
  1033. const char *buf, size_t count)
  1034. {
  1035. struct i2c_client *client = to_i2c_client(dev);
  1036. struct w83795_data *data = i2c_get_clientdata(client);
  1037. struct sensor_device_attribute_2 *sensor_attr =
  1038. to_sensor_dev_attr_2(attr);
  1039. int nr = sensor_attr->nr;
  1040. int index = sensor_attr->index;
  1041. unsigned long val;
  1042. u8 tmp;
  1043. if (kstrtoul(buf, 10, &val) < 0)
  1044. return -EINVAL;
  1045. val /= 1000;
  1046. mutex_lock(&data->update_lock);
  1047. switch (nr) {
  1048. case TEMP_PWM_TTTI:
  1049. val = clamp_val(val, 0, 0x7f);
  1050. w83795_write(client, W83795_REG_TTTI(index), val);
  1051. break;
  1052. case TEMP_PWM_CTFS:
  1053. val = clamp_val(val, 0, 0x7f);
  1054. w83795_write(client, W83795_REG_CTFS(index), val);
  1055. break;
  1056. case TEMP_PWM_HCT:
  1057. val = clamp_val(val, 0, 0x0f);
  1058. tmp = w83795_read(client, W83795_REG_HT(index));
  1059. tmp &= 0x0f;
  1060. tmp |= (val << 4) & 0xf0;
  1061. w83795_write(client, W83795_REG_HT(index), tmp);
  1062. break;
  1063. case TEMP_PWM_HOT:
  1064. val = clamp_val(val, 0, 0x0f);
  1065. tmp = w83795_read(client, W83795_REG_HT(index));
  1066. tmp &= 0xf0;
  1067. tmp |= val & 0x0f;
  1068. w83795_write(client, W83795_REG_HT(index), tmp);
  1069. break;
  1070. }
  1071. data->pwm_temp[index][nr] = val;
  1072. mutex_unlock(&data->update_lock);
  1073. return count;
  1074. }
  1075. static ssize_t
  1076. show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  1077. {
  1078. struct w83795_data *data = w83795_update_pwm_config(dev);
  1079. struct sensor_device_attribute_2 *sensor_attr =
  1080. to_sensor_dev_attr_2(attr);
  1081. int nr = sensor_attr->nr;
  1082. int index = sensor_attr->index;
  1083. return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
  1084. }
  1085. static ssize_t
  1086. store_sf4_pwm(struct device *dev, struct device_attribute *attr,
  1087. const char *buf, size_t count)
  1088. {
  1089. struct i2c_client *client = to_i2c_client(dev);
  1090. struct w83795_data *data = i2c_get_clientdata(client);
  1091. struct sensor_device_attribute_2 *sensor_attr =
  1092. to_sensor_dev_attr_2(attr);
  1093. int nr = sensor_attr->nr;
  1094. int index = sensor_attr->index;
  1095. unsigned long val;
  1096. if (kstrtoul(buf, 10, &val) < 0)
  1097. return -EINVAL;
  1098. mutex_lock(&data->update_lock);
  1099. w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
  1100. data->sf4_reg[index][SF4_PWM][nr] = val;
  1101. mutex_unlock(&data->update_lock);
  1102. return count;
  1103. }
  1104. static ssize_t
  1105. show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
  1106. {
  1107. struct w83795_data *data = w83795_update_pwm_config(dev);
  1108. struct sensor_device_attribute_2 *sensor_attr =
  1109. to_sensor_dev_attr_2(attr);
  1110. int nr = sensor_attr->nr;
  1111. int index = sensor_attr->index;
  1112. return sprintf(buf, "%u\n",
  1113. (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
  1114. }
  1115. static ssize_t
  1116. store_sf4_temp(struct device *dev, struct device_attribute *attr,
  1117. const char *buf, size_t count)
  1118. {
  1119. struct i2c_client *client = to_i2c_client(dev);
  1120. struct w83795_data *data = i2c_get_clientdata(client);
  1121. struct sensor_device_attribute_2 *sensor_attr =
  1122. to_sensor_dev_attr_2(attr);
  1123. int nr = sensor_attr->nr;
  1124. int index = sensor_attr->index;
  1125. unsigned long val;
  1126. if (kstrtoul(buf, 10, &val) < 0)
  1127. return -EINVAL;
  1128. val /= 1000;
  1129. mutex_lock(&data->update_lock);
  1130. w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
  1131. data->sf4_reg[index][SF4_TEMP][nr] = val;
  1132. mutex_unlock(&data->update_lock);
  1133. return count;
  1134. }
  1135. static ssize_t
  1136. show_temp(struct device *dev, struct device_attribute *attr, char *buf)
  1137. {
  1138. struct sensor_device_attribute_2 *sensor_attr =
  1139. to_sensor_dev_attr_2(attr);
  1140. int nr = sensor_attr->nr;
  1141. int index = sensor_attr->index;
  1142. struct w83795_data *data = w83795_update_device(dev);
  1143. long temp = temp_from_reg(data->temp[index][nr]);
  1144. if (nr == TEMP_READ)
  1145. temp += (data->temp_read_vrlsb[index] >> 6) * 250;
  1146. return sprintf(buf, "%ld\n", temp);
  1147. }
  1148. static ssize_t
  1149. store_temp(struct device *dev, struct device_attribute *attr,
  1150. const char *buf, size_t count)
  1151. {
  1152. struct sensor_device_attribute_2 *sensor_attr =
  1153. to_sensor_dev_attr_2(attr);
  1154. int nr = sensor_attr->nr;
  1155. int index = sensor_attr->index;
  1156. struct i2c_client *client = to_i2c_client(dev);
  1157. struct w83795_data *data = i2c_get_clientdata(client);
  1158. long tmp;
  1159. if (kstrtol(buf, 10, &tmp) < 0)
  1160. return -EINVAL;
  1161. mutex_lock(&data->update_lock);
  1162. data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
  1163. w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
  1164. mutex_unlock(&data->update_lock);
  1165. return count;
  1166. }
  1167. static ssize_t
  1168. show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1169. {
  1170. struct w83795_data *data = dev_get_drvdata(dev);
  1171. int tmp;
  1172. if (data->enable_dts & 2)
  1173. tmp = 5;
  1174. else
  1175. tmp = 6;
  1176. return sprintf(buf, "%d\n", tmp);
  1177. }
  1178. static ssize_t
  1179. show_dts(struct device *dev, struct device_attribute *attr, char *buf)
  1180. {
  1181. struct sensor_device_attribute_2 *sensor_attr =
  1182. to_sensor_dev_attr_2(attr);
  1183. int index = sensor_attr->index;
  1184. struct w83795_data *data = w83795_update_device(dev);
  1185. long temp = temp_from_reg(data->dts[index]);
  1186. temp += (data->dts_read_vrlsb[index] >> 6) * 250;
  1187. return sprintf(buf, "%ld\n", temp);
  1188. }
  1189. static ssize_t
  1190. show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
  1191. {
  1192. struct sensor_device_attribute_2 *sensor_attr =
  1193. to_sensor_dev_attr_2(attr);
  1194. int nr = sensor_attr->nr;
  1195. struct w83795_data *data = dev_get_drvdata(dev);
  1196. long temp = temp_from_reg(data->dts_ext[nr]);
  1197. return sprintf(buf, "%ld\n", temp);
  1198. }
  1199. static ssize_t
  1200. store_dts_ext(struct device *dev, struct device_attribute *attr,
  1201. const char *buf, size_t count)
  1202. {
  1203. struct sensor_device_attribute_2 *sensor_attr =
  1204. to_sensor_dev_attr_2(attr);
  1205. int nr = sensor_attr->nr;
  1206. struct i2c_client *client = to_i2c_client(dev);
  1207. struct w83795_data *data = i2c_get_clientdata(client);
  1208. long tmp;
  1209. if (kstrtol(buf, 10, &tmp) < 0)
  1210. return -EINVAL;
  1211. mutex_lock(&data->update_lock);
  1212. data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
  1213. w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
  1214. mutex_unlock(&data->update_lock);
  1215. return count;
  1216. }
  1217. static ssize_t
  1218. show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1219. {
  1220. struct w83795_data *data = dev_get_drvdata(dev);
  1221. struct sensor_device_attribute_2 *sensor_attr =
  1222. to_sensor_dev_attr_2(attr);
  1223. int index = sensor_attr->index;
  1224. int tmp;
  1225. if (data->temp_mode & (1 << index))
  1226. tmp = 3; /* Thermal diode */
  1227. else
  1228. tmp = 4; /* Thermistor */
  1229. return sprintf(buf, "%d\n", tmp);
  1230. }
  1231. /* Only for temp1-4 (temp5-6 can only be thermistor) */
  1232. static ssize_t
  1233. store_temp_mode(struct device *dev, struct device_attribute *attr,
  1234. const char *buf, size_t count)
  1235. {
  1236. struct i2c_client *client = to_i2c_client(dev);
  1237. struct w83795_data *data = i2c_get_clientdata(client);
  1238. struct sensor_device_attribute_2 *sensor_attr =
  1239. to_sensor_dev_attr_2(attr);
  1240. int index = sensor_attr->index;
  1241. int reg_shift;
  1242. unsigned long val;
  1243. u8 tmp;
  1244. if (kstrtoul(buf, 10, &val) < 0)
  1245. return -EINVAL;
  1246. if ((val != 4) && (val != 3))
  1247. return -EINVAL;
  1248. mutex_lock(&data->update_lock);
  1249. if (val == 3) {
  1250. /* Thermal diode */
  1251. val = 0x01;
  1252. data->temp_mode |= 1 << index;
  1253. } else if (val == 4) {
  1254. /* Thermistor */
  1255. val = 0x03;
  1256. data->temp_mode &= ~(1 << index);
  1257. }
  1258. reg_shift = 2 * index;
  1259. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1260. tmp &= ~(0x03 << reg_shift);
  1261. tmp |= val << reg_shift;
  1262. w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
  1263. mutex_unlock(&data->update_lock);
  1264. return count;
  1265. }
  1266. /* show/store VIN */
  1267. static ssize_t
  1268. show_in(struct device *dev, struct device_attribute *attr, char *buf)
  1269. {
  1270. struct sensor_device_attribute_2 *sensor_attr =
  1271. to_sensor_dev_attr_2(attr);
  1272. int nr = sensor_attr->nr;
  1273. int index = sensor_attr->index;
  1274. struct w83795_data *data = w83795_update_device(dev);
  1275. u16 val = data->in[index][nr];
  1276. u8 lsb_idx;
  1277. switch (nr) {
  1278. case IN_READ:
  1279. /* calculate this value again by sensors as sensors3.conf */
  1280. if ((index >= 17) &&
  1281. !((data->has_gain >> (index - 17)) & 1))
  1282. val *= 8;
  1283. break;
  1284. case IN_MAX:
  1285. case IN_LOW:
  1286. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1287. val <<= 2;
  1288. val |= (data->in_lsb[lsb_idx][nr] >>
  1289. IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
  1290. if ((index >= 17) &&
  1291. !((data->has_gain >> (index - 17)) & 1))
  1292. val *= 8;
  1293. break;
  1294. }
  1295. val = in_from_reg(index, val);
  1296. return sprintf(buf, "%d\n", val);
  1297. }
  1298. static ssize_t
  1299. store_in(struct device *dev, struct device_attribute *attr,
  1300. const char *buf, size_t count)
  1301. {
  1302. struct sensor_device_attribute_2 *sensor_attr =
  1303. to_sensor_dev_attr_2(attr);
  1304. int nr = sensor_attr->nr;
  1305. int index = sensor_attr->index;
  1306. struct i2c_client *client = to_i2c_client(dev);
  1307. struct w83795_data *data = i2c_get_clientdata(client);
  1308. unsigned long val;
  1309. u8 tmp;
  1310. u8 lsb_idx;
  1311. if (kstrtoul(buf, 10, &val) < 0)
  1312. return -EINVAL;
  1313. val = in_to_reg(index, val);
  1314. if ((index >= 17) &&
  1315. !((data->has_gain >> (index - 17)) & 1))
  1316. val /= 8;
  1317. val = clamp_val(val, 0, 0x3FF);
  1318. mutex_lock(&data->update_lock);
  1319. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1320. tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
  1321. tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
  1322. tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
  1323. w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
  1324. data->in_lsb[lsb_idx][nr] = tmp;
  1325. tmp = (val >> 2) & 0xff;
  1326. w83795_write(client, W83795_REG_IN[index][nr], tmp);
  1327. data->in[index][nr] = tmp;
  1328. mutex_unlock(&data->update_lock);
  1329. return count;
  1330. }
  1331. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1332. static ssize_t
  1333. show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
  1334. {
  1335. struct sensor_device_attribute_2 *sensor_attr =
  1336. to_sensor_dev_attr_2(attr);
  1337. int nr = sensor_attr->nr;
  1338. struct w83795_data *data = w83795_update_pwm_config(dev);
  1339. u16 val = data->setup_pwm[nr];
  1340. switch (nr) {
  1341. case SETUP_PWM_UPTIME:
  1342. case SETUP_PWM_DOWNTIME:
  1343. val = time_from_reg(val);
  1344. break;
  1345. }
  1346. return sprintf(buf, "%d\n", val);
  1347. }
  1348. static ssize_t
  1349. store_sf_setup(struct device *dev, struct device_attribute *attr,
  1350. const char *buf, size_t count)
  1351. {
  1352. struct sensor_device_attribute_2 *sensor_attr =
  1353. to_sensor_dev_attr_2(attr);
  1354. int nr = sensor_attr->nr;
  1355. struct i2c_client *client = to_i2c_client(dev);
  1356. struct w83795_data *data = i2c_get_clientdata(client);
  1357. unsigned long val;
  1358. if (kstrtoul(buf, 10, &val) < 0)
  1359. return -EINVAL;
  1360. switch (nr) {
  1361. case SETUP_PWM_DEFAULT:
  1362. val = clamp_val(val, 0, 0xff);
  1363. break;
  1364. case SETUP_PWM_UPTIME:
  1365. case SETUP_PWM_DOWNTIME:
  1366. val = time_to_reg(val);
  1367. if (val == 0)
  1368. return -EINVAL;
  1369. break;
  1370. }
  1371. mutex_lock(&data->update_lock);
  1372. data->setup_pwm[nr] = val;
  1373. w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
  1374. mutex_unlock(&data->update_lock);
  1375. return count;
  1376. }
  1377. #endif
  1378. #define NOT_USED -1
  1379. /*
  1380. * Don't change the attribute order, _max, _min and _beep are accessed by index
  1381. * somewhere else in the code
  1382. */
  1383. #define SENSOR_ATTR_IN(index) { \
  1384. SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
  1385. IN_READ, index), \
  1386. SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
  1387. store_in, IN_MAX, index), \
  1388. SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
  1389. store_in, IN_LOW, index), \
  1390. SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
  1391. NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
  1392. SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
  1393. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1394. index + ((index > 14) ? 1 : 0)) }
  1395. /*
  1396. * Don't change the attribute order, _beep is accessed by index
  1397. * somewhere else in the code
  1398. */
  1399. #define SENSOR_ATTR_FAN(index) { \
  1400. SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
  1401. NULL, FAN_INPUT, index - 1), \
  1402. SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
  1403. show_fan, store_fan_min, FAN_MIN, index - 1), \
  1404. SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
  1405. NULL, ALARM_STATUS, index + 31), \
  1406. SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
  1407. show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
  1408. #define SENSOR_ATTR_PWM(index) { \
  1409. SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
  1410. store_pwm, PWM_OUTPUT, index - 1), \
  1411. SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
  1412. show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
  1413. SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \
  1414. show_pwm_mode, NULL, NOT_USED, index - 1), \
  1415. SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
  1416. show_pwm, store_pwm, PWM_FREQ, index - 1), \
  1417. SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
  1418. show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
  1419. SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
  1420. show_pwm, store_pwm, PWM_START, index - 1), \
  1421. SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
  1422. show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
  1423. SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
  1424. show_fanin, store_fanin, FANIN_TARGET, index - 1) }
  1425. /*
  1426. * Don't change the attribute order, _beep is accessed by index
  1427. * somewhere else in the code
  1428. */
  1429. #define SENSOR_ATTR_DTS(index) { \
  1430. SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
  1431. show_dts_mode, NULL, NOT_USED, index - 7), \
  1432. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
  1433. NULL, NOT_USED, index - 7), \
  1434. SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
  1435. store_dts_ext, DTS_CRIT, NOT_USED), \
  1436. SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
  1437. show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
  1438. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
  1439. store_dts_ext, DTS_WARN, NOT_USED), \
  1440. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1441. show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
  1442. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1443. show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
  1444. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1445. show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
  1446. /*
  1447. * Don't change the attribute order, _beep is accessed by index
  1448. * somewhere else in the code
  1449. */
  1450. #define SENSOR_ATTR_TEMP(index) { \
  1451. SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 5 ? S_IWUSR : 0), \
  1452. show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
  1453. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
  1454. NULL, TEMP_READ, index - 1), \
  1455. SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
  1456. store_temp, TEMP_CRIT, index - 1), \
  1457. SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
  1458. show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
  1459. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
  1460. store_temp, TEMP_WARN, index - 1), \
  1461. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1462. show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
  1463. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1464. show_alarm_beep, NULL, ALARM_STATUS, \
  1465. index + (index > 4 ? 11 : 17)), \
  1466. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1467. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1468. index + (index > 4 ? 11 : 17)), \
  1469. SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
  1470. show_temp_pwm_enable, store_temp_pwm_enable, \
  1471. TEMP_PWM_ENABLE, index - 1), \
  1472. SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
  1473. show_temp_pwm_enable, store_temp_pwm_enable, \
  1474. TEMP_PWM_FAN_MAP, index - 1), \
  1475. SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
  1476. show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
  1477. SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
  1478. show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
  1479. SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
  1480. show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
  1481. SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
  1482. show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
  1483. SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
  1484. show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
  1485. SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
  1486. show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
  1487. SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
  1488. show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
  1489. SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
  1490. show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
  1491. SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
  1492. show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
  1493. SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
  1494. show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
  1495. SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
  1496. show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
  1497. SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
  1498. show_sf4_temp, store_sf4_temp, 0, index - 1), \
  1499. SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
  1500. show_sf4_temp, store_sf4_temp, 1, index - 1), \
  1501. SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
  1502. show_sf4_temp, store_sf4_temp, 2, index - 1), \
  1503. SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
  1504. show_sf4_temp, store_sf4_temp, 3, index - 1), \
  1505. SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
  1506. show_sf4_temp, store_sf4_temp, 4, index - 1), \
  1507. SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
  1508. show_sf4_temp, store_sf4_temp, 5, index - 1), \
  1509. SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
  1510. show_sf4_temp, store_sf4_temp, 6, index - 1) }
  1511. static struct sensor_device_attribute_2 w83795_in[][5] = {
  1512. SENSOR_ATTR_IN(0),
  1513. SENSOR_ATTR_IN(1),
  1514. SENSOR_ATTR_IN(2),
  1515. SENSOR_ATTR_IN(3),
  1516. SENSOR_ATTR_IN(4),
  1517. SENSOR_ATTR_IN(5),
  1518. SENSOR_ATTR_IN(6),
  1519. SENSOR_ATTR_IN(7),
  1520. SENSOR_ATTR_IN(8),
  1521. SENSOR_ATTR_IN(9),
  1522. SENSOR_ATTR_IN(10),
  1523. SENSOR_ATTR_IN(11),
  1524. SENSOR_ATTR_IN(12),
  1525. SENSOR_ATTR_IN(13),
  1526. SENSOR_ATTR_IN(14),
  1527. SENSOR_ATTR_IN(15),
  1528. SENSOR_ATTR_IN(16),
  1529. SENSOR_ATTR_IN(17),
  1530. SENSOR_ATTR_IN(18),
  1531. SENSOR_ATTR_IN(19),
  1532. SENSOR_ATTR_IN(20),
  1533. };
  1534. static const struct sensor_device_attribute_2 w83795_fan[][4] = {
  1535. SENSOR_ATTR_FAN(1),
  1536. SENSOR_ATTR_FAN(2),
  1537. SENSOR_ATTR_FAN(3),
  1538. SENSOR_ATTR_FAN(4),
  1539. SENSOR_ATTR_FAN(5),
  1540. SENSOR_ATTR_FAN(6),
  1541. SENSOR_ATTR_FAN(7),
  1542. SENSOR_ATTR_FAN(8),
  1543. SENSOR_ATTR_FAN(9),
  1544. SENSOR_ATTR_FAN(10),
  1545. SENSOR_ATTR_FAN(11),
  1546. SENSOR_ATTR_FAN(12),
  1547. SENSOR_ATTR_FAN(13),
  1548. SENSOR_ATTR_FAN(14),
  1549. };
  1550. static const struct sensor_device_attribute_2 w83795_temp[][28] = {
  1551. SENSOR_ATTR_TEMP(1),
  1552. SENSOR_ATTR_TEMP(2),
  1553. SENSOR_ATTR_TEMP(3),
  1554. SENSOR_ATTR_TEMP(4),
  1555. SENSOR_ATTR_TEMP(5),
  1556. SENSOR_ATTR_TEMP(6),
  1557. };
  1558. static const struct sensor_device_attribute_2 w83795_dts[][8] = {
  1559. SENSOR_ATTR_DTS(7),
  1560. SENSOR_ATTR_DTS(8),
  1561. SENSOR_ATTR_DTS(9),
  1562. SENSOR_ATTR_DTS(10),
  1563. SENSOR_ATTR_DTS(11),
  1564. SENSOR_ATTR_DTS(12),
  1565. SENSOR_ATTR_DTS(13),
  1566. SENSOR_ATTR_DTS(14),
  1567. };
  1568. static const struct sensor_device_attribute_2 w83795_pwm[][8] = {
  1569. SENSOR_ATTR_PWM(1),
  1570. SENSOR_ATTR_PWM(2),
  1571. SENSOR_ATTR_PWM(3),
  1572. SENSOR_ATTR_PWM(4),
  1573. SENSOR_ATTR_PWM(5),
  1574. SENSOR_ATTR_PWM(6),
  1575. SENSOR_ATTR_PWM(7),
  1576. SENSOR_ATTR_PWM(8),
  1577. };
  1578. static const struct sensor_device_attribute_2 w83795_tss[6] = {
  1579. SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO,
  1580. show_temp_src, store_temp_src, NOT_USED, 0),
  1581. SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO,
  1582. show_temp_src, store_temp_src, NOT_USED, 1),
  1583. SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO,
  1584. show_temp_src, store_temp_src, NOT_USED, 2),
  1585. SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO,
  1586. show_temp_src, store_temp_src, NOT_USED, 3),
  1587. SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO,
  1588. show_temp_src, store_temp_src, NOT_USED, 4),
  1589. SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO,
  1590. show_temp_src, store_temp_src, NOT_USED, 5),
  1591. };
  1592. static const struct sensor_device_attribute_2 sda_single_files[] = {
  1593. SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
  1594. store_chassis_clear, ALARM_STATUS, 46),
  1595. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1596. SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
  1597. store_fanin, FANIN_TOL, NOT_USED),
  1598. SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
  1599. store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
  1600. SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
  1601. store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
  1602. SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
  1603. store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
  1604. #endif
  1605. };
  1606. static const struct sensor_device_attribute_2 sda_beep_files[] = {
  1607. SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
  1608. store_beep, BEEP_ENABLE, 46),
  1609. SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
  1610. store_beep, BEEP_ENABLE, 47),
  1611. };
  1612. /*
  1613. * Driver interface
  1614. */
  1615. static void w83795_init_client(struct i2c_client *client)
  1616. {
  1617. struct w83795_data *data = i2c_get_clientdata(client);
  1618. static const u16 clkin[4] = { /* in kHz */
  1619. 14318, 24000, 33333, 48000
  1620. };
  1621. u8 config;
  1622. if (reset)
  1623. w83795_write(client, W83795_REG_CONFIG, 0x80);
  1624. /* Start monitoring if needed */
  1625. config = w83795_read(client, W83795_REG_CONFIG);
  1626. if (!(config & W83795_REG_CONFIG_START)) {
  1627. dev_info(&client->dev, "Enabling monitoring operations\n");
  1628. w83795_write(client, W83795_REG_CONFIG,
  1629. config | W83795_REG_CONFIG_START);
  1630. }
  1631. data->clkin = clkin[(config >> 3) & 0x3];
  1632. dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
  1633. }
  1634. static int w83795_get_device_id(struct i2c_client *client)
  1635. {
  1636. int device_id;
  1637. device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
  1638. /*
  1639. * Special case for rev. A chips; can't be checked first because later
  1640. * revisions emulate this for compatibility
  1641. */
  1642. if (device_id < 0 || (device_id & 0xf0) != 0x50) {
  1643. int alt_id;
  1644. alt_id = i2c_smbus_read_byte_data(client,
  1645. W83795_REG_DEVICEID_A);
  1646. if (alt_id == 0x50)
  1647. device_id = alt_id;
  1648. }
  1649. return device_id;
  1650. }
  1651. /* Return 0 if detection is successful, -ENODEV otherwise */
  1652. static int w83795_detect(struct i2c_client *client,
  1653. struct i2c_board_info *info)
  1654. {
  1655. int bank, vendor_id, device_id, expected, i2c_addr, config;
  1656. struct i2c_adapter *adapter = client->adapter;
  1657. unsigned short address = client->addr;
  1658. const char *chip_name;
  1659. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  1660. return -ENODEV;
  1661. bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1662. if (bank < 0 || (bank & 0x7c)) {
  1663. dev_dbg(&adapter->dev,
  1664. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1665. address, "bank");
  1666. return -ENODEV;
  1667. }
  1668. /* Check Nuvoton vendor ID */
  1669. vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
  1670. expected = bank & 0x80 ? 0x5c : 0xa3;
  1671. if (vendor_id != expected) {
  1672. dev_dbg(&adapter->dev,
  1673. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1674. address, "vendor id");
  1675. return -ENODEV;
  1676. }
  1677. /* Check device ID */
  1678. device_id = w83795_get_device_id(client) |
  1679. (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
  1680. if ((device_id >> 4) != 0x795) {
  1681. dev_dbg(&adapter->dev,
  1682. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1683. address, "device id\n");
  1684. return -ENODEV;
  1685. }
  1686. /*
  1687. * If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
  1688. * should match
  1689. */
  1690. if ((bank & 0x07) == 0) {
  1691. i2c_addr = i2c_smbus_read_byte_data(client,
  1692. W83795_REG_I2C_ADDR);
  1693. if ((i2c_addr & 0x7f) != address) {
  1694. dev_dbg(&adapter->dev,
  1695. "w83795: Detection failed at addr 0x%02hx, "
  1696. "check %s\n", address, "i2c addr");
  1697. return -ENODEV;
  1698. }
  1699. }
  1700. /*
  1701. * Check 795 chip type: 795G or 795ADG
  1702. * Usually we don't write to chips during detection, but here we don't
  1703. * quite have the choice; hopefully it's OK, we are about to return
  1704. * success anyway
  1705. */
  1706. if ((bank & 0x07) != 0)
  1707. i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
  1708. bank & ~0x07);
  1709. config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
  1710. if (config & W83795_REG_CONFIG_CONFIG48)
  1711. chip_name = "w83795adg";
  1712. else
  1713. chip_name = "w83795g";
  1714. strlcpy(info->type, chip_name, I2C_NAME_SIZE);
  1715. dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
  1716. 'A' + (device_id & 0xf), address);
  1717. return 0;
  1718. }
  1719. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1720. #define NUM_PWM_ATTRIBUTES ARRAY_SIZE(w83795_pwm[0])
  1721. #define NUM_TEMP_ATTRIBUTES ARRAY_SIZE(w83795_temp[0])
  1722. #else
  1723. #define NUM_PWM_ATTRIBUTES 4
  1724. #define NUM_TEMP_ATTRIBUTES 8
  1725. #endif
  1726. static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
  1727. const struct device_attribute *))
  1728. {
  1729. struct w83795_data *data = dev_get_drvdata(dev);
  1730. int err, i, j;
  1731. for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
  1732. if (!(data->has_in & (1 << i)))
  1733. continue;
  1734. for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
  1735. if (j == 4 && !data->enable_beep)
  1736. continue;
  1737. err = fn(dev, &w83795_in[i][j].dev_attr);
  1738. if (err)
  1739. return err;
  1740. }
  1741. }
  1742. for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
  1743. if (!(data->has_fan & (1 << i)))
  1744. continue;
  1745. for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
  1746. if (j == 3 && !data->enable_beep)
  1747. continue;
  1748. err = fn(dev, &w83795_fan[i][j].dev_attr);
  1749. if (err)
  1750. return err;
  1751. }
  1752. }
  1753. for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) {
  1754. j = w83795_tss_useful(data, i);
  1755. if (!j)
  1756. continue;
  1757. err = fn(dev, &w83795_tss[i].dev_attr);
  1758. if (err)
  1759. return err;
  1760. }
  1761. for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
  1762. err = fn(dev, &sda_single_files[i].dev_attr);
  1763. if (err)
  1764. return err;
  1765. }
  1766. if (data->enable_beep) {
  1767. for (i = 0; i < ARRAY_SIZE(sda_beep_files); i++) {
  1768. err = fn(dev, &sda_beep_files[i].dev_attr);
  1769. if (err)
  1770. return err;
  1771. }
  1772. }
  1773. for (i = 0; i < data->has_pwm; i++) {
  1774. for (j = 0; j < NUM_PWM_ATTRIBUTES; j++) {
  1775. err = fn(dev, &w83795_pwm[i][j].dev_attr);
  1776. if (err)
  1777. return err;
  1778. }
  1779. }
  1780. for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
  1781. if (!(data->has_temp & (1 << i)))
  1782. continue;
  1783. for (j = 0; j < NUM_TEMP_ATTRIBUTES; j++) {
  1784. if (j == 7 && !data->enable_beep)
  1785. continue;
  1786. err = fn(dev, &w83795_temp[i][j].dev_attr);
  1787. if (err)
  1788. return err;
  1789. }
  1790. }
  1791. if (data->enable_dts) {
  1792. for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
  1793. if (!(data->has_dts & (1 << i)))
  1794. continue;
  1795. for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
  1796. if (j == 7 && !data->enable_beep)
  1797. continue;
  1798. err = fn(dev, &w83795_dts[i][j].dev_attr);
  1799. if (err)
  1800. return err;
  1801. }
  1802. }
  1803. }
  1804. return 0;
  1805. }
  1806. /* We need a wrapper that fits in w83795_handle_files */
  1807. static int device_remove_file_wrapper(struct device *dev,
  1808. const struct device_attribute *attr)
  1809. {
  1810. device_remove_file(dev, attr);
  1811. return 0;
  1812. }
  1813. static void w83795_check_dynamic_in_limits(struct i2c_client *client)
  1814. {
  1815. struct w83795_data *data = i2c_get_clientdata(client);
  1816. u8 vid_ctl;
  1817. int i, err_max, err_min;
  1818. vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
  1819. /* Return immediately if VRM isn't configured */
  1820. if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
  1821. return;
  1822. data->has_dyn_in = (vid_ctl >> 3) & 0x07;
  1823. for (i = 0; i < 2; i++) {
  1824. if (!(data->has_dyn_in & (1 << i)))
  1825. continue;
  1826. /* Voltage limits in dynamic mode, switch to read-only */
  1827. err_max = sysfs_chmod_file(&client->dev.kobj,
  1828. &w83795_in[i][2].dev_attr.attr,
  1829. S_IRUGO);
  1830. err_min = sysfs_chmod_file(&client->dev.kobj,
  1831. &w83795_in[i][3].dev_attr.attr,
  1832. S_IRUGO);
  1833. if (err_max || err_min)
  1834. dev_warn(&client->dev,
  1835. "Failed to set in%d limits read-only (%d, %d)\n",
  1836. i, err_max, err_min);
  1837. else
  1838. dev_info(&client->dev,
  1839. "in%d limits set dynamically from VID\n", i);
  1840. }
  1841. }
  1842. /* Check pins that can be used for either temperature or voltage monitoring */
  1843. static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
  1844. int temp_chan, int in_chan)
  1845. {
  1846. /* config is a 2-bit value */
  1847. switch (config) {
  1848. case 0x2: /* Voltage monitoring */
  1849. data->has_in |= 1 << in_chan;
  1850. break;
  1851. case 0x1: /* Thermal diode */
  1852. if (temp_chan >= 4)
  1853. break;
  1854. data->temp_mode |= 1 << temp_chan;
  1855. fallthrough;
  1856. case 0x3: /* Thermistor */
  1857. data->has_temp |= 1 << temp_chan;
  1858. break;
  1859. }
  1860. }
  1861. static const struct i2c_device_id w83795_id[];
  1862. static int w83795_probe(struct i2c_client *client)
  1863. {
  1864. int i;
  1865. u8 tmp;
  1866. struct device *dev = &client->dev;
  1867. struct w83795_data *data;
  1868. int err;
  1869. data = devm_kzalloc(dev, sizeof(struct w83795_data), GFP_KERNEL);
  1870. if (!data)
  1871. return -ENOMEM;
  1872. i2c_set_clientdata(client, data);
  1873. data->chip_type = i2c_match_id(w83795_id, client)->driver_data;
  1874. data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1875. mutex_init(&data->update_lock);
  1876. /* Initialize the chip */
  1877. w83795_init_client(client);
  1878. /* Check which voltages and fans are present */
  1879. data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
  1880. | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
  1881. data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
  1882. | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
  1883. /* Check which analog temperatures and extra voltages are present */
  1884. tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
  1885. if (tmp & 0x20)
  1886. data->enable_dts = 1;
  1887. w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
  1888. w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
  1889. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1890. w83795_apply_temp_config(data, tmp >> 6, 3, 20);
  1891. w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
  1892. w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
  1893. w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
  1894. /* Check DTS enable status */
  1895. if (data->enable_dts) {
  1896. if (1 & w83795_read(client, W83795_REG_DTSC))
  1897. data->enable_dts |= 2;
  1898. data->has_dts = w83795_read(client, W83795_REG_DTSE);
  1899. }
  1900. /* Report PECI Tbase values */
  1901. if (data->enable_dts == 1) {
  1902. for (i = 0; i < 8; i++) {
  1903. if (!(data->has_dts & (1 << i)))
  1904. continue;
  1905. tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
  1906. dev_info(&client->dev,
  1907. "PECI agent %d Tbase temperature: %u\n",
  1908. i + 1, (unsigned int)tmp & 0x7f);
  1909. }
  1910. }
  1911. data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
  1912. /* pwm and smart fan */
  1913. if (data->chip_type == w83795g)
  1914. data->has_pwm = 8;
  1915. else
  1916. data->has_pwm = 2;
  1917. /* Check if BEEP pin is available */
  1918. if (data->chip_type == w83795g) {
  1919. /* The W83795G has a dedicated BEEP pin */
  1920. data->enable_beep = 1;
  1921. } else {
  1922. /*
  1923. * The W83795ADG has a shared pin for OVT# and BEEP, so you
  1924. * can't have both
  1925. */
  1926. tmp = w83795_read(client, W83795_REG_OVT_CFG);
  1927. if ((tmp & OVT_CFG_SEL) == 0)
  1928. data->enable_beep = 1;
  1929. }
  1930. err = w83795_handle_files(dev, device_create_file);
  1931. if (err)
  1932. goto exit_remove;
  1933. if (data->chip_type == w83795g)
  1934. w83795_check_dynamic_in_limits(client);
  1935. data->hwmon_dev = hwmon_device_register(dev);
  1936. if (IS_ERR(data->hwmon_dev)) {
  1937. err = PTR_ERR(data->hwmon_dev);
  1938. goto exit_remove;
  1939. }
  1940. return 0;
  1941. exit_remove:
  1942. w83795_handle_files(dev, device_remove_file_wrapper);
  1943. return err;
  1944. }
  1945. static int w83795_remove(struct i2c_client *client)
  1946. {
  1947. struct w83795_data *data = i2c_get_clientdata(client);
  1948. hwmon_device_unregister(data->hwmon_dev);
  1949. w83795_handle_files(&client->dev, device_remove_file_wrapper);
  1950. return 0;
  1951. }
  1952. static const struct i2c_device_id w83795_id[] = {
  1953. { "w83795g", w83795g },
  1954. { "w83795adg", w83795adg },
  1955. { }
  1956. };
  1957. MODULE_DEVICE_TABLE(i2c, w83795_id);
  1958. static struct i2c_driver w83795_driver = {
  1959. .driver = {
  1960. .name = "w83795",
  1961. },
  1962. .probe_new = w83795_probe,
  1963. .remove = w83795_remove,
  1964. .id_table = w83795_id,
  1965. .class = I2C_CLASS_HWMON,
  1966. .detect = w83795_detect,
  1967. .address_list = normal_i2c,
  1968. };
  1969. module_i2c_driver(w83795_driver);
  1970. MODULE_AUTHOR("Wei Song, Jean Delvare <jdelvare@suse.de>");
  1971. MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
  1972. MODULE_LICENSE("GPL");