smm665.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Driver for SMM665 Power Controller / Monitor
  4. *
  5. * Copyright (C) 2010 Ericsson AB.
  6. *
  7. * This driver should also work for SMM465, SMM764, and SMM766, but is untested
  8. * for those chips. Only monitoring functionality is implemented.
  9. *
  10. * Datasheets:
  11. * http://www.summitmicro.com/prod_select/summary/SMM665/SMM665B_2089_20.pdf
  12. * http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/err.h>
  18. #include <linux/slab.h>
  19. #include <linux/i2c.h>
  20. #include <linux/hwmon.h>
  21. #include <linux/hwmon-sysfs.h>
  22. #include <linux/delay.h>
  23. #include <linux/jiffies.h>
  24. /* Internal reference voltage (VREF, x 1000 */
  25. #define SMM665_VREF_ADC_X1000 1250
  26. /* module parameters */
  27. static int vref = SMM665_VREF_ADC_X1000;
  28. module_param(vref, int, 0);
  29. MODULE_PARM_DESC(vref, "Reference voltage in mV");
  30. enum chips { smm465, smm665, smm665c, smm764, smm766 };
  31. /*
  32. * ADC channel addresses
  33. */
  34. #define SMM665_MISC16_ADC_DATA_A 0x00
  35. #define SMM665_MISC16_ADC_DATA_B 0x01
  36. #define SMM665_MISC16_ADC_DATA_C 0x02
  37. #define SMM665_MISC16_ADC_DATA_D 0x03
  38. #define SMM665_MISC16_ADC_DATA_E 0x04
  39. #define SMM665_MISC16_ADC_DATA_F 0x05
  40. #define SMM665_MISC16_ADC_DATA_VDD 0x06
  41. #define SMM665_MISC16_ADC_DATA_12V 0x07
  42. #define SMM665_MISC16_ADC_DATA_INT_TEMP 0x08
  43. #define SMM665_MISC16_ADC_DATA_AIN1 0x09
  44. #define SMM665_MISC16_ADC_DATA_AIN2 0x0a
  45. /*
  46. * Command registers
  47. */
  48. #define SMM665_MISC8_CMD_STS 0x80
  49. #define SMM665_MISC8_STATUS1 0x81
  50. #define SMM665_MISC8_STATUSS2 0x82
  51. #define SMM665_MISC8_IO_POLARITY 0x83
  52. #define SMM665_MISC8_PUP_POLARITY 0x84
  53. #define SMM665_MISC8_ADOC_STATUS1 0x85
  54. #define SMM665_MISC8_ADOC_STATUS2 0x86
  55. #define SMM665_MISC8_WRITE_PROT 0x87
  56. #define SMM665_MISC8_STS_TRACK 0x88
  57. /*
  58. * Configuration registers and register groups
  59. */
  60. #define SMM665_ADOC_ENABLE 0x0d
  61. #define SMM665_LIMIT_BASE 0x80 /* First limit register */
  62. /*
  63. * Limit register bit masks
  64. */
  65. #define SMM665_TRIGGER_RST 0x8000
  66. #define SMM665_TRIGGER_HEALTHY 0x4000
  67. #define SMM665_TRIGGER_POWEROFF 0x2000
  68. #define SMM665_TRIGGER_SHUTDOWN 0x1000
  69. #define SMM665_ADC_MASK 0x03ff
  70. #define smm665_is_critical(lim) ((lim) & (SMM665_TRIGGER_RST \
  71. | SMM665_TRIGGER_POWEROFF \
  72. | SMM665_TRIGGER_SHUTDOWN))
  73. /*
  74. * Fault register bit definitions
  75. * Values are merged from status registers 1/2,
  76. * with status register 1 providing the upper 8 bits.
  77. */
  78. #define SMM665_FAULT_A 0x0001
  79. #define SMM665_FAULT_B 0x0002
  80. #define SMM665_FAULT_C 0x0004
  81. #define SMM665_FAULT_D 0x0008
  82. #define SMM665_FAULT_E 0x0010
  83. #define SMM665_FAULT_F 0x0020
  84. #define SMM665_FAULT_VDD 0x0040
  85. #define SMM665_FAULT_12V 0x0080
  86. #define SMM665_FAULT_TEMP 0x0100
  87. #define SMM665_FAULT_AIN1 0x0200
  88. #define SMM665_FAULT_AIN2 0x0400
  89. /*
  90. * I2C Register addresses
  91. *
  92. * The configuration register needs to be the configured base register.
  93. * The command/status register address is derived from it.
  94. */
  95. #define SMM665_REGMASK 0x78
  96. #define SMM665_CMDREG_BASE 0x48
  97. #define SMM665_CONFREG_BASE 0x50
  98. /*
  99. * Equations given by chip manufacturer to calculate voltage/temperature values
  100. * vref = Reference voltage on VREF_ADC pin (module parameter)
  101. * adc = 10bit ADC value read back from registers
  102. */
  103. /* Voltage A-F and VDD */
  104. #define SMM665_VMON_ADC_TO_VOLTS(adc) ((adc) * vref / 256)
  105. /* Voltage 12VIN */
  106. #define SMM665_12VIN_ADC_TO_VOLTS(adc) ((adc) * vref * 3 / 256)
  107. /* Voltage AIN1, AIN2 */
  108. #define SMM665_AIN_ADC_TO_VOLTS(adc) ((adc) * vref / 512)
  109. /* Temp Sensor */
  110. #define SMM665_TEMP_ADC_TO_CELSIUS(adc) (((adc) <= 511) ? \
  111. ((int)(adc) * 1000 / 4) : \
  112. (((int)(adc) - 0x400) * 1000 / 4))
  113. #define SMM665_NUM_ADC 11
  114. /*
  115. * Chip dependent ADC conversion time, in uS
  116. */
  117. #define SMM665_ADC_WAIT_SMM665 70
  118. #define SMM665_ADC_WAIT_SMM766 185
  119. struct smm665_data {
  120. enum chips type;
  121. int conversion_time; /* ADC conversion time */
  122. struct i2c_client *client;
  123. struct mutex update_lock;
  124. bool valid;
  125. unsigned long last_updated; /* in jiffies */
  126. u16 adc[SMM665_NUM_ADC]; /* adc values (raw) */
  127. u16 faults; /* fault status */
  128. /* The following values are in mV */
  129. int critical_min_limit[SMM665_NUM_ADC];
  130. int alarm_min_limit[SMM665_NUM_ADC];
  131. int critical_max_limit[SMM665_NUM_ADC];
  132. int alarm_max_limit[SMM665_NUM_ADC];
  133. struct i2c_client *cmdreg;
  134. };
  135. /*
  136. * smm665_read16()
  137. *
  138. * Read 16 bit value from <reg>, <reg+1>. Upper 8 bits are in <reg>.
  139. */
  140. static int smm665_read16(struct i2c_client *client, int reg)
  141. {
  142. int rv, val;
  143. rv = i2c_smbus_read_byte_data(client, reg);
  144. if (rv < 0)
  145. return rv;
  146. val = rv << 8;
  147. rv = i2c_smbus_read_byte_data(client, reg + 1);
  148. if (rv < 0)
  149. return rv;
  150. val |= rv;
  151. return val;
  152. }
  153. /*
  154. * Read adc value.
  155. */
  156. static int smm665_read_adc(struct smm665_data *data, int adc)
  157. {
  158. struct i2c_client *client = data->cmdreg;
  159. int rv;
  160. int radc;
  161. /*
  162. * Algorithm for reading ADC, per SMM665 datasheet
  163. *
  164. * {[S][addr][W][Ack]} {[offset][Ack]} {[S][addr][R][Nack]}
  165. * [wait conversion time]
  166. * {[S][addr][R][Ack]} {[datahi][Ack]} {[datalo][Ack][P]}
  167. *
  168. * To implement the first part of this exchange,
  169. * do a full read transaction and expect a failure/Nack.
  170. * This sets up the address pointer on the SMM665
  171. * and starts the ADC conversion.
  172. * Then do a two-byte read transaction.
  173. */
  174. rv = i2c_smbus_read_byte_data(client, adc << 3);
  175. if (rv != -ENXIO) {
  176. /*
  177. * We expect ENXIO to reflect NACK
  178. * (per Documentation/i2c/fault-codes.rst).
  179. * Everything else is an error.
  180. */
  181. dev_dbg(&client->dev,
  182. "Unexpected return code %d when setting ADC index", rv);
  183. return (rv < 0) ? rv : -EIO;
  184. }
  185. udelay(data->conversion_time);
  186. /*
  187. * Now read two bytes.
  188. *
  189. * Neither i2c_smbus_read_byte() nor
  190. * i2c_smbus_read_block_data() worked here,
  191. * so use i2c_smbus_read_word_swapped() instead.
  192. * We could also try to use i2c_master_recv(),
  193. * but that is not always supported.
  194. */
  195. rv = i2c_smbus_read_word_swapped(client, 0);
  196. if (rv < 0) {
  197. dev_dbg(&client->dev, "Failed to read ADC value: error %d", rv);
  198. return rv;
  199. }
  200. /*
  201. * Validate/verify readback adc channel (in bit 11..14).
  202. */
  203. radc = (rv >> 11) & 0x0f;
  204. if (radc != adc) {
  205. dev_dbg(&client->dev, "Unexpected RADC: Expected %d got %d",
  206. adc, radc);
  207. return -EIO;
  208. }
  209. return rv & SMM665_ADC_MASK;
  210. }
  211. static struct smm665_data *smm665_update_device(struct device *dev)
  212. {
  213. struct smm665_data *data = dev_get_drvdata(dev);
  214. struct i2c_client *client = data->client;
  215. struct smm665_data *ret = data;
  216. mutex_lock(&data->update_lock);
  217. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  218. int i, val;
  219. /*
  220. * read status registers
  221. */
  222. val = smm665_read16(client, SMM665_MISC8_STATUS1);
  223. if (unlikely(val < 0)) {
  224. ret = ERR_PTR(val);
  225. goto abort;
  226. }
  227. data->faults = val;
  228. /* Read adc registers */
  229. for (i = 0; i < SMM665_NUM_ADC; i++) {
  230. val = smm665_read_adc(data, i);
  231. if (unlikely(val < 0)) {
  232. ret = ERR_PTR(val);
  233. goto abort;
  234. }
  235. data->adc[i] = val;
  236. }
  237. data->last_updated = jiffies;
  238. data->valid = 1;
  239. }
  240. abort:
  241. mutex_unlock(&data->update_lock);
  242. return ret;
  243. }
  244. /* Return converted value from given adc */
  245. static int smm665_convert(u16 adcval, int index)
  246. {
  247. int val = 0;
  248. switch (index) {
  249. case SMM665_MISC16_ADC_DATA_12V:
  250. val = SMM665_12VIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
  251. break;
  252. case SMM665_MISC16_ADC_DATA_VDD:
  253. case SMM665_MISC16_ADC_DATA_A:
  254. case SMM665_MISC16_ADC_DATA_B:
  255. case SMM665_MISC16_ADC_DATA_C:
  256. case SMM665_MISC16_ADC_DATA_D:
  257. case SMM665_MISC16_ADC_DATA_E:
  258. case SMM665_MISC16_ADC_DATA_F:
  259. val = SMM665_VMON_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
  260. break;
  261. case SMM665_MISC16_ADC_DATA_AIN1:
  262. case SMM665_MISC16_ADC_DATA_AIN2:
  263. val = SMM665_AIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
  264. break;
  265. case SMM665_MISC16_ADC_DATA_INT_TEMP:
  266. val = SMM665_TEMP_ADC_TO_CELSIUS(adcval & SMM665_ADC_MASK);
  267. break;
  268. default:
  269. /* If we get here, the developer messed up */
  270. WARN_ON_ONCE(1);
  271. break;
  272. }
  273. return val;
  274. }
  275. static int smm665_get_min(struct device *dev, int index)
  276. {
  277. struct smm665_data *data = dev_get_drvdata(dev);
  278. return data->alarm_min_limit[index];
  279. }
  280. static int smm665_get_max(struct device *dev, int index)
  281. {
  282. struct smm665_data *data = dev_get_drvdata(dev);
  283. return data->alarm_max_limit[index];
  284. }
  285. static int smm665_get_lcrit(struct device *dev, int index)
  286. {
  287. struct smm665_data *data = dev_get_drvdata(dev);
  288. return data->critical_min_limit[index];
  289. }
  290. static int smm665_get_crit(struct device *dev, int index)
  291. {
  292. struct smm665_data *data = dev_get_drvdata(dev);
  293. return data->critical_max_limit[index];
  294. }
  295. static ssize_t smm665_show_crit_alarm(struct device *dev,
  296. struct device_attribute *da, char *buf)
  297. {
  298. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  299. struct smm665_data *data = smm665_update_device(dev);
  300. int val = 0;
  301. if (IS_ERR(data))
  302. return PTR_ERR(data);
  303. if (data->faults & (1 << attr->index))
  304. val = 1;
  305. return snprintf(buf, PAGE_SIZE, "%d\n", val);
  306. }
  307. static ssize_t smm665_show_input(struct device *dev,
  308. struct device_attribute *da, char *buf)
  309. {
  310. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  311. struct smm665_data *data = smm665_update_device(dev);
  312. int adc = attr->index;
  313. int val;
  314. if (IS_ERR(data))
  315. return PTR_ERR(data);
  316. val = smm665_convert(data->adc[adc], adc);
  317. return snprintf(buf, PAGE_SIZE, "%d\n", val);
  318. }
  319. #define SMM665_SHOW(what) \
  320. static ssize_t smm665_show_##what(struct device *dev, \
  321. struct device_attribute *da, char *buf) \
  322. { \
  323. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  324. const int val = smm665_get_##what(dev, attr->index); \
  325. return snprintf(buf, PAGE_SIZE, "%d\n", val); \
  326. }
  327. SMM665_SHOW(min);
  328. SMM665_SHOW(max);
  329. SMM665_SHOW(lcrit);
  330. SMM665_SHOW(crit);
  331. /*
  332. * These macros are used below in constructing device attribute objects
  333. * for use with sysfs_create_group() to make a sysfs device file
  334. * for each register.
  335. */
  336. #define SMM665_ATTR(name, type, cmd_idx) \
  337. static SENSOR_DEVICE_ATTR(name##_##type, S_IRUGO, \
  338. smm665_show_##type, NULL, cmd_idx)
  339. /* Construct a sensor_device_attribute structure for each register */
  340. /* Input voltages */
  341. SMM665_ATTR(in1, input, SMM665_MISC16_ADC_DATA_12V);
  342. SMM665_ATTR(in2, input, SMM665_MISC16_ADC_DATA_VDD);
  343. SMM665_ATTR(in3, input, SMM665_MISC16_ADC_DATA_A);
  344. SMM665_ATTR(in4, input, SMM665_MISC16_ADC_DATA_B);
  345. SMM665_ATTR(in5, input, SMM665_MISC16_ADC_DATA_C);
  346. SMM665_ATTR(in6, input, SMM665_MISC16_ADC_DATA_D);
  347. SMM665_ATTR(in7, input, SMM665_MISC16_ADC_DATA_E);
  348. SMM665_ATTR(in8, input, SMM665_MISC16_ADC_DATA_F);
  349. SMM665_ATTR(in9, input, SMM665_MISC16_ADC_DATA_AIN1);
  350. SMM665_ATTR(in10, input, SMM665_MISC16_ADC_DATA_AIN2);
  351. /* Input voltages min */
  352. SMM665_ATTR(in1, min, SMM665_MISC16_ADC_DATA_12V);
  353. SMM665_ATTR(in2, min, SMM665_MISC16_ADC_DATA_VDD);
  354. SMM665_ATTR(in3, min, SMM665_MISC16_ADC_DATA_A);
  355. SMM665_ATTR(in4, min, SMM665_MISC16_ADC_DATA_B);
  356. SMM665_ATTR(in5, min, SMM665_MISC16_ADC_DATA_C);
  357. SMM665_ATTR(in6, min, SMM665_MISC16_ADC_DATA_D);
  358. SMM665_ATTR(in7, min, SMM665_MISC16_ADC_DATA_E);
  359. SMM665_ATTR(in8, min, SMM665_MISC16_ADC_DATA_F);
  360. SMM665_ATTR(in9, min, SMM665_MISC16_ADC_DATA_AIN1);
  361. SMM665_ATTR(in10, min, SMM665_MISC16_ADC_DATA_AIN2);
  362. /* Input voltages max */
  363. SMM665_ATTR(in1, max, SMM665_MISC16_ADC_DATA_12V);
  364. SMM665_ATTR(in2, max, SMM665_MISC16_ADC_DATA_VDD);
  365. SMM665_ATTR(in3, max, SMM665_MISC16_ADC_DATA_A);
  366. SMM665_ATTR(in4, max, SMM665_MISC16_ADC_DATA_B);
  367. SMM665_ATTR(in5, max, SMM665_MISC16_ADC_DATA_C);
  368. SMM665_ATTR(in6, max, SMM665_MISC16_ADC_DATA_D);
  369. SMM665_ATTR(in7, max, SMM665_MISC16_ADC_DATA_E);
  370. SMM665_ATTR(in8, max, SMM665_MISC16_ADC_DATA_F);
  371. SMM665_ATTR(in9, max, SMM665_MISC16_ADC_DATA_AIN1);
  372. SMM665_ATTR(in10, max, SMM665_MISC16_ADC_DATA_AIN2);
  373. /* Input voltages lcrit */
  374. SMM665_ATTR(in1, lcrit, SMM665_MISC16_ADC_DATA_12V);
  375. SMM665_ATTR(in2, lcrit, SMM665_MISC16_ADC_DATA_VDD);
  376. SMM665_ATTR(in3, lcrit, SMM665_MISC16_ADC_DATA_A);
  377. SMM665_ATTR(in4, lcrit, SMM665_MISC16_ADC_DATA_B);
  378. SMM665_ATTR(in5, lcrit, SMM665_MISC16_ADC_DATA_C);
  379. SMM665_ATTR(in6, lcrit, SMM665_MISC16_ADC_DATA_D);
  380. SMM665_ATTR(in7, lcrit, SMM665_MISC16_ADC_DATA_E);
  381. SMM665_ATTR(in8, lcrit, SMM665_MISC16_ADC_DATA_F);
  382. SMM665_ATTR(in9, lcrit, SMM665_MISC16_ADC_DATA_AIN1);
  383. SMM665_ATTR(in10, lcrit, SMM665_MISC16_ADC_DATA_AIN2);
  384. /* Input voltages crit */
  385. SMM665_ATTR(in1, crit, SMM665_MISC16_ADC_DATA_12V);
  386. SMM665_ATTR(in2, crit, SMM665_MISC16_ADC_DATA_VDD);
  387. SMM665_ATTR(in3, crit, SMM665_MISC16_ADC_DATA_A);
  388. SMM665_ATTR(in4, crit, SMM665_MISC16_ADC_DATA_B);
  389. SMM665_ATTR(in5, crit, SMM665_MISC16_ADC_DATA_C);
  390. SMM665_ATTR(in6, crit, SMM665_MISC16_ADC_DATA_D);
  391. SMM665_ATTR(in7, crit, SMM665_MISC16_ADC_DATA_E);
  392. SMM665_ATTR(in8, crit, SMM665_MISC16_ADC_DATA_F);
  393. SMM665_ATTR(in9, crit, SMM665_MISC16_ADC_DATA_AIN1);
  394. SMM665_ATTR(in10, crit, SMM665_MISC16_ADC_DATA_AIN2);
  395. /* critical alarms */
  396. SMM665_ATTR(in1, crit_alarm, SMM665_FAULT_12V);
  397. SMM665_ATTR(in2, crit_alarm, SMM665_FAULT_VDD);
  398. SMM665_ATTR(in3, crit_alarm, SMM665_FAULT_A);
  399. SMM665_ATTR(in4, crit_alarm, SMM665_FAULT_B);
  400. SMM665_ATTR(in5, crit_alarm, SMM665_FAULT_C);
  401. SMM665_ATTR(in6, crit_alarm, SMM665_FAULT_D);
  402. SMM665_ATTR(in7, crit_alarm, SMM665_FAULT_E);
  403. SMM665_ATTR(in8, crit_alarm, SMM665_FAULT_F);
  404. SMM665_ATTR(in9, crit_alarm, SMM665_FAULT_AIN1);
  405. SMM665_ATTR(in10, crit_alarm, SMM665_FAULT_AIN2);
  406. /* Temperature */
  407. SMM665_ATTR(temp1, input, SMM665_MISC16_ADC_DATA_INT_TEMP);
  408. SMM665_ATTR(temp1, min, SMM665_MISC16_ADC_DATA_INT_TEMP);
  409. SMM665_ATTR(temp1, max, SMM665_MISC16_ADC_DATA_INT_TEMP);
  410. SMM665_ATTR(temp1, lcrit, SMM665_MISC16_ADC_DATA_INT_TEMP);
  411. SMM665_ATTR(temp1, crit, SMM665_MISC16_ADC_DATA_INT_TEMP);
  412. SMM665_ATTR(temp1, crit_alarm, SMM665_FAULT_TEMP);
  413. /*
  414. * Finally, construct an array of pointers to members of the above objects,
  415. * as required for sysfs_create_group()
  416. */
  417. static struct attribute *smm665_attrs[] = {
  418. &sensor_dev_attr_in1_input.dev_attr.attr,
  419. &sensor_dev_attr_in1_min.dev_attr.attr,
  420. &sensor_dev_attr_in1_max.dev_attr.attr,
  421. &sensor_dev_attr_in1_lcrit.dev_attr.attr,
  422. &sensor_dev_attr_in1_crit.dev_attr.attr,
  423. &sensor_dev_attr_in1_crit_alarm.dev_attr.attr,
  424. &sensor_dev_attr_in2_input.dev_attr.attr,
  425. &sensor_dev_attr_in2_min.dev_attr.attr,
  426. &sensor_dev_attr_in2_max.dev_attr.attr,
  427. &sensor_dev_attr_in2_lcrit.dev_attr.attr,
  428. &sensor_dev_attr_in2_crit.dev_attr.attr,
  429. &sensor_dev_attr_in2_crit_alarm.dev_attr.attr,
  430. &sensor_dev_attr_in3_input.dev_attr.attr,
  431. &sensor_dev_attr_in3_min.dev_attr.attr,
  432. &sensor_dev_attr_in3_max.dev_attr.attr,
  433. &sensor_dev_attr_in3_lcrit.dev_attr.attr,
  434. &sensor_dev_attr_in3_crit.dev_attr.attr,
  435. &sensor_dev_attr_in3_crit_alarm.dev_attr.attr,
  436. &sensor_dev_attr_in4_input.dev_attr.attr,
  437. &sensor_dev_attr_in4_min.dev_attr.attr,
  438. &sensor_dev_attr_in4_max.dev_attr.attr,
  439. &sensor_dev_attr_in4_lcrit.dev_attr.attr,
  440. &sensor_dev_attr_in4_crit.dev_attr.attr,
  441. &sensor_dev_attr_in4_crit_alarm.dev_attr.attr,
  442. &sensor_dev_attr_in5_input.dev_attr.attr,
  443. &sensor_dev_attr_in5_min.dev_attr.attr,
  444. &sensor_dev_attr_in5_max.dev_attr.attr,
  445. &sensor_dev_attr_in5_lcrit.dev_attr.attr,
  446. &sensor_dev_attr_in5_crit.dev_attr.attr,
  447. &sensor_dev_attr_in5_crit_alarm.dev_attr.attr,
  448. &sensor_dev_attr_in6_input.dev_attr.attr,
  449. &sensor_dev_attr_in6_min.dev_attr.attr,
  450. &sensor_dev_attr_in6_max.dev_attr.attr,
  451. &sensor_dev_attr_in6_lcrit.dev_attr.attr,
  452. &sensor_dev_attr_in6_crit.dev_attr.attr,
  453. &sensor_dev_attr_in6_crit_alarm.dev_attr.attr,
  454. &sensor_dev_attr_in7_input.dev_attr.attr,
  455. &sensor_dev_attr_in7_min.dev_attr.attr,
  456. &sensor_dev_attr_in7_max.dev_attr.attr,
  457. &sensor_dev_attr_in7_lcrit.dev_attr.attr,
  458. &sensor_dev_attr_in7_crit.dev_attr.attr,
  459. &sensor_dev_attr_in7_crit_alarm.dev_attr.attr,
  460. &sensor_dev_attr_in8_input.dev_attr.attr,
  461. &sensor_dev_attr_in8_min.dev_attr.attr,
  462. &sensor_dev_attr_in8_max.dev_attr.attr,
  463. &sensor_dev_attr_in8_lcrit.dev_attr.attr,
  464. &sensor_dev_attr_in8_crit.dev_attr.attr,
  465. &sensor_dev_attr_in8_crit_alarm.dev_attr.attr,
  466. &sensor_dev_attr_in9_input.dev_attr.attr,
  467. &sensor_dev_attr_in9_min.dev_attr.attr,
  468. &sensor_dev_attr_in9_max.dev_attr.attr,
  469. &sensor_dev_attr_in9_lcrit.dev_attr.attr,
  470. &sensor_dev_attr_in9_crit.dev_attr.attr,
  471. &sensor_dev_attr_in9_crit_alarm.dev_attr.attr,
  472. &sensor_dev_attr_in10_input.dev_attr.attr,
  473. &sensor_dev_attr_in10_min.dev_attr.attr,
  474. &sensor_dev_attr_in10_max.dev_attr.attr,
  475. &sensor_dev_attr_in10_lcrit.dev_attr.attr,
  476. &sensor_dev_attr_in10_crit.dev_attr.attr,
  477. &sensor_dev_attr_in10_crit_alarm.dev_attr.attr,
  478. &sensor_dev_attr_temp1_input.dev_attr.attr,
  479. &sensor_dev_attr_temp1_min.dev_attr.attr,
  480. &sensor_dev_attr_temp1_max.dev_attr.attr,
  481. &sensor_dev_attr_temp1_lcrit.dev_attr.attr,
  482. &sensor_dev_attr_temp1_crit.dev_attr.attr,
  483. &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
  484. NULL,
  485. };
  486. ATTRIBUTE_GROUPS(smm665);
  487. static const struct i2c_device_id smm665_id[];
  488. static int smm665_probe(struct i2c_client *client)
  489. {
  490. struct i2c_adapter *adapter = client->adapter;
  491. struct smm665_data *data;
  492. struct device *hwmon_dev;
  493. int i, ret;
  494. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
  495. | I2C_FUNC_SMBUS_WORD_DATA))
  496. return -ENODEV;
  497. if (i2c_smbus_read_byte_data(client, SMM665_ADOC_ENABLE) < 0)
  498. return -ENODEV;
  499. data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
  500. if (!data)
  501. return -ENOMEM;
  502. i2c_set_clientdata(client, data);
  503. mutex_init(&data->update_lock);
  504. data->client = client;
  505. data->type = i2c_match_id(smm665_id, client)->driver_data;
  506. data->cmdreg = i2c_new_dummy_device(adapter, (client->addr & ~SMM665_REGMASK)
  507. | SMM665_CMDREG_BASE);
  508. if (IS_ERR(data->cmdreg))
  509. return PTR_ERR(data->cmdreg);
  510. switch (data->type) {
  511. case smm465:
  512. case smm665:
  513. data->conversion_time = SMM665_ADC_WAIT_SMM665;
  514. break;
  515. case smm665c:
  516. case smm764:
  517. case smm766:
  518. data->conversion_time = SMM665_ADC_WAIT_SMM766;
  519. break;
  520. }
  521. ret = -ENODEV;
  522. if (i2c_smbus_read_byte_data(data->cmdreg, SMM665_MISC8_CMD_STS) < 0)
  523. goto out_unregister;
  524. /*
  525. * Read limits.
  526. *
  527. * Limit registers start with register SMM665_LIMIT_BASE.
  528. * Each channel uses 8 registers, providing four limit values
  529. * per channel. Each limit value requires two registers, with the
  530. * high byte in the first register and the low byte in the second
  531. * register. The first two limits are under limit values, followed
  532. * by two over limit values.
  533. *
  534. * Limit register order matches the ADC register order, so we use
  535. * ADC register defines throughout the code to index limit registers.
  536. *
  537. * We save the first retrieved value both as "critical" and "alarm"
  538. * value. The second value overwrites either the critical or the
  539. * alarm value, depending on its configuration. This ensures that both
  540. * critical and alarm values are initialized, even if both registers are
  541. * configured as critical or non-critical.
  542. */
  543. for (i = 0; i < SMM665_NUM_ADC; i++) {
  544. int val;
  545. val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8);
  546. if (unlikely(val < 0))
  547. goto out_unregister;
  548. data->critical_min_limit[i] = data->alarm_min_limit[i]
  549. = smm665_convert(val, i);
  550. val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 2);
  551. if (unlikely(val < 0))
  552. goto out_unregister;
  553. if (smm665_is_critical(val))
  554. data->critical_min_limit[i] = smm665_convert(val, i);
  555. else
  556. data->alarm_min_limit[i] = smm665_convert(val, i);
  557. val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 4);
  558. if (unlikely(val < 0))
  559. goto out_unregister;
  560. data->critical_max_limit[i] = data->alarm_max_limit[i]
  561. = smm665_convert(val, i);
  562. val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 6);
  563. if (unlikely(val < 0))
  564. goto out_unregister;
  565. if (smm665_is_critical(val))
  566. data->critical_max_limit[i] = smm665_convert(val, i);
  567. else
  568. data->alarm_max_limit[i] = smm665_convert(val, i);
  569. }
  570. hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
  571. client->name, data,
  572. smm665_groups);
  573. if (IS_ERR(hwmon_dev)) {
  574. ret = PTR_ERR(hwmon_dev);
  575. goto out_unregister;
  576. }
  577. return 0;
  578. out_unregister:
  579. i2c_unregister_device(data->cmdreg);
  580. return ret;
  581. }
  582. static int smm665_remove(struct i2c_client *client)
  583. {
  584. struct smm665_data *data = i2c_get_clientdata(client);
  585. i2c_unregister_device(data->cmdreg);
  586. return 0;
  587. }
  588. static const struct i2c_device_id smm665_id[] = {
  589. {"smm465", smm465},
  590. {"smm665", smm665},
  591. {"smm665c", smm665c},
  592. {"smm764", smm764},
  593. {"smm766", smm766},
  594. {}
  595. };
  596. MODULE_DEVICE_TABLE(i2c, smm665_id);
  597. /* This is the driver that will be inserted */
  598. static struct i2c_driver smm665_driver = {
  599. .driver = {
  600. .name = "smm665",
  601. },
  602. .probe_new = smm665_probe,
  603. .remove = smm665_remove,
  604. .id_table = smm665_id,
  605. };
  606. module_i2c_driver(smm665_driver);
  607. MODULE_AUTHOR("Guenter Roeck");
  608. MODULE_DESCRIPTION("SMM665 driver");
  609. MODULE_LICENSE("GPL");